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authorDave Airlie <airlied@nx6125b.(none)>2007-05-30 17:27:22 +1000
committerDave Airlie <airlied@nx6125b.(none)>2007-05-30 17:27:22 +1000
commit7fc02657c4d740941fbda5a8823cf45de3eca3f8 (patch)
tree37cab7df21004c50dd3c6777700ecd0f9c596077 /src/radeon_cursor.c
parent800bf53279e2c2bf854682bbfd6fa16d03afed00 (diff)
parent4c61c0ee91a2ffeefce30972a584486f1df1d1ae (diff)
Merge branch 'origin' into randr-1.2-test
Conflicts: src/radeon_cursor.c src/radeon_display.c src/radeon_driver.c
Diffstat (limited to 'src/radeon_cursor.c')
-rw-r--r--src/radeon_cursor.c40
1 files changed, 9 insertions, 31 deletions
diff --git a/src/radeon_cursor.c b/src/radeon_cursor.c
index 68771f8f..67466155 100644
--- a/src/radeon_cursor.c
+++ b/src/radeon_cursor.c
@@ -70,8 +70,6 @@ static CARD32 mono_cursor_color[] = {
#define CURSOR_WIDTH 64
#define CURSOR_HEIGHT 64
-#define COMMON_CURSOR_SWAPPING_START() RADEON_SYNC(info, pScrn)
-
/*
* The cursor bits are always 32bpp. On MSBFirst buses,
* configure byte swapping to swap 32 bit units when writing
@@ -83,7 +81,6 @@ static CARD32 mono_cursor_color[] = {
#define CURSOR_SWAPPING_DECL_MMIO unsigned char *RADEONMMIO = info->MMIO;
#define CURSOR_SWAPPING_START() \
do { \
- COMMON_CURSOR_SWAPPING_START(); \
OUTREG(RADEON_SURFACE_CNTL, \
(info->ModeReg.surface_cntl | \
RADEON_NONSURF_AP0_SWP_32BPP | RADEON_NONSURF_AP1_SWP_32BPP) & \
@@ -95,10 +92,7 @@ static CARD32 mono_cursor_color[] = {
#else
#define CURSOR_SWAPPING_DECL_MMIO
-#define CURSOR_SWAPPING_START() \
- do { \
- COMMON_CURSOR_SWAPPING_START(); \
- } while (0)
+#define CURSOR_SWAPPING_START()
#define CURSOR_SWAPPING_END()
#endif
@@ -112,14 +106,14 @@ radeon_crtc_show_cursor (xf86CrtcPtr crtc)
RADEONInfoPtr info = RADEONPTR(pScrn);
unsigned char *RADEONMMIO = info->MMIO;
+ RADEON_SYNC(info, pScrn);
+
if (crtc_id == 0)
- OUTREGP(RADEON_CRTC_GEN_CNTL, RADEON_CRTC_CUR_EN,
- ~RADEON_CRTC_CUR_EN);
+ OUTREGP(RADEON_CRTC_GEN_CNTL, RADEON_CRTC_CUR_EN | 2 << 20,
+ ~(RADEON_CRTC_CUR_EN | RADEON_CRTC_CUR_MODE_MASK));
else if (crtc_id == 1)
- OUTREGP(RADEON_CRTC2_GEN_CNTL, RADEON_CRTC2_CUR_EN,
- ~RADEON_CRTC2_CUR_EN);
-
-
+ OUTREGP(RADEON_CRTC2_GEN_CNTL, RADEON_CRTC2_CUR_EN | 2 << 20,
+ ~(RADEON_CRTC2_CUR_EN | RADEON_CRTC2_CUR_MODE_MASK));
}
void
@@ -131,6 +125,8 @@ radeon_crtc_hide_cursor (xf86CrtcPtr crtc)
RADEONInfoPtr info = RADEONPTR(pScrn);
unsigned char *RADEONMMIO = info->MMIO;
+ RADEON_SYNC(info, pScrn);
+
if (crtc_id == 0)
OUTREGP(RADEON_CRTC_GEN_CNTL, 0, ~RADEON_CRTC_CUR_EN);
else if (crtc_id == 1)
@@ -277,22 +273,10 @@ radeon_crtc_load_cursor_argb (xf86CrtcPtr crtc, CARD32 *image)
unsigned char *RADEONMMIO = info->MMIO;
CARD32 *d = (CARD32 *)(pointer)(info->FB + info->cursor_offset + pScrn->fbOffset);
int x, y, w, h;
- CARD32 save1 = 0;
- CARD32 save2 = 0;
CARD32 *i;
RADEONCTRACE(("RADEONLoadCursorARGB\n"));
- if (crtc_id == 0) {
- save1 = INREG(RADEON_CRTC_GEN_CNTL) & ~(CARD32) (3 << 20);
- save1 |= (CARD32) (2 << 20);
- OUTREG(RADEON_CRTC_GEN_CNTL, save1 & (CARD32)~RADEON_CRTC_CUR_EN);
- } else if (crtc_id == 1) {
- save2 = INREG(RADEON_CRTC2_GEN_CNTL) & ~(CARD32) (3 << 20);
- save2 |= (CARD32) (2 << 20);
- OUTREG(RADEON_CRTC2_GEN_CNTL, save2 & (CARD32)~RADEON_CRTC2_CUR_EN);
- }
-
info->cursor_argb = TRUE;
CURSOR_SWAPPING_START();
@@ -323,12 +307,6 @@ radeon_crtc_load_cursor_argb (xf86CrtcPtr crtc, CARD32 *image)
#endif
CURSOR_SWAPPING_END ();
-
- if (crtc_id == 0) {
- OUTREG(RADEON_CRTC_GEN_CNTL, save1);
- } else if (crtc_id == 1) {
- OUTREG(RADEON_CRTC2_GEN_CNTL, save2);
- }
}
#endif