diff options
author | Alex Deucher <alexdeucher@gmail.com> | 2010-09-30 19:30:35 -0400 |
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committer | Alex Deucher <alexdeucher@gmail.com> | 2010-09-30 19:30:35 -0400 |
commit | e843faf355c864beab81e74f0e39f8ad53d4c2bf (patch) | |
tree | 7fa8f60ef0422f283addf64f5194a2c3acaf77a5 /src/radeon_cursor.c | |
parent | 886febc882053e09294225e85b102f965041b62b (diff) |
radeon: fix fbLocation for >32 bit MC addresses
If the fbLocation was at an address >32 bits, we'd fail.
Change fbLocation to uint64_t and properly cast when needed.
Diffstat (limited to 'src/radeon_cursor.c')
-rw-r--r-- | src/radeon_cursor.c | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/src/radeon_cursor.c b/src/radeon_cursor.c index 8eff9d1f..9fa2d805 100644 --- a/src/radeon_cursor.c +++ b/src/radeon_cursor.c @@ -106,11 +106,12 @@ avivo_setup_cursor(xf86CrtcPtr crtc, Bool enable) OUTREG(AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset, (AVIVO_D1CURSOR_MODE_24BPP << AVIVO_D1CURSOR_MODE_SHIFT)); if (enable) { + uint64_t location = info->fbLocation + radeon_crtc->cursor_offset + pScrn->fbOffset; if (info->ChipFamily >= CHIP_FAMILY_RV770) { if (radeon_crtc->crtc_id) - OUTREG(R700_D2CUR_SURFACE_ADDRESS_HIGH, 0); + OUTREG(R700_D2CUR_SURFACE_ADDRESS_HIGH, (location >> 32) & 0xf); else - OUTREG(R700_D1CUR_SURFACE_ADDRESS_HIGH, 0); + OUTREG(R700_D1CUR_SURFACE_ADDRESS_HIGH, (location >> 32) & 0xf); } OUTREG(AVIVO_D1CUR_SURFACE_ADDRESS + radeon_crtc->crtc_offset, info->fbLocation + radeon_crtc->cursor_offset + pScrn->fbOffset); @@ -152,10 +153,11 @@ evergreen_setup_cursor(xf86CrtcPtr crtc, Bool enable) EVERGREEN_CURSOR_MODE(EVERGREEN_CURSOR_24_8_PRE_MULT)); if (enable) { - OUTREG(EVERGREEN_CUR_SURFACE_ADDRESS_HIGH + radeon_crtc->crtc_offset, 0); + uint64_t location = info->fbLocation + radeon_crtc->cursor_offset + pScrn->fbOffset; + OUTREG(EVERGREEN_CUR_SURFACE_ADDRESS_HIGH + radeon_crtc->crtc_offset, + (location >> 32) & 0xf); OUTREG(EVERGREEN_CUR_SURFACE_ADDRESS + radeon_crtc->crtc_offset, - (info->fbLocation + radeon_crtc->cursor_offset + pScrn->fbOffset) - & EVERGREEN_CUR_SURFACE_ADDRESS_MASK); + location & EVERGREEN_CUR_SURFACE_ADDRESS_MASK); OUTREG(EVERGREEN_CUR_CONTROL + radeon_crtc->crtc_offset, EVERGREEN_CURSOR_EN | EVERGREEN_CURSOR_MODE(EVERGREEN_CURSOR_24_8_PRE_MULT)); } |