diff options
| author | Egbert Eich <eich@suse.de> | 2005-05-23 09:50:20 +0000 |
|---|---|---|
| committer | Egbert Eich <eich@suse.de> | 2005-05-23 09:50:20 +0000 |
| commit | 0845d1db801ae74688464bd4c41a7e40e4b50186 (patch) | |
| tree | 655817fdedffbde8a1d58521b30ccb4fd3a46360 /src/radeon_driver.c | |
| parent | 74b86b036def72e5180a46871b8452ba9eea9bb1 (diff) | |
Explicitely disable DPMS power states during close screen. Fix macro that
takes a value and a mask of bits to modify to be behave evquvalently if
the bits that should remain unchanged are set or unset in the value
(Bugzilla #3369).
Diffstat (limited to 'src/radeon_driver.c')
| -rw-r--r-- | src/radeon_driver.c | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/src/radeon_driver.c b/src/radeon_driver.c index e0a488e9..3e4564ef 100644 --- a/src/radeon_driver.c +++ b/src/radeon_driver.c @@ -8209,6 +8209,7 @@ static Bool RADEONCloseScreen(int scrnIndex, ScreenPtr pScreen) } if (pScrn->vtSema) { + RADEONDisplayPowerManagementSet(pScrn, DPMSModeOn, 0); RADEONRestore(pScrn); } RADEONUnmapMem(pScrn); @@ -8392,15 +8393,15 @@ static void RADEONDisplayPowerManagementSet(ScrnInfoPtr pScrn, /* Screen: Off; HSync: Off, VSync: On */ if (info->IsSecondary) OUTREGP(RADEON_CRTC2_GEN_CNTL, - RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_HSYNC_DIS, + (RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_HSYNC_DIS), ~mask2); else { if (info->MergedFB) OUTREGP(RADEON_CRTC2_GEN_CNTL, - RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_HSYNC_DIS, + (RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_HSYNC_DIS), ~mask2); OUTREGP(RADEON_CRTC_EXT_CNTL, - RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_HSYNC_DIS, + (RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_HSYNC_DIS), ~mask1); } break; @@ -8409,15 +8410,15 @@ static void RADEONDisplayPowerManagementSet(ScrnInfoPtr pScrn, /* Screen: Off; HSync: On, VSync: Off */ if (info->IsSecondary) OUTREGP(RADEON_CRTC2_GEN_CNTL, - RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS, + (RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS), ~mask2); else { if (info->MergedFB) OUTREGP(RADEON_CRTC2_GEN_CNTL, - RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS, + (RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS), ~mask2); OUTREGP(RADEON_CRTC_EXT_CNTL, - RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_VSYNC_DIS, + (RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_VSYNC_DIS), ~mask1); } break; |