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authorAlex Deucher <alexdeucher@gmail.com>2009-02-26 11:44:13 -0500
committerAlex Deucher <alexdeucher@gmail.com>2009-02-26 11:44:13 -0500
commit000756e052a291230e5c95e48b69a5aa9c4fab0e (patch)
tree4a9a22ac48ae3081bfa70107fb175b081f1f380c /src/radeon_driver.c
parent22d7746bfc1bcbb3269afac88971254088ea9ece (diff)
parent8373f4399b03961f2c928a9275d47e9f41bd92bb (diff)
Merge branch 'r6xx-r7xx-support' of git+ssh://agd5f@git.freedesktop.org/git/xorg/driver/xf86-video-ati
Diffstat (limited to 'src/radeon_driver.c')
-rw-r--r--src/radeon_driver.c49
1 files changed, 32 insertions, 17 deletions
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index 8bf2a02e..1171de48 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -677,8 +677,8 @@ static void radeon_write_mc_fb_agp_location(ScrnInfoPtr pScrn, int mask, uint32_
if (mask & LOC_FB)
OUTREG(R700_MC_VM_FB_LOCATION, fb_loc);
if (mask & LOC_AGP) {
- OUTREG(R600_MC_VM_AGP_BOT, agp_loc);
- OUTREG(R600_MC_VM_AGP_TOP, agp_loc_hi);
+ OUTREG(R700_MC_VM_AGP_BOT, agp_loc);
+ OUTREG(R700_MC_VM_AGP_TOP, agp_loc_hi);
}
} else if (info->ChipFamily >= CHIP_FAMILY_R600) {
if (mask & LOC_FB)
@@ -727,8 +727,8 @@ static void radeon_read_mc_fb_agp_location(ScrnInfoPtr pScrn, int mask, uint32_t
if (mask & LOC_FB)
*fb_loc = INREG(R700_MC_VM_FB_LOCATION);
if (mask & LOC_AGP) {
- *agp_loc = INREG(R600_MC_VM_AGP_BOT);
- *agp_loc_hi = INREG(R600_MC_VM_AGP_TOP);
+ *agp_loc = INREG(R700_MC_VM_AGP_BOT);
+ *agp_loc_hi = INREG(R700_MC_VM_AGP_TOP);
}
} else if (info->ChipFamily >= CHIP_FAMILY_R600) {
if (mask & LOC_FB)
@@ -1879,7 +1879,10 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn)
/* treat PCIE IGP cards as PCI */
if (info->cardType == CARD_PCIE && info->IsIGP)
- info->cardType = CARD_PCI;
+ info->cardType = CARD_PCI;
+
+ if ((info->ChipFamily >= CHIP_FAMILY_R600) && info->IsIGP)
+ info->cardType = CARD_PCIE;
/* not sure about gart table requirements */
if ((info->ChipFamily == CHIP_FAMILY_RS600) && info->IsIGP)
@@ -1912,6 +1915,7 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn)
info->Chipset != PCI_CHIP_RN50_5969);
#endif
+#if 0
if (info->ChipFamily >= CHIP_FAMILY_R600) {
info->r600_shadow_fb = TRUE;
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
@@ -1919,6 +1923,7 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn)
if (!xf86LoadSubModule(pScrn, "shadow"))
return FALSE;
}
+#endif
return TRUE;
}
@@ -1996,8 +2001,8 @@ static Bool RADEONPreInitAccel(ScrnInfoPtr pScrn)
if (info->ChipFamily >= CHIP_FAMILY_R600) {
xf86DrvMsg(pScrn->scrnIndex, X_DEFAULT,
- "No acceleration support available on R600 yet.\n");
- return TRUE;
+ "Experimental R6xx/R7xx EXA support.\n");
+ info->useEXA = TRUE;
}
if (!xf86ReturnOptValBool(info->Options, OPTION_NOACCEL, FALSE)) {
@@ -2342,7 +2347,10 @@ static Bool RADEONPreInitDRI(ScrnInfoPtr pScrn)
xf86DrvMsg(pScrn->scrnIndex, from, "Page Flipping %sabled%s\n",
info->dri->allowPageFlip ? "en" : "dis", reason);
- info->DMAForXv = TRUE;
+ if (info->ChipFamily >= CHIP_FAMILY_R600)
+ info->DMAForXv = FALSE;
+ else
+ info->DMAForXv = TRUE;
from = xf86GetOptValBool(info->Options, OPTION_XV_DMA, &info->DMAForXv)
? X_CONFIG : X_INFO;
xf86DrvMsg(pScrn->scrnIndex, from,
@@ -3650,11 +3658,9 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
RADEONDGAInit(pScreen);
/* Init Xv */
- if (info->ChipFamily < CHIP_FAMILY_R600) {
- xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
- "Initializing Xv\n");
- RADEONInitVideo(pScreen);
- }
+ xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
+ "Initializing Xv\n");
+ RADEONInitVideo(pScreen);
if (info->r600_shadow_fb == TRUE) {
if (!shadowSetup(pScreen)) {
@@ -3779,7 +3785,8 @@ void RADEONRestoreMemMapRegisters(ScrnInfoPtr pScrn,
}
/* Reset the engine and HDP */
- RADEONEngineReset(pScrn);
+ if (info->ChipFamily < CHIP_FAMILY_R600)
+ RADEONEngineReset(pScrn);
}
} else {
@@ -3964,7 +3971,7 @@ static void RADEONAdjustMemMapRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save)
}
#ifdef USE_EXA
- if (info->accelDFS)
+ if (info->accelDFS || (info->ChipFamily >= CHIP_FAMILY_R600))
{
drm_radeon_getparam_t gp;
int gart_base;
@@ -5228,7 +5235,8 @@ Bool RADEONSwitchMode(int scrnIndex, DisplayModePtr mode, int flags)
if (info->accelOn) {
RADEON_SYNC(info, pScrn);
- RADEONEngineRestore(pScrn);
+ if (info->ChipFamily < CHIP_FAMILY_R600)
+ RADEONEngineRestore(pScrn);
}
#ifdef XF86DRI
@@ -5432,6 +5440,10 @@ void RADEONAdjustFrame(int scrnIndex, int x, int y, int flags)
xf86OutputPtr output = config->output[config->compat_output];
xf86CrtcPtr crtc = output->crtc;
+ /* not handled */
+ if (IS_AVIVO_VARIANT)
+ return;
+
#ifdef XF86DRI
if (info->cp->CPStarted && pScrn->pScreen) DRILock(pScrn->pScreen, 0);
#endif
@@ -5544,9 +5556,12 @@ Bool RADEONEnterVT(int scrnIndex, int flags)
if (info->adaptor)
RADEONResetVideo(pScrn);
- if (info->accelOn)
+ if (info->accelOn && (info->ChipFamily < CHIP_FAMILY_R600))
RADEONEngineRestore(pScrn);
+ if (info->accelOn && info->accel_state)
+ info->accel_state->XInited3D = FALSE;
+
#ifdef XF86DRI
if (info->directRenderingEnabled) {
RADEONCP_START(pScrn, info);