diff options
| author | Alex Deucher <alex@cube.(none)> | 2008-05-13 20:50:25 -0400 |
|---|---|---|
| committer | Alex Deucher <alex@cube.(none)> | 2008-05-13 20:50:25 -0400 |
| commit | 582c1a1b2c7b1032e9f9f54ca36100c57f580c5c (patch) | |
| tree | 96b96fc91976cfc2d170cf49449f7b3e7e042ab2 /src/radeon_driver.c | |
| parent | 708e7c98f636738fbcc47a597bc94b309a4dc1c4 (diff) | |
RS4xx: Split out RS400 and RS480 as separate families
RS400 (intel based IGP) and RS480 (AMD based IGP) have different
MC setups and need to be handled differently
Diffstat (limited to 'src/radeon_driver.c')
| -rw-r--r-- | src/radeon_driver.c | 28 |
1 files changed, 16 insertions, 12 deletions
diff --git a/src/radeon_driver.c b/src/radeon_driver.c index 36994c87..215886ee 100644 --- a/src/radeon_driver.c +++ b/src/radeon_driver.c @@ -928,12 +928,12 @@ static Bool RADEONProbePLLParameters(ScrnInfoPtr pScrn) xtal = 2700; } else { if (prev_xtal == 0) { - prev_xtal = xtal; - tries = 0; - goto again; + prev_xtal = xtal; + tries = 0; + goto again; } else if (prev_xtal != xtal) { - prev_xtal = 0; - goto again; + prev_xtal = 0; + goto again; } } @@ -944,14 +944,16 @@ static Bool RADEONProbePLLParameters(ScrnInfoPtr pScrn) if (ref_div < 2) { uint32_t tmp; tmp = INPLL(pScrn, RADEON_PPLL_REF_DIV); - if (IS_R300_VARIANT || (info->ChipFamily == CHIP_FAMILY_RS300) - || (info->ChipFamily == CHIP_FAMILY_RS400)) - ref_div = (tmp & R300_PPLL_REF_DIV_ACC_MASK) >> - R300_PPLL_REF_DIV_ACC_SHIFT; + if (IS_R300_VARIANT + || (info->ChipFamily == CHIP_FAMILY_RS300) + || (info->ChipFamily == CHIP_FAMILY_RS400) + || (info->ChipFamily == CHIP_FAMILY_RS480)) + ref_div = (tmp & R300_PPLL_REF_DIV_ACC_MASK) >> + R300_PPLL_REF_DIV_ACC_SHIFT; else - ref_div = tmp & RADEON_PPLL_REF_DIV_MASK; + ref_div = tmp & RADEON_PPLL_REF_DIV_MASK; if (ref_div < 2) - ref_div = 12; + ref_div = 12; } /* Calculate "base" xclk straight from MPLL, though that isn't @@ -1025,7 +1027,8 @@ static void RADEONGetClockInfo(ScrnInfoPtr pScrn) tmp = INPLL(pScrn, RADEON_PPLL_REF_DIV); if (IS_R300_VARIANT || (info->ChipFamily == CHIP_FAMILY_RS300) || - (info->ChipFamily == CHIP_FAMILY_RS400)) { + (info->ChipFamily == CHIP_FAMILY_RS400) || + (info->ChipFamily == CHIP_FAMILY_RS480)) { pll->reference_div = (tmp & R300_PPLL_REF_DIV_ACC_MASK) >> R300_PPLL_REF_DIV_ACC_SHIFT; } else { pll->reference_div = tmp & RADEON_PPLL_REF_DIV_MASK; @@ -1812,6 +1815,7 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn) (info->ChipFamily == CHIP_FAMILY_RS200) || (info->ChipFamily == CHIP_FAMILY_RS300) || (info->ChipFamily == CHIP_FAMILY_RS400) || + (info->ChipFamily == CHIP_FAMILY_RS480) || (info->ChipFamily == CHIP_FAMILY_RS690) || (info->ChipFamily == CHIP_FAMILY_RS740)) info->has_tcl = FALSE; |