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authorAlex Deucher <alexdeucher@gmail.com>2009-04-22 11:42:18 -0400
committerAlex Deucher <alexdeucher@gmail.com>2009-04-22 11:42:18 -0400
commit24e4b73b4fbbb2c790e6120ede3caaa4e7e58359 (patch)
tree65d7192bce5b1a3f19464a693db48f2d11e58ba0 /src/radeon_driver.c
parentefa0825a86a8dc0f03ebb42c576ed26189e9d4bb (diff)
radeon pll: add support for fractional feedback divs
Allows us to hit dot clocks much closer, especially on chips with non-27 Mhz reference clocks like most IGP chips. This should fix most flickering and blanking problems with non-exact dot clocks.
Diffstat (limited to 'src/radeon_driver.c')
-rw-r--r--src/radeon_driver.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index db5a0e38..9cbfd0d1 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -1206,9 +1206,13 @@ static void RADEONGetClockInfo(ScrnInfoPtr pScrn)
if (IS_AVIVO_VARIANT) {
pll->min_post_div = 2;
pll->max_post_div = 0x7f;
+ pll->min_frac_feedback_div = 0;
+ pll->max_frac_feedback_div = 9;
} else {
pll->min_post_div = 1;
pll->max_post_div = 12; //16 on crtc0
+ pll->min_frac_feedback_div = 0;
+ pll->max_frac_feedback_div = 0;
}
pll->min_ref_div = 2;
pll->max_ref_div = 0x3ff;