Revert "RADEON: memmap rework 1"

This reverts commit dd8ee1b444f4b973a1e0fadca5f943f2162b5e94.

Conflicts:

	src/radeon.h
	src/radeon_driver.c

This rework seems to have caused more trouble than it was worth.

1 files changed, 29 insertions, 42 deletions

diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index 1528757d..8bb29a6f 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -125,8 +125,6 @@ static void RADEONSaveMemMapRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save);
 #ifdef XF86DRI
 static void RADEONAdjustMemMapRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save);
 #endif
-static void
-RADEONRestoreMemMapRegisters(ScrnInfoPtr pScrn, RADEONSavePtr restore);
 
 static const OptionInfoRec RADEONOptions[] = {
     { OPTION_NOACCEL,        "NoAccel",          OPTV_BOOLEAN, {0}, FALSE },
@@ -1185,8 +1183,7 @@ static Bool RADEONPreInitWeight(ScrnInfoPtr pScrn)
     return TRUE;
 }
 
-static void
-RADEONInitMemMapRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save,
+void RADEONInitMemMapRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save,
 				      RADEONInfoPtr info)
 {
     save->mc_fb_location = info->mc_fb_location;
@@ -1287,7 +1284,7 @@ static void RADEONInitMemoryMap(ScrnInfoPtr pScrn)
     if (info->ChipFamily >= CHIP_FAMILY_R600) {
 	info->fbLocation = (info->mc_fb_location & 0xffff) << 24;
     } else {
-	info->fbLocation = (info->mc_fb_location & 0xffff) << 16;
+   	info->fbLocation = (info->mc_fb_location & 0xffff) << 16;
     }
     /* Just disable the damn AGP apertures for now, it may be
      * re-enabled later by the DRM
@@ -1299,9 +1296,9 @@ static void RADEONInitMemoryMap(ScrnInfoPtr pScrn)
 	} else {
 	    OUTREG(AVIVO_HDP_FB_LOCATION, info->mc_fb_location);
 	}
-	info->mc_agp_location = 0x003f0000;
+    	info->mc_agp_location = 0x003f0000;
     } else
-	info->mc_agp_location = 0xffffffc0;
+    	info->mc_agp_location = 0xffffffc0;
     xf86DrvMsg(pScrn->scrnIndex, X_INFO,
 	       "RADEONInitMemoryMap() : \n");
     xf86DrvMsg(pScrn->scrnIndex, X_INFO,
@@ -3128,12 +3125,6 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
      */
     RADEONInitMemoryMap(pScrn);
 
-    /* copy saved memmap regs to saved mode regs */
-    RADEONInitMemMapRegisters(pScrn, info->ModeReg, info);
-
-    /* write any changes we made */
-    RADEONRestoreMemMapRegisters(pScrn, info->ModeReg);
-
     /* empty the surfaces */
     {
 	unsigned char *RADEONMMIO = info->MMIO;
@@ -3270,7 +3261,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
 		xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
 			   "[drm] failed to enable new memory map\n");
 		RADEONDRICloseScreen(pScreen);
-		info->directRenderingEnabled = FALSE;
+		info->directRenderingEnabled = FALSE;		
 	}
     }
 #endif
@@ -3330,7 +3321,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
 	else if (strcmp(s, "BGR") == 0) subPixelOrder = SubPixelHorizontalBGR;
 	else if (strcmp(s, "NONE") == 0) subPixelOrder = SubPixelNone;
 	PictureSetSubpixelOrder (pScreen, subPixelOrder);
-    }
+    } 
 #endif
 
     pScrn->vtSema = TRUE;
@@ -3377,7 +3368,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
 	RADEONAdjustMemMapRegisters(pScrn, info->ModeReg);
 
 	if ((info->DispPriority == 1) && (info->cardType==CARD_AGP)) {
-	    /* we need to re-calculate bandwidth because of AGPMode difference. */
+	    /* we need to re-calculate bandwidth because of AGPMode difference. */ 
 	    RADEONInitDispBandwidth(pScrn);
 	}
 	xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Direct rendering enabled\n");
@@ -3515,9 +3506,8 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
 }
 
 /* Write memory mapping registers */
-static void
-RADEONRestoreMemMapRegisters(ScrnInfoPtr pScrn,
-			     RADEONSavePtr restore)
+void RADEONRestoreMemMapRegisters(ScrnInfoPtr pScrn,
+					 RADEONSavePtr restore)
 {
     RADEONInfoPtr  info       = RADEONPTR(pScrn);
     RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
@@ -3587,7 +3577,7 @@ RADEONRestoreMemMapRegisters(ScrnInfoPtr pScrn,
 	    } else {
 		OUTREG(R600_HDP_NONSURFACE_BASE, (restore->mc_fb_location << 16) & 0xff0000);
 	    }
-
+	    
 	    /* Reset the engine and HDP */
 	    RADEONEngineReset(pScrn);
 	}
@@ -3637,7 +3627,7 @@ RADEONRestoreMemMapRegisters(ScrnInfoPtr pScrn,
 		       | RADEON_CRTC2_DISP_REQ_EN_B);
 	    }
 
-	    /* Make sure the chip settles down (paranoid !) */
+	    /* Make sure the chip settles down (paranoid !) */ 
 	    usleep(100000);
 
 	    /* Wait for MC idle */
@@ -4839,7 +4829,7 @@ static void RADEONRestore(ScrnInfoPtr pScrn)
 #endif
 
     /* to restore console mode, DAC registers should be set after every other registers are set,
-     * otherwise,we may get blank screen
+     * otherwise,we may get blank screen 
      */
     if (IS_AVIVO_VARIANT)
 	avivo_restore_vga_regs(pScrn, restore);
@@ -4902,7 +4892,7 @@ Bool RADEONSwitchMode(int scrnIndex, DisplayModePtr mode, int flags)
 
     if (info->allowColorTiling) {
         info->tilingEnabled = (mode->Flags & (V_DBLSCAN | V_INTERLACE)) ? FALSE : TRUE;
-#ifdef XF86DRI
+#ifdef XF86DRI	
 	if (info->directRenderingEnabled && (info->tilingEnabled != tilingOld)) {
 	    RADEONSAREAPrivPtr pSAREAPriv;
 	  if (RADEONDRISetParam(pScrn, RADEON_SETPARAM_SWITCH_TILING, (info->tilingEnabled ? 1 : 0)) < 0)
@@ -5183,11 +5173,11 @@ Bool RADEONEnterVT(int scrnIndex, int flags)
     RADEONWaitForIdleMMIO(pScrn);
 
     if (info->IsMobility && !IS_AVIVO_VARIANT) {
-	if (xf86ReturnOptValBool(info->Options, OPTION_DYNAMIC_CLOCKS, FALSE)) {
+        if (xf86ReturnOptValBool(info->Options, OPTION_DYNAMIC_CLOCKS, FALSE)) {
 	    RADEONSetDynamicClock(pScrn, 1);
-	} else {
+        } else {
 	    RADEONSetDynamicClock(pScrn, 0);
-	}
+        }
     }
 
     if (IS_R300_VARIANT || IS_RV100_VARIANT)
@@ -5195,20 +5185,18 @@ Bool RADEONEnterVT(int scrnIndex, int flags)
 
     pScrn->vtSema = TRUE;
 
-    RADEONRestoreMemMapRegisters(pScrn, info->ModeReg);
-    RADEONRestoreSurfaces(pScrn, info->ModeReg);
-
     if (!xf86SetDesiredModes(pScrn))
 	return FALSE;
 
+    RADEONRestoreSurfaces(pScrn, info->ModeReg);
 #ifdef XF86DRI
     if (info->directRenderingEnabled) {
-	if (info->cardType == CARD_PCIE &&
-	    info->pKernelDRMVersion->version_minor >= 19 &&
-	    info->FbSecureSize) {
-	    /* we need to backup the PCIE GART TABLE from fb memory */
-	    memcpy(info->FB + info->pciGartOffset, info->pciGartBackup, info->pciGartSize);
-	}
+    	if (info->cardType == CARD_PCIE && info->pKernelDRMVersion->version_minor >= 19 &&
+	    info->FbSecureSize)
+    	{
+      		/* we need to backup the PCIE GART TABLE from fb memory */
+	  memcpy(info->FB + info->pciGartOffset, info->pciGartBackup, info->pciGartSize);
+    	}
 
 	/* get the DRI back into shape after resume */
 	RADEONDRISetVBlankInterrupt (pScrn, TRUE);
@@ -5217,7 +5205,6 @@ Bool RADEONEnterVT(int scrnIndex, int flags)
 
     }
 #endif
-
     /* this will get XVideo going again, but only if XVideo was initialised
        during server startup (hence the info->adaptor if). */
     if (info->adaptor)
@@ -5233,6 +5220,7 @@ Bool RADEONEnterVT(int scrnIndex, int flags)
     }
 #endif
 
+    //    pScrn->AdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0);
 
     return TRUE;
 }
@@ -5254,12 +5242,11 @@ void RADEONLeaveVT(int scrnIndex, int flags)
 	DRILock(pScrn->pScreen, 0);
 	RADEONCP_STOP(pScrn, info);
 
-	if (info->cardType == CARD_PCIE &&
-	    info->pKernelDRMVersion->version_minor >= 19 &&
-	    info->FbSecureSize) {
-	    /* we need to backup the PCIE GART TABLE from fb memory */
-	    memcpy(info->pciGartBackup, (info->FB + info->pciGartOffset), info->pciGartSize);
-	}
+        if (info->cardType == CARD_PCIE && info->pKernelDRMVersion->version_minor >= 19 && info->FbSecureSize)
+        {
+            /* we need to backup the PCIE GART TABLE from fb memory */
+            memcpy(info->pciGartBackup, (info->FB + info->pciGartOffset), info->pciGartSize);
+        }
 
 	/* Make sure 3D clients will re-upload textures to video RAM */
 	if (info->textureSize) {