diff options
| author | Jesse Barnes <jbarnes@jbarnes-mobile.amr.corp.intel.com> | 2007-05-09 16:16:39 -0700 |
|---|---|---|
| committer | Jesse Barnes <jbarnes@jbarnes-mobile.amr.corp.intel.com> | 2007-05-09 16:16:39 -0700 |
| commit | 33c370b1d8350945f80ac12097d3e91243a400f2 (patch) | |
| tree | 394b95d8e13de0326a2751007618bc26c052c6fa /src/radeon_driver.c | |
| parent | 6263248a0044777a352e4ee7380b4b8f9afd091b (diff) | |
RADEON:
- fix an ugly modesetting bug: if we happened to set the mode on
CRTC1 before CRTC2, CRTC2's RestoreMode function would clobber
CRTC1's CRTC_OFFSET register since we never updated
ModeReg.crtc_offset... so make AdjustFrame use ModeReg and pull
the call to it up before RestoreMode, seems to work ok here.
Diffstat (limited to 'src/radeon_driver.c')
| -rw-r--r-- | src/radeon_driver.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/radeon_driver.c b/src/radeon_driver.c index df644d8b..1e94c588 100644 --- a/src/radeon_driver.c +++ b/src/radeon_driver.c @@ -6235,7 +6235,7 @@ void RADEONDoAdjustFrame(ScrnInfoPtr pScrn, int x, int y, int clone) { RADEONInfoPtr info = RADEONPTR(pScrn); unsigned char *RADEONMMIO = info->MMIO; - int reg, Base, regcntl, crtcoffsetcntl, xytilereg, crtcxytile = 0; + int Base, regcntl, crtcoffsetcntl, xytilereg, crtcxytile = 0; #ifdef XF86DRI RADEONSAREAPrivPtr pSAREAPriv; XF86DRISAREAPtr pSAREA; @@ -6263,11 +6263,9 @@ void RADEONDoAdjustFrame(ScrnInfoPtr pScrn, int x, int y, int clone) only after a vsync. We'd probably need to wait (in drm) for vsync and only then update OFFSET and OFFSET_CNTL, if the y coord has changed. Seems hard to fix. */ if (clone || info->IsSecondary) { - reg = RADEON_CRTC2_OFFSET; regcntl = RADEON_CRTC2_OFFSET_CNTL; xytilereg = R300_CRTC2_TILE_X0_Y0; } else { - reg = RADEON_CRTC_OFFSET; regcntl = RADEON_CRTC_OFFSET_CNTL; xytilereg = R300_CRTC_TILE_X0_Y0; } @@ -6337,14 +6335,16 @@ void RADEONDoAdjustFrame(ScrnInfoPtr pScrn, int x, int y, int clone) } #endif - OUTREG(reg, Base); - if (IS_R300_VARIANT) { OUTREG(xytilereg, crtcxytile); } else { OUTREG(regcntl, crtcoffsetcntl); } + if (clone) + info->ModeReg.crtc2_offset = Base; + else + info->ModeReg.crtc_offset = Base; } void RADEONAdjustFrame(int scrnIndex, int x, int y, int flags) |