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authorChristopher James Halse Rogers <raof@ubuntu.com>2013-09-23 12:25:29 -0700
committerAlex Deucher <alexander.deucher@amd.com>2013-10-01 15:26:29 -0400
commitf1dc677e79cd7a88d7379a934ebc7d87a3b18805 (patch)
tree63bacb465cbc76a698042b22a5be1047208f125a /src/radeon_drm.h
parent67fb82a3f0759b171fea21b475a70fa825693570 (diff)
EXA/evergreen: Paranoia around linear tiling. (v2)
The last two bytes of tiling_mode contain the actual tiling mode; the rest are extra tiling configuration bits. These configuration bits are not necessarily zero for a linear buffer, so mask them out before checking for linearity v2: Also fix up evergreen_textured_videofuncs.c agd5f: remove trailing whitespace Signed-off-by: Christopher James Halse Rogers <raof@ubuntu.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'src/radeon_drm.h')
-rw-r--r--src/radeon_drm.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/radeon_drm.h b/src/radeon_drm.h
index 042e8222..2bbd8fa3 100644
--- a/src/radeon_drm.h
+++ b/src/radeon_drm.h
@@ -800,6 +800,8 @@ struct drm_radeon_gem_create {
uint32_t flags;
};
+#define RADEON_TILING_MASK 0xff
+#define RADEON_TILING_LINEAR 0x0
#define RADEON_TILING_MACRO 0x1
#define RADEON_TILING_MICRO 0x2
#define RADEON_TILING_SWAP_16BIT 0x4