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authorMichel Dänzer <daenzer@vmware.com>2010-02-15 16:44:39 +0100
committerMichel Dänzer <michel@daenzer.net>2010-02-15 17:10:06 +0100
commit47136fa347d1756523239746b4c74cd5278a1118 (patch)
tree1795f1cb4a30f555e3c5bd368d24f365886c36d6 /src/radeon_exa_render.c
parent6e95905f759b844373be62ec513c78153ed00222 (diff)
EXA: Fix order of coordinates passed to radeon_pick_best_crtc().
The wrong order prevented tearing avoidance from working with EXA/DRI2.
Diffstat (limited to 'src/radeon_exa_render.c')
-rw-r--r--src/radeon_exa_render.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/radeon_exa_render.c b/src/radeon_exa_render.c
index 7f350fb6..15f4326f 100644
--- a/src/radeon_exa_render.c
+++ b/src/radeon_exa_render.c
@@ -2256,7 +2256,7 @@ static void FUNC_NAME(RadeonCompositeTile)(ScrnInfoPtr pScrn,
if (info->accel_state->vsync)
FUNC_NAME(RADEONWaitForVLine)(pScrn, pDst,
- radeon_pick_best_crtc(pScrn, dstX, dstY, dstX + w, dstY + h),
+ radeon_pick_best_crtc(pScrn, dstX, dstX + w, dstY, dstY + h),
dstY, dstY + h);
#ifdef ACCEL_CP