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authorAlex Deucher <alexdeucher@gmail.com>2008-12-17 00:56:19 -0500
committerAlex Deucher <alexdeucher@gmail.com>2008-12-17 01:02:44 -0500
commit3754cc23abac99880eda87d06aa42e16081b6c8a (patch)
tree7fc5a0fc3ce0e670fc17144a25e0cb8457c31301 /src/radeon_exa_render.c
parente3b08cb59716b525b3063b184eab70e32b9d66f0 (diff)
R2xx: switch EXA composite to rects rather quads
For conistency with Xv path and to reduce potential diagonal tearing
Diffstat (limited to 'src/radeon_exa_render.c')
-rw-r--r--src/radeon_exa_render.c29
1 files changed, 17 insertions, 12 deletions
diff --git a/src/radeon_exa_render.c b/src/radeon_exa_render.c
index b5f01970..55e55beb 100644
--- a/src/radeon_exa_render.c
+++ b/src/radeon_exa_render.c
@@ -2016,41 +2016,46 @@ static void FUNC_NAME(RadeonCompositeTile)(PixmapPtr pDst,
RADEON_CP_VC_CNTL_MAOS_ENABLE |
RADEON_CP_VC_CNTL_VTX_FMT_RADEON_MODE |
(3 << RADEON_CP_VC_CNTL_NUM_SHIFT));
- } else {
- if (IS_R300_3D || IS_R500_3D)
- BEGIN_RING(4 * vtx_count + 4);
- else
- BEGIN_RING(4 * vtx_count + 2);
-
+ } else if (IS_R300_3D || IS_R500_3D) {
+ BEGIN_RING(4 * vtx_count + 4);
OUT_RING(CP_PACKET3(R200_CP_PACKET3_3D_DRAW_IMMD_2,
4 * vtx_count));
OUT_RING(RADEON_CP_VC_CNTL_PRIM_TYPE_QUAD_LIST |
RADEON_CP_VC_CNTL_PRIM_WALK_RING |
(4 << RADEON_CP_VC_CNTL_NUM_SHIFT));
+ } else {
+ BEGIN_RING(3 * vtx_count + 2);
+ OUT_RING(CP_PACKET3(R200_CP_PACKET3_3D_DRAW_IMMD_2,
+ 3 * vtx_count));
+ OUT_RING(RADEON_CP_VC_CNTL_PRIM_TYPE_RECT_LIST |
+ RADEON_CP_VC_CNTL_PRIM_WALK_RING |
+ (3 << RADEON_CP_VC_CNTL_NUM_SHIFT));
}
#else /* ACCEL_CP */
if (IS_R300_3D || IS_R500_3D)
BEGIN_ACCEL(2 + vtx_count * 4);
- else if (info->ChipFamily < CHIP_FAMILY_R200)
- BEGIN_ACCEL(1 + vtx_count * 3);
else
- BEGIN_ACCEL(1 + vtx_count * 4);
+ BEGIN_ACCEL(1 + vtx_count * 3);
if (info->ChipFamily < CHIP_FAMILY_R200)
OUT_ACCEL_REG(RADEON_SE_VF_CNTL, (RADEON_VF_PRIM_TYPE_RECTANGLE_LIST |
RADEON_VF_PRIM_WALK_DATA |
RADEON_VF_RADEON_MODE |
(3 << RADEON_VF_NUM_VERTICES_SHIFT)));
- else
+ else if (IS_R300_3D || IS_R500_3D)
OUT_ACCEL_REG(RADEON_SE_VF_CNTL, (RADEON_VF_PRIM_TYPE_QUAD_LIST |
RADEON_VF_PRIM_WALK_DATA |
(4 << RADEON_VF_NUM_VERTICES_SHIFT)));
+ else
+ OUT_ACCEL_REG(RADEON_SE_VF_CNTL, (RADEON_VF_PRIM_TYPE_RECTANGLE_LIST |
+ RADEON_VF_PRIM_WALK_DATA |
+ (3 << RADEON_VF_NUM_VERTICES_SHIFT)));
#endif
if (info->accel_state->has_mask) {
- if (info->ChipFamily >= CHIP_FAMILY_R200) {
+ if (IS_R300_3D || IS_R500_3D) {
VTX_OUT_MASK((float)dstX, (float)dstY,
xFixedToFloat(srcTopLeft.x) / info->accel_state->texW[0], xFixedToFloat(srcTopLeft.y) / info->accel_state->texH[0],
xFixedToFloat(maskTopLeft.x) / info->accel_state->texW[1], xFixedToFloat(maskTopLeft.y) / info->accel_state->texH[1]);
@@ -2065,7 +2070,7 @@ static void FUNC_NAME(RadeonCompositeTile)(PixmapPtr pDst,
xFixedToFloat(srcTopRight.x) / info->accel_state->texW[0], xFixedToFloat(srcTopRight.y) / info->accel_state->texH[0],
xFixedToFloat(maskTopRight.x) / info->accel_state->texW[1], xFixedToFloat(maskTopRight.y) / info->accel_state->texH[1]);
} else {
- if (info->ChipFamily >= CHIP_FAMILY_R200) {
+ if (IS_R300_3D || IS_R500_3D) {
VTX_OUT((float)dstX, (float)dstY,
xFixedToFloat(srcTopLeft.x) / info->accel_state->texW[0], xFixedToFloat(srcTopLeft.y) / info->accel_state->texH[0]);
}