diff options
| author | Alex Deucher <alex@botch2.com> | 2008-04-10 13:59:58 -0400 |
|---|---|---|
| committer | Alex Deucher <alex@botch2.com> | 2008-04-10 13:59:58 -0400 |
| commit | d79040906cd25bd494feb5901f465bbd050aa923 (patch) | |
| tree | 6b46da5442791a01915f0dffa099188e53be5b3d /src/radeon_exa_render.c | |
| parent | 0a96173cc38e506728d4c3f2dd383ba56e856578 (diff) | |
R3xx+: EXA/textured video fixes
- get pipe config based on GB_PIPE_SELECT where applicable
(adapted from a similar patch from Dave)
- only flush the dst cache after submitting vertices, freeing
the cache lines stalls the pipe
- no need to wait for 3D idle after submitting vertices
- fix PURGE_CACHE() and PURGE_ZCACHE() for r3xx+
- fix depth 16 with EXA composite
Diffstat (limited to 'src/radeon_exa_render.c')
| -rw-r--r-- | src/radeon_exa_render.c | 37 |
1 files changed, 8 insertions, 29 deletions
diff --git a/src/radeon_exa_render.c b/src/radeon_exa_render.c index a97b752c..cd0fa488 100644 --- a/src/radeon_exa_render.c +++ b/src/radeon_exa_render.c @@ -1220,16 +1220,6 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture, R300_OUT_FMT_C2_SEL_BLUE | R300_OUT_FMT_C3_SEL_ALPHA); break; - case PICT_a1r5g5b5: - case PICT_x1r5g5b5: - /* fix me */ - case PICT_r5g6b5: - output_fmt = (R300_OUT_FMT_C_5_6_5 | - R300_OUT_FMT_C0_SEL_BLUE | - R300_OUT_FMT_C1_SEL_GREEN | - R300_OUT_FMT_C2_SEL_RED | - R300_OUT_FMT_C3_SEL_ALPHA); - break; case PICT_a8: output_fmt = (R300_OUT_FMT_C4_8 | R300_OUT_FMT_C0_SEL_ALPHA); @@ -1490,16 +1480,6 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture, R300_OUT_FMT_C2_SEL_BLUE | R300_OUT_FMT_C3_SEL_ALPHA); break; - case PICT_a1r5g5b5: - case PICT_x1r5g5b5: - /* fix me */ - case PICT_r5g6b5: - output_fmt = (R300_OUT_FMT_C_5_6_5 | - R300_OUT_FMT_C0_SEL_BLUE | - R300_OUT_FMT_C1_SEL_GREEN | - R300_OUT_FMT_C2_SEL_RED | - R300_OUT_FMT_C3_SEL_ALPHA); - break; case PICT_a8: output_fmt = (R300_OUT_FMT_C4_8 | R300_OUT_FMT_C0_SEL_ALPHA); @@ -1825,7 +1805,7 @@ static void FUNC_NAME(RadeonComposite)(PixmapPtr pDst, vtx_count = VTX_COUNT; - if (IS_R300_VARIANT || IS_AVIVO_VARIANT) { + if (IS_R300_3D || IS_R500_3D) { BEGIN_ACCEL(1); OUT_ACCEL_REG(R300_VAP_VTX_SIZE, vtx_count); FINISH_ACCEL(); @@ -1845,8 +1825,8 @@ static void FUNC_NAME(RadeonComposite)(PixmapPtr pDst, RADEON_CP_VC_CNTL_VTX_FMT_RADEON_MODE | (4 << RADEON_CP_VC_CNTL_NUM_SHIFT)); } else { - if (IS_R300_VARIANT || IS_AVIVO_VARIANT) - BEGIN_RING(4 * vtx_count + 6); + if (IS_R300_3D || IS_R500_3D) + BEGIN_RING(4 * vtx_count + 4); else BEGIN_RING(4 * vtx_count + 2); @@ -1858,8 +1838,8 @@ static void FUNC_NAME(RadeonComposite)(PixmapPtr pDst, } #else /* ACCEL_CP */ - if (IS_R300_VARIANT || IS_AVIVO_VARIANT) - BEGIN_ACCEL(3 + vtx_count * 4); + if (IS_R300_3D || IS_R500_3D) + BEGIN_ACCEL(2 + vtx_count * 4); else BEGIN_ACCEL(1 + vtx_count * 4); @@ -1888,10 +1868,9 @@ static void FUNC_NAME(RadeonComposite)(PixmapPtr pDst, xFixedToFloat(srcTopRight.x) / info->texW[0], xFixedToFloat(srcTopRight.y) / info->texH[0], xFixedToFloat(maskTopRight.x) / info->texW[1], xFixedToFloat(maskTopRight.y) / info->texH[1]); - if (IS_R300_VARIANT || IS_AVIVO_VARIANT) { - OUT_ACCEL_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_DC_FLUSH_3D | R300_DC_FREE_3D); - OUT_ACCEL_REG(RADEON_WAIT_UNTIL, RADEON_WAIT_3D_IDLECLEAN); - } + if (IS_R300_3D || IS_R500_3D) + /* flushing is pipelined, free/finish is not */ + OUT_ACCEL_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_DC_FLUSH_3D); #ifdef ACCEL_CP ADVANCE_RING(); |