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authorMichel Dänzer <michel.daenzer@amd.com>2012-07-05 20:14:48 +0200
committerMichel Dänzer <michel@daenzer.net>2012-07-10 17:15:01 +0200
commitef8a404391036d8aa814dbda2407c789b8a64b92 (patch)
tree862e72e5eb0c4035553f1642590039ed0f0cc587 /src/radeon_glamor.c
parente9edd2f5002c642b59f028b3ec076d604ae8ce9d (diff)
Initial SI support.
Defaults to shadowfb. 3D acceleration is available with glamor. 2D acceleration is disabled until the radeonsi driver can handle glamor's shaders. v2: add chip flags (Alex Deucher) Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'src/radeon_glamor.c')
-rw-r--r--src/radeon_glamor.c88
1 files changed, 83 insertions, 5 deletions
diff --git a/src/radeon_glamor.c b/src/radeon_glamor.c
index 232332e3..714dde9e 100644
--- a/src/radeon_glamor.c
+++ b/src/radeon_glamor.c
@@ -135,18 +135,85 @@ radeon_glamor_create_textured_pixmap(PixmapPtr pixmap)
return FALSE;
}
+Bool radeon_glamor_pixmap_is_offscreen(PixmapPtr pixmap)
+{
+ struct radeon_pixmap *priv = radeon_get_pixmap_private(pixmap);
+ return priv && priv->bo;
+}
+
+Bool radeon_glamor_prepare_access(PixmapPtr pixmap, glamor_access_t access)
+{
+ ScrnInfoPtr scrn = xf86ScreenToScrn(pixmap->drawable.pScreen);
+ RADEONInfoPtr info = RADEONPTR(scrn);
+ struct radeon_bo *bo;
+ int ret;
+
+ if (access == GLAMOR_GPU_ACCESS_RW || access == GLAMOR_GPU_ACCESS_RO)
+ return info->ChipFamily < CHIP_FAMILY_TAHITI;
+
+ bo = radeon_get_pixmap_bo(pixmap);
+ if (bo) {
+ /* When falling back to swrast, flush all pending operations */
+ if (info->ChipFamily < CHIP_FAMILY_TAHITI)
+ radeon_glamor_flush(scrn);
+
+ ret = radeon_bo_map(bo, 1);
+ if (ret) {
+ xf86DrvMsg(scrn->scrnIndex, X_WARNING,
+ "%s: bo map (tiling_flags %d, access %d) failed: %s\n",
+ __FUNCTION__,
+ radeon_get_pixmap_private(pixmap)->tiling_flags,
+ access,
+ strerror(-ret));
+ return FALSE;
+ }
+
+ pixmap->devPrivate.ptr = bo->ptr;
+ }
+
+ return TRUE;
+}
+
+void
+radeon_glamor_finish_access(PixmapPtr pixmap, glamor_access_t access)
+{
+ struct radeon_bo *bo;
+
+ switch(access) {
+ case GLAMOR_GPU_ACCESS_RW:
+ case GLAMOR_GPU_ACCESS_RO:
+ break;
+ case GLAMOR_CPU_ACCESS_RO:
+ case GLAMOR_CPU_ACCESS_RW:
+ bo = radeon_get_pixmap_bo(pixmap);
+ if (bo) {
+ radeon_bo_unmap(bo);
+ pixmap->devPrivate.ptr = NULL;
+ }
+ break;
+ default:
+ ErrorF("Invalid access mode %d\n", access);
+ }
+
+ return;
+}
+
static PixmapPtr
radeon_glamor_create_pixmap(ScreenPtr screen, int w, int h, int depth,
unsigned usage)
{
ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
+ RADEONInfoPtr info = RADEONPTR(scrn);
struct radeon_pixmap *priv;
PixmapPtr pixmap, new_pixmap = NULL;
if (!(usage & RADEON_CREATE_PIXMAP_DRI2)) {
- pixmap = glamor_create_pixmap(screen, w, h, depth, usage);
- if (pixmap)
- return pixmap;
+ if (info->ChipFamily < CHIP_FAMILY_TAHITI) {
+ pixmap = glamor_create_pixmap(screen, w, h, depth, usage);
+ if (pixmap)
+ return pixmap;
+ } else
+ return fbCreatePixmap(screen, w, h, depth, usage);
}
if (w > 32767 || h > 32767)
@@ -230,9 +297,13 @@ Bool
radeon_glamor_init(ScreenPtr screen)
{
ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
+ RADEONInfoPtr info = RADEONPTR(scrn);
+ unsigned int glamor_init_flags = GLAMOR_INVERTED_Y_AXIS | GLAMOR_USE_EGL_SCREEN;
- if (!glamor_init(screen, GLAMOR_INVERTED_Y_AXIS | GLAMOR_USE_EGL_SCREEN |
- GLAMOR_USE_SCREEN | GLAMOR_USE_PICTURE_SCREEN)) {
+ if (info->ChipFamily < CHIP_FAMILY_TAHITI)
+ glamor_init_flags |= GLAMOR_USE_SCREEN | GLAMOR_USE_PICTURE_SCREEN;
+
+ if (!glamor_init(screen, glamor_init_flags)) {
xf86DrvMsg(scrn->scrnIndex, X_ERROR,
"Failed to initialize glamor.\n");
return FALSE;
@@ -251,6 +322,13 @@ radeon_glamor_init(ScreenPtr screen)
#endif
return FALSE;
+ if (!(glamor_init_flags & GLAMOR_USE_SCREEN) &&
+ !glamor_screen_init(screen)) {
+ xf86DrvMsg(scrn->scrnIndex, X_ERROR,
+ "GLAMOR initialization failed\n");
+ return FALSE;
+ }
+
screen->CreatePixmap = radeon_glamor_create_pixmap;
screen->DestroyPixmap = radeon_glamor_destroy_pixmap;