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authorAlex Deucher <alex@botch2.com>2008-05-30 11:19:03 -0400
committerAlex Deucher <alex@botch2.com>2008-05-30 11:19:03 -0400
commit8504c6b0e40477ee544ad7f5366d569bdc53d6f0 (patch)
tree2cf8c732f30f7a8c39eff5b8ab856d4eb779b7c1 /src/radeon_reg.h
parent7cb695a329a9b543ad61af08c2d7d6eaf56de35e (diff)
RADEON: update RADEONGetVRAMType() for newer chips
Diffstat (limited to 'src/radeon_reg.h')
-rw-r--r--src/radeon_reg.h19
1 files changed, 15 insertions, 4 deletions
diff --git a/src/radeon_reg.h b/src/radeon_reg.h
index b2d6fd18..08bf858f 100644
--- a/src/radeon_reg.h
+++ b/src/radeon_reg.h
@@ -1069,6 +1069,7 @@
#define RADEON_MEM_SDRAM_MODE_REG 0x0158
# define RADEON_SDRAM_MODE_MASK 0xffff0000
# define RADEON_B3MEM_RESET_MASK 0x6fffffff
+# define RADEON_MEM_CFG_TYPE_DDR (1 << 30)
#define RADEON_MEM_STR_CNTL 0x0150
# define RADEON_MEM_PWRUP_COMPL_A (1 << 0)
# define RADEON_MEM_PWRUP_COMPL_B (1 << 1)
@@ -3435,10 +3436,20 @@
#define RV515_MC_STATUS_IDLE (1<<4)
#define AVIVO_MC_DATA 0x0074
-#define RV515_MC_FB_LOCATION 0x1
-#define RV515_MC_AGP_LOCATION 0x2
-#define R520_MC_FB_LOCATION 0x4
-#define R520_MC_AGP_LOCATION 0x5
+#define RV515_MC_FB_LOCATION 0x1
+#define RV515_MC_AGP_LOCATION 0x2
+#define RV515_MC_CNTL 0x5
+# define RV515_MEM_NUM_CHANNELS_MASK 0x3
+#define R520_MC_FB_LOCATION 0x4
+#define R520_MC_AGP_LOCATION 0x5
+#define R520_MC_CNTL0 0x8
+# define R520_MEM_NUM_CHANNELS_MASK (0x3 << 24)
+# define R520_MEM_NUM_CHANNELS_SHIFT 24
+# define R520_MC_CHANNEL_SIZE (1 << 23)
+
+#define R600_RAMCFG 0x2408
+# define R600_CHANSIZE (1 << 7)
+# define R600_CHANSIZE_OVERRIDE (1 << 10)
#define AVIVO_HDP_FB_LOCATION 0x134