diff options
| author | Michel Dänzer <michel@tungstengraphics.com> | 2006-12-07 18:31:58 +0100 |
|---|---|---|
| committer | Michel Dänzer <michel@tungstengraphics.com> | 2006-12-07 18:31:58 +0100 |
| commit | 02be8c04a268eaa71bdfe891331758715fef4e71 (patch) | |
| tree | 4283259e5e92cf594ea6a0742cddf83a34abf772 /src/radeon_reg.h | |
| parent | be46f7b6f7a729695a0affe2328077666283af12 (diff) | |
radeon: Make cache flushing for R300 series less invasive.
Instead of calling the DRM CP idle ioctl, just emit the cache flush commands
into the CP stream.
Diffstat (limited to 'src/radeon_reg.h')
| -rw-r--r-- | src/radeon_reg.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/radeon_reg.h b/src/radeon_reg.h index 9503ddeb..a6bbe697 100644 --- a/src/radeon_reg.h +++ b/src/radeon_reg.h @@ -1280,6 +1280,9 @@ # define RADEON_RB2D_DC_BUSY (1 << 31) #define RADEON_RB2D_DSTCACHE_MODE 0x3428 +#define RADEON_RB3D_ZCACHE_MODE 0x3250 +#define RADEON_RB3D_ZCACHE_CTLSTAT 0x3254 +# define RADEON_RB3D_ZC_FLUSH_ALL 0x5 #define RADEON_RB3D_DSTCACHE_MODE 0x3258 # define RADEON_RB3D_DC_CACHE_ENABLE (0) # define RADEON_RB3D_DC_2D_CACHE_DISABLE (1) |