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| author | Alex Deucher <agd5f@yahoo.com> | 2005-06-30 01:40:17 +0000 |
|---|---|---|
| committer | Alex Deucher <agd5f@yahoo.com> | 2005-06-30 01:40:17 +0000 |
| commit | 85365b791542cab221c37c9b3b4593ea0c6c9e2d (patch) | |
| tree | 4ccb588a57ad3fe61c76ab6a0a45ee180f973ba2 /src/radeon_reg.h | |
| parent | 3ec99c9cd821aeacdd57a9bbc20c4e4ec4711790 (diff) | |
- add support for colortiling on r3/4xx hardware (disabled by default). In
order for pageflipping to work on r3/4xx we will need to update the the
sarea and drm so that the crtc1/2 xytiling regs get updated. Initially
worked out by Aapo Tahkola.
Diffstat (limited to 'src/radeon_reg.h')
| -rw-r--r-- | src/radeon_reg.h | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/src/radeon_reg.h b/src/radeon_reg.h index 5958c1cf..c4228e5b 100644 --- a/src/radeon_reg.h +++ b/src/radeon_reg.h @@ -350,11 +350,30 @@ #define RADEON_CRTC_OFFSET_CNTL 0x0228 # define RADEON_CRTC_TILE_LINE_SHIFT 0 # define RADEON_CRTC_TILE_LINE_RIGHT_SHIFT 4 +# define R300_CRTC_X_Y_MODE_EN_RIGHT (1 << 6) +# define R300_CRTC_MICRO_TILE_BUFFER_RIGHT_MASK (3 << 7) +# define R300_CRTC_MICRO_TILE_BUFFER_RIGHT_AUTO (0 << 7) +# define R300_CRTC_MICRO_TILE_BUFFER_RIGHT_SINGLE (1 << 7) +# define R300_CRTC_MICRO_TILE_BUFFER_RIGHT_DOUBLE (2 << 7) +# define R300_CRTC_MICRO_TILE_BUFFER_RIGHT_DIS (3 << 7) +# define R300_CRTC_X_Y_MODE_EN (1 << 9) +# define R300_CRTC_MICRO_TILE_BUFFER_MASK (3 << 10) +# define R300_CRTC_MICRO_TILE_BUFFER_AUTO (0 << 10) +# define R300_CRTC_MICRO_TILE_BUFFER_SINGLE (1 << 10) +# define R300_CRTC_MICRO_TILE_BUFFER_DOUBLE (2 << 10) +# define R300_CRTC_MICRO_TILE_BUFFER_DIS (3 << 10) +# define R300_CRTC_MICRO_TILE_EN_RIGHT (1 << 12) +# define R300_CRTC_MICRO_TILE_EN (1 << 13) +# define R300_CRTC_MACRO_TILE_EN_RIGHT (1 << 14) +# define R300_CRTC_MACRO_TILE_EN (1 << 15) # define RADEON_CRTC_TILE_EN_RIGHT (1 << 14) # define RADEON_CRTC_TILE_EN (1 << 15) # define RADEON_CRTC_OFFSET_FLIP_CNTL (1 << 16) # define RADEON_CRTC_STEREO_OFFSET_EN (1 << 17) +#define R300_CRTC_TILE_X0_Y0 0x0350 +#define R300_CRTC2_TILE_X0_Y0 0x0358 + #define RADEON_CRTC2_OFFSET_CNTL 0x0328 # define RADEON_CRTC2_TILE_EN (1 << 15) #define RADEON_CRTC_PITCH 0x022c |