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| author | Alex Deucher <alexdeucher@gmail.com> | 2009-03-31 17:13:11 -0400 |
|---|---|---|
| committer | Alex Deucher <alexdeucher@gmail.com> | 2009-04-15 11:45:52 -0400 |
| commit | adb099409768e695b9928fa6aa5760f93dadd9af (patch) | |
| tree | 4e62fb6e1c4a9d65cb37681400c7a2e64003a0ab /src/radeon_reg.h | |
| parent | 68e2a959ccc3d1a5d0731f1b55fdf1b2412635b2 (diff) | |
radeon: Add functions to set sclk/mclk on r1xx-r4xx
Diffstat (limited to 'src/radeon_reg.h')
| -rw-r--r-- | src/radeon_reg.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/radeon_reg.h b/src/radeon_reg.h index d74a30a4..e8af027f 100644 --- a/src/radeon_reg.h +++ b/src/radeon_reg.h @@ -288,6 +288,13 @@ # define RADEON_PLL_WR_EN (1 << 7) # define RADEON_PLL_DIV_SEL (3 << 8) # define RADEON_PLL2_DIV_SEL_MASK ~(3 << 8) +#define RADEON_M_SPLL_REF_FB_DIV 0x000a +# define RADEON_M_SPLL_REF_DIV_MASK 0xff +# define RADEON_M_SPLL_REF_DIV_SHIFT 0 +# define RADEON_MPLL_FB_DIV_MASK 0xff +# define RADEON_MPLL_FB_DIV_SHIFT 8 +# define RADEON_SPLL_FB_DIV_MASK 0xff +# define RADEON_SPLL_FB_DIV_SHIFT 16 #define RADEON_CLK_PWRMGT_CNTL 0x0014 # define RADEON_ENGIN_DYNCLK_MODE (1 << 12) # define RADEON_ACTIVE_HILO_LAT_MASK (3 << 13) |