summaryrefslogtreecommitdiff
path: root/src/radeon_textured_videofuncs.c
diff options
context:
space:
mode:
authorDennis Kasprzyk <onestone@opencompositing.org>2008-08-01 01:11:28 +0200
committerAlex Deucher <alexdeucher@gmail.com>2008-08-25 06:24:55 -0400
commit242aa4f630b4c60aefa3c12dc459a4d4d0b334a0 (patch)
treee7ea6c350a57747a720f3834bd962a9adc36fc22 /src/radeon_textured_videofuncs.c
parent413eacb0538977b0b3c92df074d40510f4539abc (diff)
Remove one constant.
Diffstat (limited to 'src/radeon_textured_videofuncs.c')
-rw-r--r--src/radeon_textured_videofuncs.c27
1 files changed, 11 insertions, 16 deletions
diff --git a/src/radeon_textured_videofuncs.c b/src/radeon_textured_videofuncs.c
index 59f569de..d9de5d06 100644
--- a/src/radeon_textured_videofuncs.c
+++ b/src/radeon_textured_videofuncs.c
@@ -427,7 +427,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
OUT_VIDEO_REG(R500_GA_US_VECTOR_INDEX, 0);
FINISH_VIDEO();
- BEGIN_VIDEO(93);
+ BEGIN_VIDEO(89);
/* Pixel shader.
* I've gone ahead and annotated each instruction, since this
* thing is MASSIVE. :3
@@ -497,7 +497,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
R500_ALPHA_ADDR1(2)));
OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGB_SEL_A_SRC0 |
R500_ALU_RGB_R_SWIZ_A_R |
- R500_ALU_RGB_G_SWIZ_A_G |
+ R500_ALU_RGB_G_SWIZ_A_0 |
R500_ALU_RGB_B_SWIZ_A_R |
R500_ALU_RGB_SEL_B_SRC1 |
R500_ALU_RGB_R_SWIZ_B_G |
@@ -506,7 +506,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDRD(4) |
R500_ALPHA_OP_MAD |
R500_ALPHA_SEL_A_SRC0 |
- R500_ALPHA_SWIZ_A_G |
+ R500_ALPHA_SWIZ_A_0 |
R500_ALPHA_SEL_B_SRC1 |
R500_ALPHA_SWIZ_B_R));
OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGBA_ADDRD(4) |
@@ -522,18 +522,18 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
R500_INST_RGB_WMASK_G |
R500_INST_RGB_WMASK_B |
R500_INST_ALPHA_WMASK));
- OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_RGB_ADDR0(1) |
+ OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_RGB_ADDR0(0) |
R500_RGB_ADDR0_CONST |
R500_RGB_ADDR1(1) |
R500_RGB_ADDR2(4)));
- OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDR0(1) |
+ OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDR0(0) |
R500_ALPHA_ADDR0_CONST |
R500_ALPHA_ADDR1(1) |
R500_ALPHA_ADDR2(4)));
OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGB_SEL_A_SRC0 |
- R500_ALU_RGB_R_SWIZ_A_R |
+ R500_ALU_RGB_R_SWIZ_A_0 |
R500_ALU_RGB_G_SWIZ_A_G |
- R500_ALU_RGB_B_SWIZ_A_R |
+ R500_ALU_RGB_B_SWIZ_A_0 |
R500_ALU_RGB_SEL_B_SRC1 |
R500_ALU_RGB_R_SWIZ_B_G |
R500_ALU_RGB_G_SWIZ_B_G |
@@ -558,18 +558,18 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
R500_INST_RGB_WMASK_G |
R500_INST_RGB_WMASK_B |
R500_INST_ALPHA_WMASK));
- OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_RGB_ADDR0(1) |
+ OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_RGB_ADDR0(0) |
R500_RGB_ADDR0_CONST |
R500_RGB_ADDR1(1) |
R500_RGB_ADDR2(4)));
- OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDR0(1) |
+ OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDR0(0) |
R500_ALPHA_ADDR0_CONST |
R500_ALPHA_ADDR1(1) |
R500_ALPHA_ADDR2(4)));
OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGB_SEL_A_SRC0 |
- R500_ALU_RGB_R_SWIZ_A_R |
+ R500_ALU_RGB_R_SWIZ_A_0 |
R500_ALU_RGB_G_SWIZ_A_G |
- R500_ALU_RGB_B_SWIZ_A_R |
+ R500_ALU_RGB_B_SWIZ_A_0 |
R500_ALU_RGB_SEL_B_SRC1 |
R500_ALU_RGB_R_SWIZ_B_R |
R500_ALU_RGB_G_SWIZ_B_R |
@@ -876,11 +876,6 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
/* const0 = {1 / texture[0].width, 0, 0, 0} */
OUT_VIDEO_REG_F(R500_GA_US_VECTOR_DATA, (1.0/(float)pPriv->w));
- OUT_VIDEO_REG_F(R500_GA_US_VECTOR_DATA, 0x0);
- OUT_VIDEO_REG_F(R500_GA_US_VECTOR_DATA, 0x0);
- OUT_VIDEO_REG_F(R500_GA_US_VECTOR_DATA, 0x0);
- /* const0 = {1 / texture[0].height, 0, 0, 0} */
- OUT_VIDEO_REG_F(R500_GA_US_VECTOR_DATA, 0x0);
OUT_VIDEO_REG_F(R500_GA_US_VECTOR_DATA, (1.0/(float)pPriv->h));
OUT_VIDEO_REG_F(R500_GA_US_VECTOR_DATA, 0x0);
OUT_VIDEO_REG_F(R500_GA_US_VECTOR_DATA, 0x0);