diff options
| author | Alex Deucher <alex@botch2.com> | 2008-04-10 13:59:58 -0400 |
|---|---|---|
| committer | Alex Deucher <alex@botch2.com> | 2008-04-10 13:59:58 -0400 |
| commit | d79040906cd25bd494feb5901f465bbd050aa923 (patch) | |
| tree | 6b46da5442791a01915f0dffa099188e53be5b3d /src/radeon_textured_videofuncs.c | |
| parent | 0a96173cc38e506728d4c3f2dd383ba56e856578 (diff) | |
R3xx+: EXA/textured video fixes
- get pipe config based on GB_PIPE_SELECT where applicable
(adapted from a similar patch from Dave)
- only flush the dst cache after submitting vertices, freeing
the cache lines stalls the pipe
- no need to wait for 3D idle after submitting vertices
- fix PURGE_CACHE() and PURGE_ZCACHE() for r3xx+
- fix depth 16 with EXA composite
Diffstat (limited to 'src/radeon_textured_videofuncs.c')
| -rw-r--r-- | src/radeon_textured_videofuncs.c | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/src/radeon_textured_videofuncs.c b/src/radeon_textured_videofuncs.c index 45dc0c93..e2db615d 100644 --- a/src/radeon_textured_videofuncs.c +++ b/src/radeon_textured_videofuncs.c @@ -589,7 +589,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv (4 << RADEON_CP_VC_CNTL_NUM_SHIFT)); } else { if (IS_R300_3D || IS_R500_3D) - BEGIN_RING(4 * VTX_DWORD_COUNT + 6); + BEGIN_RING(4 * VTX_DWORD_COUNT + 4); else BEGIN_RING(4 * VTX_DWORD_COUNT + 2); OUT_RING(CP_PACKET3(R200_CP_PACKET3_3D_DRAW_IMMD_2, @@ -600,7 +600,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv } #else /* ACCEL_CP */ if (IS_R300_3D || IS_R500_3D) - BEGIN_VIDEO(3 + VTX_DWORD_COUNT * 4); + BEGIN_VIDEO(2 + VTX_DWORD_COUNT * 4); else BEGIN_VIDEO(1 + VTX_DWORD_COUNT * 4); @@ -625,10 +625,9 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv VTX_OUT((float)(dstX + dstw), (float)dstY, xFixedToFloat(srcTopRight.x) / info->texW[0], xFixedToFloat(srcTopRight.y) / info->texH[0]); - if (IS_R300_3D || IS_R500_3D) { - OUT_VIDEO_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_DC_FLUSH_3D | R300_DC_FREE_3D); - OUT_VIDEO_REG(RADEON_WAIT_UNTIL, RADEON_WAIT_3D_IDLECLEAN); - } + if (IS_R300_3D || IS_R500_3D) + /* flushing is pipelined, free/finish is not */ + OUT_VIDEO_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_DC_FLUSH_3D); #ifdef ACCEL_CP ADVANCE_RING(); |