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authorAlex Deucher <alexdeucher@gmail.com>2011-05-04 01:13:55 -0400
committerAlex Deucher <alexdeucher@gmail.com>2011-05-04 01:13:55 -0400
commit62a4cd180fe884dca24586d453395472516e6496 (patch)
treec22825dff09917f43025fcf18f1215cd74bfb7e1 /src
parent76638ca687b02d3b1494b9868f817fd4fd892c64 (diff)
fusion: fix tiling enable logic
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Diffstat (limited to 'src')
-rw-r--r--src/radeon_kms.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/src/radeon_kms.c b/src/radeon_kms.c
index 459ca683..aac17e2d 100644
--- a/src/radeon_kms.c
+++ b/src/radeon_kms.c
@@ -670,18 +670,18 @@ Bool RADEONPreInit_KMS(ScrnInfoPtr pScrn, int flags)
info->group_bytes = 256;
info->have_tiling_info = FALSE;
if (info->dri->pKernelDRMVersion->version_minor >= 6) {
- if (r600_get_tile_config(pScrn))
+ if (r600_get_tile_config(pScrn)) {
info->allowColorTiling = xf86ReturnOptValBool(info->Options,
OPTION_COLOR_TILING, colorTilingDefault);
- else
+ /* need working DFS for tiling */
+ if ((info->ChipFamily == CHIP_FAMILY_PALM) &&
+ (!info->accel_state->allowHWDFS))
+ info->allowColorTiling = FALSE;
+ } else
info->allowColorTiling = FALSE;
} else
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"R6xx+ KMS Color Tiling requires radeon drm 2.6.0 or newer\n");
-
- /* need working DFS for tiling */
- if (info->ChipFamily == CHIP_FAMILY_PALM)
- info->allowColorTiling = info->accel_state->allowHWDFS;
} else
info->allowColorTiling = xf86ReturnOptValBool(info->Options,
OPTION_COLOR_TILING, colorTilingDefault);