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authorAlex Deucher <agd5f@yahoo.com>2004-12-12 02:00:48 +0000
committerAlex Deucher <agd5f@yahoo.com>2004-12-12 02:00:48 +0000
commit68ea67ce98b8f3ad4c17f987e0e2b92f79a96fbf (patch)
tree1b1b7cbc3404f5fb58eed98cb543e09eafd0e019 /src
parent93675d288d5ebb35d4724ebbfc455a703e25a311 (diff)
- add AGP 8x support (Hui Yu, Michel Daenzer) bug 1819
Diffstat (limited to 'src')
-rw-r--r--src/radeon_dri.h2
-rw-r--r--src/radeon_driver.c13
-rw-r--r--src/radeon_reg.h3
3 files changed, 14 insertions, 4 deletions
diff --git a/src/radeon_dri.h b/src/radeon_dri.h
index 4453fe6f..9316d75e 100644
--- a/src/radeon_dri.h
+++ b/src/radeon_dri.h
@@ -54,7 +54,7 @@
#define RADEON_DEFAULT_CP_TIMEOUT 10000 /* usecs */
-#define RADEON_AGP_MAX_MODE 4
+#define RADEON_AGP_MAX_MODE 8
#define RADEON_CARD_TYPE_RADEON 1
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index d70ccd7e..faed1523 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -3944,11 +3944,18 @@ static Bool RADEONPreInitDRI(ScrnInfoPtr pScrn)
OPTION_AGP_MODE, &(info->agpMode))) {
if (info->agpMode < 1 || info->agpMode > RADEON_AGP_MAX_MODE) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "Illegal AGP Mode: %d\n", info->agpMode);
- return FALSE;
+ "Illegal AGP Mode: %dx, set to default %dx mode\n",
+ info->agpMode, RADEON_DEFAULT_AGP_MODE);
+ info->agpMode = RADEON_DEFAULT_AGP_MODE;
}
+
+ /* AGP_MAX_MODE is changed to allow v3 8x mode.
+ * At this time we don't know if the AGP bridge supports
+ * 8x mode. This will later be verified on both
+ * AGP master and target sides.
+ */
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
- "Using AGP %dx mode\n", info->agpMode);
+ "AGP %dx mode is configured\n", info->agpMode);
}
if ((info->agpFastWrite = xf86ReturnOptValBool(info->Options,
diff --git a/src/radeon_reg.h b/src/radeon_reg.h
index f6cf3bfd..28a3daea 100644
--- a/src/radeon_reg.h
+++ b/src/radeon_reg.h
@@ -81,6 +81,9 @@
# define RADEON_AGP_4X_MODE 0x04
# define RADEON_AGP_FW_MODE 0x10
# define RADEON_AGP_MODE_MASK 0x17
+# define RADEON_AGPv3_MODE 0x08
+# define RADEON_AGPv3_4X_MODE 0x01
+# define RADEON_AGPv3_8X_MODE 0x02
#define RADEON_ATTRDR 0x03c1 /* VGA */
#define RADEON_ATTRDW 0x03c0 /* VGA */
#define RADEON_ATTRX 0x03c0 /* VGA */