diff options
author | Alex Deucher <alexdeucher@gmail.com> | 2010-06-10 13:34:59 -0400 |
---|---|---|
committer | Alex Deucher <alexdeucher@gmail.com> | 2010-08-02 13:31:03 -0400 |
commit | 8eba977cab1878ba247da8160771d41194d8014f (patch) | |
tree | 7045dfb393261d01d91ea1683c1111116bd93553 /src | |
parent | 71c1a2704af23b61439cee5ce784f7fe267a8a26 (diff) |
EXA: move more common helpers to exa_shared
Diffstat (limited to 'src')
-rw-r--r-- | src/r600_exa.c | 61 | ||||
-rw-r--r-- | src/radeon_exa_shared.c | 54 | ||||
-rw-r--r-- | src/radeon_exa_shared.h | 3 |
3 files changed, 59 insertions, 59 deletions
diff --git a/src/r600_exa.c b/src/r600_exa.c index b16c40f1..78b0ed20 100644 --- a/src/r600_exa.c +++ b/src/r600_exa.c @@ -62,57 +62,6 @@ uint32_t RADEON_ROP[16] = { RADEON_ROP3_ONE, /* GXset */ }; - -static Bool R600ValidPM(uint32_t pm, int bpp) -{ - uint8_t r, g, b, a; - Bool ret = FALSE; - - switch (bpp) { - case 8: - a = pm & 0xff; - if ((a == 0) || (a == 0xff)) - ret = TRUE; - break; - case 16: - r = (pm >> 11) & 0x1f; - g = (pm >> 5) & 0x3f; - b = (pm >> 0) & 0x1f; - if (((r == 0) || (r == 0x1f)) && - ((g == 0) || (g == 0x3f)) && - ((b == 0) || (b == 0x1f))) - ret = TRUE; - break; - case 32: - a = (pm >> 24) & 0xff; - r = (pm >> 16) & 0xff; - g = (pm >> 8) & 0xff; - b = (pm >> 0) & 0xff; - if (((a == 0) || (a == 0xff)) && - ((r == 0) || (r == 0xff)) && - ((g == 0) || (g == 0xff)) && - ((b == 0) || (b == 0xff))) - ret = TRUE; - break; - default: - break; - } - return ret; -} - -static Bool R600CheckBPP(int bpp) -{ - switch (bpp) { - case 8: - case 16: - case 32: - return TRUE; - default: - break; - } - return FALSE; -} - Bool R600SetAccelState(ScrnInfoPtr pScrn, struct r600_accel_object *src0, @@ -225,9 +174,9 @@ R600PrepareSolid(PixmapPtr pPix, int alu, Pixel pm, Pixel fg) float ps_alu_consts[4]; struct r600_accel_object dst; - if (!R600CheckBPP(pPix->drawable.bitsPerPixel)) + if (!RADEONCheckBPP(pPix->drawable.bitsPerPixel)) RADEON_FALLBACK(("R600CheckDatatype failed\n")); - if (!R600ValidPM(pm, pPix->drawable.bitsPerPixel)) + if (!RADEONValidPM(pm, pPix->drawable.bitsPerPixel)) RADEON_FALLBACK(("invalid planemask\n")); #if defined(XF86DRM_MODE) @@ -641,11 +590,11 @@ R600PrepareCopy(PixmapPtr pSrc, PixmapPtr pDst, struct radeon_accel_state *accel_state = info->accel_state; struct r600_accel_object src_obj, dst_obj; - if (!R600CheckBPP(pSrc->drawable.bitsPerPixel)) + if (!RADEONCheckBPP(pSrc->drawable.bitsPerPixel)) RADEON_FALLBACK(("R600CheckDatatype src failed\n")); - if (!R600CheckBPP(pDst->drawable.bitsPerPixel)) + if (!RADEONCheckBPP(pDst->drawable.bitsPerPixel)) RADEON_FALLBACK(("R600CheckDatatype dst failed\n")); - if (!R600ValidPM(planemask, pDst->drawable.bitsPerPixel)) + if (!RADEONValidPM(planemask, pDst->drawable.bitsPerPixel)) RADEON_FALLBACK(("Invalid planemask\n")); dst_obj.pitch = exaGetPixmapPitch(pDst) / (pDst->drawable.bitsPerPixel / 8); diff --git a/src/radeon_exa_shared.c b/src/radeon_exa_shared.c index 5ba0b67f..94ebe355 100644 --- a/src/radeon_exa_shared.c +++ b/src/radeon_exa_shared.c @@ -76,6 +76,56 @@ void RADEONVlineHelperSet(ScrnInfoPtr pScrn, int x1, int y1, int x2, int y2) accel_state->vline_y2 = y2; } +Bool RADEONValidPM(uint32_t pm, int bpp) +{ + uint8_t r, g, b, a; + Bool ret = FALSE; + + switch (bpp) { + case 8: + a = pm & 0xff; + if ((a == 0) || (a == 0xff)) + ret = TRUE; + break; + case 16: + r = (pm >> 11) & 0x1f; + g = (pm >> 5) & 0x3f; + b = (pm >> 0) & 0x1f; + if (((r == 0) || (r == 0x1f)) && + ((g == 0) || (g == 0x3f)) && + ((b == 0) || (b == 0x1f))) + ret = TRUE; + break; + case 32: + a = (pm >> 24) & 0xff; + r = (pm >> 16) & 0xff; + g = (pm >> 8) & 0xff; + b = (pm >> 0) & 0xff; + if (((a == 0) || (a == 0xff)) && + ((r == 0) || (r == 0xff)) && + ((g == 0) || (g == 0xff)) && + ((b == 0) || (b == 0xff))) + ret = TRUE; + break; + default: + break; + } + return ret; +} + +Bool RADEONCheckBPP(int bpp) +{ + switch (bpp) { + case 8: + case 16: + case 32: + return TRUE; + default: + break; + } + return FALSE; +} + static Bool radeon_vb_get(ScrnInfoPtr pScrn) { RADEONInfoPtr info = RADEONPTR(pScrn); @@ -133,7 +183,7 @@ void radeon_vb_no_space(ScrnInfoPtr pScrn, int vert_size) accel_state->finish_op(pScrn, vert_size); accel_state->ib_reset_op = info->cs->cdw; } - + /* release the current VBO */ radeon_vbo_put(pScrn); } @@ -180,5 +230,5 @@ void radeon_ib_discard(ScrnInfoPtr pScrn) info->accel_state->XInited3D = FALSE; info->accel_state->engineMode = EXA_ENGINEMODE_UNKNOWN; } - + } diff --git a/src/radeon_exa_shared.h b/src/radeon_exa_shared.h index 286886d3..ca479693 100644 --- a/src/radeon_exa_shared.h +++ b/src/radeon_exa_shared.h @@ -38,7 +38,8 @@ extern PixmapPtr RADEONGetDrawablePixmap(DrawablePtr pDrawable); extern void RADEONVlineHelperClear(ScrnInfoPtr pScrn); extern void RADEONVlineHelperSet(ScrnInfoPtr pScrn, int x1, int y1, int x2, int y2); - +extern Bool RADEONValidPM(uint32_t pm, int bpp); +extern Bool RADEONCheckBPP(int bpp); #define RADEON_TRACE_FALL 0 #define RADEON_TRACE_DRAW 0 |