diff options
| author | Roland Scheidegger <sroland@tungstengraphics.com> | 2007-11-22 02:37:55 +0100 |
|---|---|---|
| committer | Roland Scheidegger <sroland@tungstengraphics.com> | 2007-11-22 02:37:55 +0100 |
| commit | e810c3ae9908cd57e95b1b091cded87cbfc12fdc (patch) | |
| tree | 5f763f62460e1f8daea21fd610e74d1a75a2ac3d /src | |
| parent | c8872603454e6a4ffed9fc7d9adc2c364a429608 (diff) | |
really do not set up surface regs for depth buf on r100-class igps (bug #13080)
fix the if condition testing for these chips...
Diffstat (limited to 'src')
| -rw-r--r-- | src/radeon_driver.c | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/src/radeon_driver.c b/src/radeon_driver.c index 790a3dc1..c55b5a5c 100644 --- a/src/radeon_driver.c +++ b/src/radeon_driver.c @@ -4700,9 +4700,9 @@ void RADEONChangeSurfaces(ScrnInfoPtr pScrn) retvalue = drmCommandWrite(info->drmFD, DRM_RADEON_SURF_FREE, &drmsurffree, sizeof(drmsurffree)); - if ((info->ChipFamily != CHIP_FAMILY_RV100) || - (info->ChipFamily != CHIP_FAMILY_RS100) || - (info->ChipFamily != CHIP_FAMILY_RS200)) { + if (!((info->ChipFamily == CHIP_FAMILY_RV100) || + (info->ChipFamily == CHIP_FAMILY_RS100) || + (info->ChipFamily == CHIP_FAMILY_RS200))) { drmsurffree.address = info->depthOffset; retvalue = drmCommandWrite(info->drmFD, DRM_RADEON_SURF_FREE, &drmsurffree, sizeof(drmsurffree)); @@ -4757,9 +4757,10 @@ void RADEONChangeSurfaces(ScrnInfoPtr pScrn) } /* rv100 and probably the derivative igps don't have depth tiling on all the time? */ - if (info->have3DWindows && ((info->ChipFamily != CHIP_FAMILY_RV100) || - (info->ChipFamily != CHIP_FAMILY_RS100) || - (info->ChipFamily != CHIP_FAMILY_RS200))) { + if (info->have3DWindows && + (!((info->ChipFamily == CHIP_FAMILY_RV100) || + (info->ChipFamily == CHIP_FAMILY_RS100) || + (info->ChipFamily == CHIP_FAMILY_RS200)))) { drmRadeonSurfaceAlloc drmsurfalloc; drmsurfalloc.size = depthBufferSize; drmsurfalloc.address = info->depthOffset; |