radeon: Default to leaving AGP transfer mode and fast writes unchanged.

Based on the assumption that firmware should have set up the card and host
bridge appropriately for these settings, this may actually be safer, at least
for the transfer rate; leaving fast writes enabled is hopefully safe as well,
it certainly is on my sytem.

See https://bugs.freedesktop.org/show_bug.cgi?id=9284 .

3 files changed, 52 insertions, 54 deletions

diff --git a/src/radeon_dri.c b/src/radeon_dri.c
index e2238252..35e41545 100644
--- a/src/radeon_dri.c
+++ b/src/radeon_dri.c
@@ -723,10 +723,60 @@ static Bool RADEONSetAgpMode(RADEONInfoPtr info, ScreenPtr pScreen)
     unsigned long mode   = drmAgpGetMode(info->drmFD);	/* Default mode */
     unsigned int  vendor = drmAgpVendorId(info->drmFD);
     unsigned int  device = drmAgpDeviceId(info->drmFD);
+    CARD32 agp_status = INREG(RADEON_AGP_STATUS) & mode;
+    Bool is_v3 = (agp_status & RADEON_AGPv3_MODE);
+    unsigned int defaultMode;
+    MessageType from;
+
+    if (is_v3) {
+	defaultMode = (agp_status & RADEON_AGPv3_8X_MODE) ? 8 : 4;
+    } else {
+	if (agp_status & RADEON_AGP_4X_MODE) defaultMode = 4;
+	else if (agp_status & RADEON_AGP_2X_MODE) defaultMode = 2;
+	else defaultMode = 1;
+    }
+
+    from = X_DEFAULT;
+
+    if (xf86GetOptValInteger(info->Options, OPTION_AGP_MODE, &info->agpMode)) {
+	if (info->agpMode < is_v3 ? 4 : 1 || info->agpMode > is_v3 ? 8 : 4 ||
+	    info->agpMode & (info->agpMode - 1)) {
+	    xf86DrvMsg(pScreen->myNum, X_ERROR,
+		       "Illegal AGP Mode: %d (valid values: %s), leaving at "
+		       "%dx\n", info->agpMode, is_v3 ? "4, 8" : "1, 2, 4",
+		       defaultMode);
+	    info->agpMode = defaultMode;
+	} else
+	    from = X_CONFIG;
+    } else
+	info->agpMode = defaultMode;
+
+    xf86DrvMsg(pScreen->myNum, from, "Using AGP %dx\n", info->agpMode);
+
+    info->agpFastWrite = (agp_status & RADEON_AGP_FW_MODE);
+
+    from = xf86GetOptValInteger(info->Options, OPTION_AGP_FW,
+				&info->agpFastWrite) ? X_CONFIG : X_DEFAULT;
+
+    if (info->agpFastWrite &&
+	(vendor == PCI_VENDOR_AMD) &&
+	(device == PCI_CHIP_AMD761)) {
+
+	/* Disable fast write for AMD 761 chipset, since they cause
+	 * lockups when enabled.
+	 */
+	info->agpFastWrite = FALSE;
+	from = X_DEFAULT;
+	xf86DrvMsg(pScreen->myNum, X_WARNING,
+		   "[agp] Not enabling Fast Writes on AMD 761 chipset to avoid "
+		   "lockups");
+    }
+
+    xf86DrvMsg(pScreen->myNum, from, "AGP Fast Writes %sabled\n",
+	       info->agpFastWrite ? "en" : "dis");
 
     mode &= ~RADEON_AGP_MODE_MASK;
-    if ((mode & RADEON_AGPv3_MODE) &&
-	(INREG(RADEON_AGP_STATUS) & RADEON_AGPv3_MODE)) {
+    if (is_v3) {
 	/* only set one mode bit for AGPv3 */
 	switch (info->agpMode) {
 	case 8:          mode |= RADEON_AGPv3_8X_MODE; break;
@@ -743,19 +793,6 @@ static Bool RADEONSetAgpMode(RADEONInfoPtr info, ScreenPtr pScreen)
 	}
     }
 
-    if (info->agpFastWrite &&
-	(vendor == PCI_VENDOR_AMD) &&
-	(device == PCI_CHIP_AMD761)) {
-
-	/* Disable fast write for AMD 761 chipset, since they cause
-	 * lockups when enabled.
-	 */
-	info->agpFastWrite = FALSE;
-	xf86DrvMsg(pScreen->myNum, X_WARNING,
-		   "[agp] Not enabling Fast Writes on AMD 761 chipset to avoid "
-		   "lockups");
-    }
-
     if (info->agpFastWrite) mode |= RADEON_AGP_FW_MODE;
 
     xf86DrvMsg(pScreen->myNum, X_INFO,
diff --git a/src/radeon_dri.h b/src/radeon_dri.h
index b4788ca9..6fa7e35d 100644
--- a/src/radeon_dri.h
+++ b/src/radeon_dri.h
@@ -41,11 +41,6 @@
 /* DRI Driver defaults */
 #define RADEON_DEFAULT_CP_PIO_MODE    RADEON_CSQ_PRIPIO_INDPIO
 #define RADEON_DEFAULT_CP_BM_MODE     RADEON_CSQ_PRIBM_INDBM
-/* Default to AGP 4x mode for IGP chips, there are some problems with 1x and 2x
- * modes on AGP master side
- */
-#define RADEON_DEFAULT_AGP_MODE       (info->IsIGP ? 4 : 1)
-#define RADEON_DEFAULT_AGP_FAST_WRITE 0
 #define RADEON_DEFAULT_GART_SIZE      8 /* MB (must be 2^n and > 4MB) */
 #define RADEON_DEFAULT_RING_SIZE      1 /* MB (must be page aligned) */
 #define RADEON_DEFAULT_BUFFER_SIZE    2 /* MB (must be page aligned) */
@@ -55,8 +50,6 @@
 
 #define RADEON_PCIGART_TABLE_SIZE     32768
 
-#define RADEON_AGP_MAX_MODE           8
-
 #define RADEON_CARD_TYPE_RADEON       1
 
 #define RADEONCP_USE_RING_BUFFER(m)					\
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index ab19b222..87d60e88 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -2552,45 +2552,13 @@ static Bool RADEONPreInitDRI(ScrnInfoPtr pScrn)
 	info->CPMode = RADEON_DEFAULT_CP_BM_MODE;
     }
 
-    info->agpMode       = RADEON_DEFAULT_AGP_MODE;
     info->gartSize      = RADEON_DEFAULT_GART_SIZE;
     info->ringSize      = RADEON_DEFAULT_RING_SIZE;
     info->bufSize       = RADEON_DEFAULT_BUFFER_SIZE;
     info->gartTexSize   = RADEON_DEFAULT_GART_TEX_SIZE;
-    info->agpFastWrite  = RADEON_DEFAULT_AGP_FAST_WRITE;
 
     info->CPusecTimeout = RADEON_DEFAULT_CP_TIMEOUT;
 
-    if (info->cardType==CARD_AGP) {
-	if (xf86GetOptValInteger(info->Options,
-				 OPTION_AGP_MODE, &(info->agpMode))) {
-	    if (info->agpMode < 1 || info->agpMode > RADEON_AGP_MAX_MODE) {
-		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-			   "Illegal AGP Mode: %dx, set to default %dx mode\n",
-			   info->agpMode, RADEON_DEFAULT_AGP_MODE);
-		info->agpMode = RADEON_DEFAULT_AGP_MODE;
-	    }
-
-	    /* AGP_MAX_MODE is changed to allow v3 8x mode.
-	     * At this time we don't know if the AGP bridge supports
-	     * 8x mode. This will later be verified on both 
-	     * AGP master and target sides.
-	     */
-	    xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
-		       "AGP %dx mode is configured\n", info->agpMode);
-	}
-
-	if ((info->agpFastWrite = xf86ReturnOptValBool(info->Options,
-						       OPTION_AGP_FW,
-						       FALSE))) {
-	    xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
-		       "Enabling AGP Fast Write\n");
-	} else {
-	    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-		       "AGP Fast Write disabled by default\n");
-	}
-    }
-
     if ((xf86GetOptValInteger(info->Options,
 			     OPTION_GART_SIZE, (int *)&(info->gartSize))) ||
 			     (xf86GetOptValInteger(info->Options,