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authorAlex Deucher <alexdeucher@gmail.com>2008-08-08 17:39:48 -0400
committerAlex Deucher <alexdeucher@gmail.com>2008-08-08 17:39:48 -0400
commit4dbdeea7c9316575fba26b41fd347452e42cdcf2 (patch)
treece773e84d6c353f0af7f29edfb00f961f8aab868 /src
parent268c848130ec1770bb645a74197b6aca7fc95abc (diff)
Further cleanup and unification of i2c code
- unify the ddc and i2c code - add gpio mask support for legacy chips - remove the magic gpio dance for ancient monitors (if you have an ancient monitor that ddc stops working on let me know). This should speed up DDC on legacy chips. -- radeon sw gpio i2c -- 4 sets of gpio registers for clk and data and corresponding bit masks mask - locks the gpio for use by sw get - reads the value off the gpio pad put - sets the gpio direction to output a - "other stuff" On legacy chips you clear them if you want to use a gpio for i2c. In some cases they are used for the output value when the gpio in the output state.
Diffstat (limited to 'src')
-rw-r--r--src/legacy_output.c6
-rw-r--r--src/radeon.h2
-rw-r--r--src/radeon_atombios.c14
-rw-r--r--src/radeon_bios.c30
-rw-r--r--src/radeon_output.c140
-rw-r--r--src/radeon_probe.h4
6 files changed, 76 insertions, 120 deletions
diff --git a/src/legacy_output.c b/src/legacy_output.c
index 3ca019f4..e5ddf1f7 100644
--- a/src/legacy_output.c
+++ b/src/legacy_output.c
@@ -279,17 +279,14 @@ static void
RADEONRestoreDVOChip(ScrnInfoPtr pScrn, xf86OutputPtr output)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
- unsigned char *RADEONMMIO = info->MMIO;
RADEONOutputPrivatePtr radeon_output = output->driver_private;
if (!radeon_output->DVOChip)
return;
+ RADEONI2CDoLock(output, TRUE);
if (!RADEONInitExtTMDSInfoFromBIOS(output)) {
if (radeon_output->DVOChip) {
- OUTREG(radeon_output->dvo_i2c.mask_clk_reg,
- INREG(radeon_output->dvo_i2c.mask_clk_reg) &
- (uint32_t)~(RADEON_GPIO_A_0 | RADEON_GPIO_A_1));
switch(info->ext_tmds_chip) {
case RADEON_SIL_164:
RADEONDVOWriteByte(radeon_output->DVOChip, 0x08, 0x30);
@@ -317,6 +314,7 @@ RADEONRestoreDVOChip(ScrnInfoPtr pScrn, xf86OutputPtr output)
}
}
}
+ RADEONI2CDoLock(output, FALSE);
}
#if 0
diff --git a/src/radeon.h b/src/radeon.h
index d53688ee..63655b8f 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -1014,6 +1014,8 @@ extern void RADEONPrintPortMap(ScrnInfoPtr pScrn);
extern void RADEONSetOutputType(ScrnInfoPtr pScrn,
RADEONOutputPrivatePtr radeon_output);
extern Bool RADEONSetupConnectors(ScrnInfoPtr pScrn);
+extern Bool RADEONI2CDoLock(xf86OutputPtr output, Bool lock_state);
+
/* radeon_tv.c */
extern void RADEONSaveTVRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save);
diff --git a/src/radeon_atombios.c b/src/radeon_atombios.c
index 8c6c22a9..f0a3a31b 100644
--- a/src/radeon_atombios.c
+++ b/src/radeon_atombios.c
@@ -1415,12 +1415,16 @@ RADEONLookupGPIOLineForDDC(ScrnInfoPtr pScrn, uint8_t id)
i2c.put_data_reg = le16_to_cpu(gpio.usDataEnRegisterIndex) * 4;
i2c.get_clk_reg = le16_to_cpu(gpio.usClkY_RegisterIndex) * 4;
i2c.get_data_reg = le16_to_cpu(gpio.usDataY_RegisterIndex) * 4;
+ i2c.a_clk_reg = le16_to_cpu(gpio.usClkA_RegisterIndex) * 4;
+ i2c.a_data_reg = le16_to_cpu(gpio.usDataA_RegisterIndex) * 4;
i2c.mask_clk_mask = (1 << gpio.ucClkMaskShift);
i2c.mask_data_mask = (1 << gpio.ucDataMaskShift);
i2c.put_clk_mask = (1 << gpio.ucClkEnShift);
i2c.put_data_mask = (1 << gpio.ucDataEnShift);
i2c.get_clk_mask = (1 << gpio.ucClkY_Shift);
i2c.get_data_mask = (1 << gpio.ucDataY_Shift);
+ i2c.a_clk_mask = (1 << gpio.ucClkA_Shift);
+ i2c.a_data_mask = (1 << gpio.ucDataA_Shift);
i2c.valid = TRUE;
#if 0
@@ -1430,16 +1434,16 @@ RADEONLookupGPIOLineForDDC(ScrnInfoPtr pScrn, uint8_t id)
ErrorF("put_data_reg: 0x%x\n", gpio.usDataEnRegisterIndex * 4);
ErrorF("get_clk_reg: 0x%x\n", gpio.usClkY_RegisterIndex * 4);
ErrorF("get_data_reg: 0x%x\n", gpio.usDataY_RegisterIndex * 4);
- ErrorF("other_clk_reg: 0x%x\n", gpio.usClkA_RegisterIndex * 4);
- ErrorF("other_data_reg: 0x%x\n", gpio.usDataA_RegisterIndex * 4);
+ ErrorF("a_clk_reg: 0x%x\n", gpio.usClkA_RegisterIndex * 4);
+ ErrorF("a_data_reg: 0x%x\n", gpio.usDataA_RegisterIndex * 4);
ErrorF("mask_clk_mask: %d\n", gpio.ucClkMaskShift);
ErrorF("mask_data_mask: %d\n", gpio.ucDataMaskShift);
ErrorF("put_clk_mask: %d\n", gpio.ucClkEnShift);
ErrorF("put_data_mask: %d\n", gpio.ucDataEnShift);
ErrorF("get_clk_mask: %d\n", gpio.ucClkY_Shift);
ErrorF("get_data_mask: %d\n", gpio.ucDataY_Shift);
- ErrorF("other_clk_mask: %d\n", gpio.ucClkA_Shift);
- ErrorF("other_data_mask: %d\n", gpio.ucDataA_Shift);
+ ErrorF("a_clk_mask: %d\n", gpio.ucClkA_Shift);
+ ErrorF("a_data_mask: %d\n", gpio.ucDataA_Shift);
#endif
return i2c;
@@ -1461,7 +1465,7 @@ RADEONGetATOMConnectorInfoFromBIOSObject (ScrnInfoPtr pScrn)
atomDataTablesPtr atomDataPtr;
ATOM_CONNECTOR_OBJECT_TABLE *con_obj;
ATOM_INTEGRATED_SYSTEM_INFO_V2 *igp_obj = NULL;
- int i, j, ddc_line = 0;
+ int i, j;
atomDataPtr = info->atomBIOS->atomDataPtr;
if (!rhdAtomGetTableRevisionAndSize((ATOM_COMMON_TABLE_HEADER *)(atomDataPtr->Object_Header), &crev, &frev, &size))
diff --git a/src/radeon_bios.c b/src/radeon_bios.c
index a4b9ed68..b34a4217 100644
--- a/src/radeon_bios.c
+++ b/src/radeon_bios.c
@@ -433,7 +433,7 @@ static Bool RADEONGetATOMConnectorInfoFromBIOS (ScrnInfoPtr pScrn)
RADEONInfoPtr info = RADEONPTR (pScrn);
if (!info->VBIOS) return FALSE;
-
+
if (RADEONGetATOMConnectorInfoFromBIOSObject(pScrn))
return TRUE;
@@ -468,14 +468,18 @@ static void RADEONApplyLegacyQuirks(ScrnInfoPtr pScrn, int index)
info->BiosConnector[index].ddc_i2c.valid = TRUE;
info->BiosConnector[index].ddc_i2c.mask_clk_mask = (0x20 << 8);
info->BiosConnector[index].ddc_i2c.mask_data_mask = 0x80;
+ info->BiosConnector[index].ddc_i2c.a_clk_mask = (0x20 << 8);
+ info->BiosConnector[index].ddc_i2c.a_data_mask = 0x80;
info->BiosConnector[index].ddc_i2c.put_clk_mask = (0x20 << 8);
info->BiosConnector[index].ddc_i2c.put_data_mask = 0x80;
info->BiosConnector[index].ddc_i2c.get_clk_mask = (0x20 << 8);
info->BiosConnector[index].ddc_i2c.get_data_mask = 0x80;
info->BiosConnector[index].ddc_i2c.mask_clk_reg = RADEON_GPIOPAD_MASK;
info->BiosConnector[index].ddc_i2c.mask_data_reg = RADEON_GPIOPAD_MASK;
- info->BiosConnector[index].ddc_i2c.put_clk_reg = RADEON_GPIOPAD_A;
- info->BiosConnector[index].ddc_i2c.put_data_reg = RADEON_GPIOPAD_A;
+ info->BiosConnector[index].ddc_i2c.a_clk_reg = RADEON_GPIOPAD_A;
+ info->BiosConnector[index].ddc_i2c.a_data_reg = RADEON_GPIOPAD_A;
+ info->BiosConnector[index].ddc_i2c.put_clk_reg = RADEON_GPIOPAD_EN;
+ info->BiosConnector[index].ddc_i2c.put_data_reg = RADEON_GPIOPAD_EN;
info->BiosConnector[index].ddc_i2c.get_clk_reg = RADEON_LCD_GPIO_Y_REG;
info->BiosConnector[index].ddc_i2c.get_data_reg = RADEON_LCD_GPIO_Y_REG;
}
@@ -645,10 +649,10 @@ static Bool RADEONGetLegacyConnectorInfoFromBIOS (ScrnInfoPtr pScrn)
break;
case DDC_LCD:
info->BiosConnector[4].ddc_i2c = legacy_setup_i2c_bus(RADEON_LCD_GPIO_MASK);
- info->BiosConnector[4].ddc_i2c.mask_clk_mask =
- RADEON_BIOS32(tmp0 + 0x03) | RADEON_BIOS32(tmp0 + 0x07);
- info->BiosConnector[4].ddc_i2c.mask_data_mask =
- RADEON_BIOS32(tmp0 + 0x03) | RADEON_BIOS32(tmp0 + 0x07);
+ info->BiosConnector[4].ddc_i2c.mask_clk_mask = RADEON_BIOS32(tmp0 + 0x03);
+ info->BiosConnector[4].ddc_i2c.mask_data_mask = RADEON_BIOS32(tmp0 + 0x07);
+ info->BiosConnector[4].ddc_i2c.a_clk_mask = RADEON_BIOS32(tmp0 + 0x03);
+ info->BiosConnector[4].ddc_i2c.a_data_mask = RADEON_BIOS32(tmp0 + 0x07);
info->BiosConnector[4].ddc_i2c.put_clk_mask = RADEON_BIOS32(tmp0 + 0x03);
info->BiosConnector[4].ddc_i2c.put_data_mask = RADEON_BIOS32(tmp0 + 0x07);
info->BiosConnector[4].ddc_i2c.get_clk_mask = RADEON_BIOS32(tmp0 + 0x03);
@@ -656,10 +660,10 @@ static Bool RADEONGetLegacyConnectorInfoFromBIOS (ScrnInfoPtr pScrn)
break;
case DDC_GPIO:
info->BiosConnector[4].ddc_i2c = legacy_setup_i2c_bus(RADEON_MDGPIO_EN_REG);
- info->BiosConnector[4].ddc_i2c.mask_clk_mask =
- RADEON_BIOS32(tmp0 + 0x03) | RADEON_BIOS32(tmp0 + 0x07);
- info->BiosConnector[4].ddc_i2c.mask_data_mask =
- RADEON_BIOS32(tmp0 + 0x03) | RADEON_BIOS32(tmp0 + 0x07);
+ info->BiosConnector[4].ddc_i2c.mask_clk_mask = RADEON_BIOS32(tmp0 + 0x03);
+ info->BiosConnector[4].ddc_i2c.mask_data_mask = RADEON_BIOS32(tmp0 + 0x07);
+ info->BiosConnector[4].ddc_i2c.a_clk_mask = RADEON_BIOS32(tmp0 + 0x03);
+ info->BiosConnector[4].ddc_i2c.a_data_mask = RADEON_BIOS32(tmp0 + 0x07);
info->BiosConnector[4].ddc_i2c.put_clk_mask = RADEON_BIOS32(tmp0 + 0x03);
info->BiosConnector[4].ddc_i2c.put_data_mask = RADEON_BIOS32(tmp0 + 0x07);
info->BiosConnector[4].ddc_i2c.get_clk_mask = RADEON_BIOS32(tmp0 + 0x03);
@@ -1194,12 +1198,16 @@ RADEONLookupI2CBlock(ScrnInfoPtr pScrn, int id)
i2c.mask_clk_mask = (1 << clock_shift);
i2c.mask_data_mask = (1 << data_shift);
+ i2c.a_clk_mask = (1 << clock_shift);
+ i2c.a_data_mask = (1 << data_shift);
i2c.put_clk_mask = (1 << clock_shift);
i2c.put_data_mask = (1 << data_shift);
i2c.get_clk_mask = (1 << clock_shift);
i2c.get_data_mask = (1 << data_shift);
i2c.mask_clk_reg = reg;
i2c.mask_data_reg = reg;
+ i2c.a_clk_reg = reg;
+ i2c.a_data_reg = reg;
i2c.put_clk_reg = reg;
i2c.put_data_reg = reg;
i2c.get_clk_reg = reg;
diff --git a/src/radeon_output.c b/src/radeon_output.c
index fc59a5d8..7d7f88a1 100644
--- a/src/radeon_output.c
+++ b/src/radeon_output.c
@@ -173,9 +173,6 @@ static const uint32_t default_tvdac_adj [CHIP_FAMILY_LAST] =
static void RADEONUpdatePanelSize(xf86OutputPtr output);
static void RADEONGetTMDSInfoFromTable(xf86OutputPtr output);
-#define AVIVO_I2C_DISABLE 0
-#define AVIVO_I2C_ENABLE 1
-static Bool AVIVOI2CDoLock(xf86OutputPtr output, int lock_state);
extern void atombios_output_mode_set(xf86OutputPtr output,
DisplayModePtr mode,
@@ -215,88 +212,6 @@ void RADEONPrintPortMap(ScrnInfoPtr pScrn)
}
-static xf86MonPtr
-radeon_do_ddc(xf86OutputPtr output)
-{
- RADEONInfoPtr info = RADEONPTR(output->scrn);
- unsigned char *RADEONMMIO = info->MMIO;
- uint32_t DDCReg;
- xf86MonPtr MonInfo = NULL;
- RADEONOutputPrivatePtr radeon_output = output->driver_private;
- int i, j;
-
- if (radeon_output->pI2CBus) {
- DDCReg = radeon_output->ddc_i2c.mask_clk_reg;
-
- if (IS_AVIVO_VARIANT) {
- AVIVOI2CDoLock(output, AVIVO_I2C_ENABLE);
- MonInfo = xf86OutputGetEDID(output, radeon_output->pI2CBus);
- AVIVOI2CDoLock(output, AVIVO_I2C_DISABLE);
- } else if ((DDCReg == RADEON_LCD_GPIO_MASK) || (DDCReg == RADEON_MDGPIO_EN_REG)) {
- MonInfo = xf86OutputGetEDID(output, radeon_output->pI2CBus);
- } else {
- OUTREG(DDCReg, INREG(DDCReg) &
- (uint32_t)~(RADEON_GPIO_A_0 | RADEON_GPIO_A_1));
-
- /* For some old monitors (like Compaq Presario FP500), we need
- * following process to initialize/stop DDC
- */
- OUTREG(DDCReg, INREG(DDCReg) & ~(RADEON_GPIO_EN_1));
- for (j = 0; j < 3; j++) {
- OUTREG(DDCReg,
- INREG(DDCReg) & ~(RADEON_GPIO_EN_0));
- usleep(13000);
-
- OUTREG(DDCReg,
- INREG(DDCReg) & ~(RADEON_GPIO_EN_1));
- for (i = 0; i < 10; i++) {
- usleep(15000);
- if (INREG(DDCReg) & RADEON_GPIO_Y_1)
- break;
- }
- if (i == 10) continue;
-
- usleep(15000);
-
- OUTREG(DDCReg, INREG(DDCReg) | RADEON_GPIO_EN_0);
- usleep(15000);
-
- OUTREG(DDCReg, INREG(DDCReg) | RADEON_GPIO_EN_1);
- usleep(15000);
- OUTREG(DDCReg,
- INREG(DDCReg) & ~(RADEON_GPIO_EN_0));
- usleep(15000);
-
- MonInfo = xf86OutputGetEDID(output, radeon_output->pI2CBus);
-
- OUTREG(DDCReg, INREG(DDCReg) | RADEON_GPIO_EN_1);
- OUTREG(DDCReg, INREG(DDCReg) | RADEON_GPIO_EN_0);
- usleep(15000);
- OUTREG(DDCReg,
- INREG(DDCReg) & ~(RADEON_GPIO_EN_1));
- for (i = 0; i < 5; i++) {
- usleep(15000);
- if (INREG(DDCReg) & RADEON_GPIO_Y_1)
- break;
- }
- usleep(15000);
- OUTREG(DDCReg,
- INREG(DDCReg) & ~(RADEON_GPIO_EN_0));
- usleep(15000);
-
- OUTREG(DDCReg, INREG(DDCReg) | RADEON_GPIO_EN_1);
- OUTREG(DDCReg, INREG(DDCReg) | RADEON_GPIO_EN_0);
- usleep(15000);
- if (MonInfo) break;
- }
- OUTREG(DDCReg, INREG(DDCReg) &
- ~(RADEON_GPIO_EN_0 | RADEON_GPIO_EN_1));
- }
- }
-
- return MonInfo;
-}
-
static RADEONMonitorType
radeon_ddc_connected(xf86OutputPtr output)
{
@@ -306,8 +221,11 @@ radeon_ddc_connected(xf86OutputPtr output)
xf86MonPtr MonInfo = NULL;
RADEONOutputPrivatePtr radeon_output = output->driver_private;
- if (radeon_output->pI2CBus)
- MonInfo = radeon_do_ddc(output);
+ if (radeon_output->pI2CBus) {
+ RADEONI2CDoLock(output, TRUE);
+ MonInfo = xf86OutputGetEDID(output, radeon_output->pI2CBus);
+ RADEONI2CDoLock(output, FALSE);
+ }
if (MonInfo) {
if (!xf86ReturnOptValBool(info->Options, OPTION_IGNORE_EDID, FALSE))
xf86OutputSetEDID(output, MonInfo);
@@ -319,13 +237,14 @@ radeon_ddc_connected(xf86OutputPtr output)
MonType = MT_DFP;
else if (radeon_output->type == OUTPUT_DP)
MonType = MT_DFP;
- else if (radeon_output->type == OUTPUT_DVI_I && (MonInfo->rawData[0x14] & 0x80)) /* if it's digital and DVI */
+ else if (radeon_output->type == OUTPUT_DVI_I &&
+ (MonInfo->rawData[0x14] & 0x80)) /* if it's digital and DVI */
MonType = MT_DFP;
else
MonType = MT_CRT;
} else
MonType = MT_NONE;
-
+
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Output: %s, Detected Monitor Type: %d\n", output->name, MonType);
@@ -1699,8 +1618,8 @@ Bool AVIVOI2CReset(ScrnInfoPtr pScrn)
}
#endif
-static
-Bool AVIVOI2CDoLock(xf86OutputPtr output, int lock_state)
+Bool
+RADEONI2CDoLock(xf86OutputPtr output, int lock_state)
{
ScrnInfoPtr pScrn = output->scrn;
RADEONInfoPtr info = RADEONPTR(pScrn);
@@ -1709,19 +1628,29 @@ Bool AVIVOI2CDoLock(xf86OutputPtr output, int lock_state)
unsigned char *RADEONMMIO = info->MMIO;
uint32_t temp;
+ if (lock_state) {
+ temp = INREG(pRADEONI2CBus->a_clk_reg);
+ temp &= ~(pRADEONI2CBus->a_clk_mask);
+ OUTREG(pRADEONI2CBus->a_clk_reg, temp);
+
+ temp = INREG(pRADEONI2CBus->a_data_reg);
+ temp &= ~(pRADEONI2CBus->a_data_mask);
+ OUTREG(pRADEONI2CBus->a_data_reg, temp);
+ }
+
temp = INREG(pRADEONI2CBus->mask_clk_reg);
- if (lock_state == AVIVO_I2C_ENABLE)
- temp |= (pRADEONI2CBus->put_clk_mask);
+ if (lock_state)
+ temp |= (pRADEONI2CBus->mask_clk_mask);
else
- temp &= ~(pRADEONI2CBus->put_clk_mask);
+ temp &= ~(pRADEONI2CBus->mask_clk_mask);
OUTREG(pRADEONI2CBus->mask_clk_reg, temp);
temp = INREG(pRADEONI2CBus->mask_clk_reg);
temp = INREG(pRADEONI2CBus->mask_data_reg);
- if (lock_state == AVIVO_I2C_ENABLE)
- temp |= (pRADEONI2CBus->put_data_mask);
+ if (lock_state)
+ temp |= (pRADEONI2CBus->mask_data_mask);
else
- temp &= ~(pRADEONI2CBus->put_data_mask);
+ temp &= ~(pRADEONI2CBus->mask_data_mask);
OUTREG(pRADEONI2CBus->mask_data_reg, temp);
temp = INREG(pRADEONI2CBus->mask_data_reg);
@@ -1803,8 +1732,10 @@ legacy_setup_i2c_bus(int ddc_line)
{
RADEONI2CBusRec i2c;
- i2c.mask_clk_mask = RADEON_GPIO_EN_1 | RADEON_GPIO_Y_1;
- i2c.mask_data_mask = RADEON_GPIO_EN_0 | RADEON_GPIO_Y_0;
+ i2c.mask_clk_mask = RADEON_GPIO_EN_1;
+ i2c.mask_data_mask = RADEON_GPIO_EN_0;
+ i2c.a_clk_mask = RADEON_GPIO_A_1;
+ i2c.a_data_mask = RADEON_GPIO_A_0;
i2c.put_clk_mask = RADEON_GPIO_EN_1;
i2c.put_data_mask = RADEON_GPIO_EN_0;
i2c.get_clk_mask = RADEON_GPIO_Y_1;
@@ -1813,6 +1744,8 @@ legacy_setup_i2c_bus(int ddc_line)
(ddc_line == RADEON_MDGPIO_EN_REG)) {
i2c.mask_clk_reg = ddc_line;
i2c.mask_data_reg = ddc_line;
+ i2c.a_clk_reg = ddc_line;
+ i2c.a_data_reg = ddc_line;
i2c.put_clk_reg = ddc_line;
i2c.put_data_reg = ddc_line;
i2c.get_clk_reg = ddc_line + 4;
@@ -1820,6 +1753,8 @@ legacy_setup_i2c_bus(int ddc_line)
} else {
i2c.mask_clk_reg = ddc_line;
i2c.mask_data_reg = ddc_line;
+ i2c.a_clk_reg = ddc_line;
+ i2c.a_data_reg = ddc_line;
i2c.put_clk_reg = ddc_line;
i2c.put_data_reg = ddc_line;
i2c.get_clk_reg = ddc_line;
@@ -1846,6 +1781,8 @@ atom_setup_i2c_bus(int ddc_line)
i2c.get_data_mask = (1 << 18);
i2c.mask_clk_mask = (1 << 19);
i2c.mask_data_mask = (1 << 18);
+ i2c.a_clk_mask = (1 << 19);
+ i2c.a_data_mask = (1 << 18);
} else {
i2c.put_clk_mask = (1 << 0);
i2c.put_data_mask = (1 << 8);
@@ -1853,9 +1790,13 @@ atom_setup_i2c_bus(int ddc_line)
i2c.get_data_mask = (1 << 8);
i2c.mask_clk_mask = (1 << 0);
i2c.mask_data_mask = (1 << 8);
+ i2c.a_clk_mask = (1 << 0);
+ i2c.a_data_mask = (1 << 8);
}
i2c.mask_clk_reg = ddc_line;
i2c.mask_data_reg = ddc_line;
+ i2c.a_clk_reg = ddc_line + 0x4;
+ i2c.a_data_reg = ddc_line + 0x4;
i2c.put_clk_reg = ddc_line + 0x8;
i2c.put_data_reg = ddc_line + 0x8;
i2c.get_clk_reg = ddc_line + 0xc;
@@ -2694,7 +2635,6 @@ Bool RADEONSetupConnectors(ScrnInfoPtr pScrn)
{
xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
RADEONInfoPtr info = RADEONPTR(pScrn);
- RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
xf86OutputPtr output;
char *optstr;
int i = 0;
diff --git a/src/radeon_probe.h b/src/radeon_probe.h
index 944ab9fa..3770abfd 100644
--- a/src/radeon_probe.h
+++ b/src/radeon_probe.h
@@ -166,6 +166,8 @@ typedef struct
Bool valid;
uint32_t mask_clk_reg;
uint32_t mask_data_reg;
+ uint32_t a_clk_reg;
+ uint32_t a_data_reg;
uint32_t put_clk_reg;
uint32_t put_data_reg;
uint32_t get_clk_reg;
@@ -176,6 +178,8 @@ typedef struct
uint32_t put_data_mask;
uint32_t get_clk_mask;
uint32_t get_data_mask;
+ uint32_t a_clk_mask;
+ uint32_t a_data_mask;
} RADEONI2CBusRec, *RADEONI2CBusPtr;
typedef struct _RADEONCrtcPrivateRec {