diff options
| author | Michel Dänzer <michel.daenzer@amd.com> | 2013-01-10 17:00:16 +0100 |
|---|---|---|
| committer | Michel Dänzer <michel@daenzer.net> | 2013-01-11 12:06:21 +0100 |
| commit | e5e22d788b103c04d3460a221a3b9dc3be69e0a4 (patch) | |
| tree | 035cf7d52d7b38ad15e63b44b62f2371d9835774 /src | |
| parent | f5d2682584c74587890a9795ece7a8917214a83f (diff) | |
DRI2/r[345]xx: 16 bit depth buffers use square micro tiling.
Fixes piglit sanity.tests (with 3D drivers which allocate depth buffers from
the X server).
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/drmmode_display.c | 4 | ||||
| -rw-r--r-- | src/radeon.h | 1 | ||||
| -rw-r--r-- | src/radeon_dri2.c | 10 |
3 files changed, 12 insertions, 3 deletions
diff --git a/src/drmmode_display.c b/src/drmmode_display.c index aade98f3..e4757ad3 100644 --- a/src/drmmode_display.c +++ b/src/drmmode_display.c @@ -1205,7 +1205,9 @@ int drmmode_get_height_align(ScrnInfoPtr scrn, uint32_t tiling) else height_align = 8; } else { - if (tiling) + if (tiling & RADEON_TILING_MICRO_SQUARE) + height_align = 32; + else if (tiling) height_align = 16; else height_align = 1; diff --git a/src/radeon.h b/src/radeon.h index ad50d5db..f9863473 100644 --- a/src/radeon.h +++ b/src/radeon.h @@ -775,6 +775,7 @@ enum { RADEON_CREATE_PIXMAP_TILING_MICRO = 0x20000000, RADEON_CREATE_PIXMAP_DEPTH = 0x40000000, /* for r200 */ RADEON_CREATE_PIXMAP_SZBUFFER = 0x80000000, /* for eg */ + RADEON_CREATE_PIXMAP_TILING_MICRO_SQUARE = 0x8000000, }; diff --git a/src/radeon_dri2.c b/src/radeon_dri2.c index 36a44e47..443d9084 100644 --- a/src/radeon_dri2.c +++ b/src/radeon_dri2.c @@ -221,7 +221,9 @@ radeon_dri2_create_buffer2(ScreenPtr pScreen, } if (info->ChipFamily >= CHIP_FAMILY_CEDAR) flags |= RADEON_CREATE_PIXMAP_SZBUFFER; - } else + } else if (cpp == 2 && info->ChipFamily >= CHIP_FAMILY_R300) + flags = RADEON_CREATE_PIXMAP_TILING_MACRO | RADEON_CREATE_PIXMAP_TILING_MICRO_SQUARE; + else flags = RADEON_CREATE_PIXMAP_TILING_MACRO | RADEON_CREATE_PIXMAP_TILING_MICRO; if (IS_R200_3D || info->ChipFamily == CHIP_FAMILY_RV200 || info->ChipFamily == CHIP_FAMILY_RADEON) flags |= RADEON_CREATE_PIXMAP_DEPTH; @@ -238,7 +240,9 @@ radeon_dri2_create_buffer2(ScreenPtr pScreen, } if (info->ChipFamily >= CHIP_FAMILY_CEDAR) flags |= RADEON_CREATE_PIXMAP_SZBUFFER; - } else + } else if (cpp == 2 && info->ChipFamily >= CHIP_FAMILY_R300) + flags = RADEON_CREATE_PIXMAP_TILING_MACRO | RADEON_CREATE_PIXMAP_TILING_MICRO_SQUARE; + else flags = RADEON_CREATE_PIXMAP_TILING_MACRO | RADEON_CREATE_PIXMAP_TILING_MICRO; if (IS_R200_3D || info->ChipFamily == CHIP_FAMILY_RV200 || info->ChipFamily == CHIP_FAMILY_RADEON) flags |= RADEON_CREATE_PIXMAP_DEPTH; @@ -265,6 +269,8 @@ radeon_dri2_create_buffer2(ScreenPtr pScreen, if (flags & RADEON_CREATE_PIXMAP_TILING_MICRO) tiling |= RADEON_TILING_MICRO; + if (flags & RADEON_CREATE_PIXMAP_TILING_MICRO_SQUARE) + tiling |= RADEON_TILING_MICRO_SQUARE; if (flags & RADEON_CREATE_PIXMAP_TILING_MACRO) tiling |= RADEON_TILING_MACRO; |