match textured video macro names with other accel code

OUT_VIDEO_REG() -> OUT_ACCEL_REG()
etc.

3 files changed, 273 insertions, 257 deletions

diff --git a/src/radeon_exa.c b/src/radeon_exa.c
index 02fd4fc3..96d8ea45 100644
--- a/src/radeon_exa.c
+++ b/src/radeon_exa.c
@@ -352,6 +352,7 @@ do {									\
 #undef ACCEL_PREAMBLE
 #undef BEGIN_ACCEL
 #undef OUT_ACCEL_REG
+#undef OUT_ACCEL_REG_F
 #undef FINISH_ACCEL
 
 #ifdef XF86DRI
@@ -371,6 +372,13 @@ do {									\
 #endif
 #include "radeon_exa_funcs.c"
 
+#undef ACCEL_CP
+#undef ACCEL_PREAMBLE
+#undef BEGIN_ACCEL
+#undef OUT_ACCEL_REG
+#undef FINISH_ACCEL
+#undef OUT_RING_F
+
 #endif /* XF86DRI */
 
 /*
diff --git a/src/radeon_textured_video.c b/src/radeon_textured_video.c
index da1d60f4..9e6b37a8 100644
--- a/src/radeon_textured_video.c
+++ b/src/radeon_textured_video.c
@@ -81,35 +81,43 @@ static __inline__ uint32_t F_TO_DW(float val)
 }
 
 #define ACCEL_MMIO
-#define VIDEO_PREAMBLE()	unsigned char *RADEONMMIO = info->MMIO
-#define BEGIN_VIDEO(n)		RADEONWaitForFifo(pScrn, (n))
-#define OUT_VIDEO_REG(reg, val)	OUTREG(reg, val)
-#define OUT_VIDEO_REG_F(reg, val) OUTREG(reg, F_TO_DW(val))
-#define FINISH_VIDEO()
+#define ACCEL_PREAMBLE()	unsigned char *RADEONMMIO = info->MMIO
+#define BEGIN_ACCEL(n)		RADEONWaitForFifo(pScrn, (n))
+#define OUT_ACCEL_REG(reg, val)	OUTREG(reg, val)
+#define OUT_ACCEL_REG_F(reg, val) OUTREG(reg, F_TO_DW(val))
+#define FINISH_ACCEL()
 
 #include "radeon_textured_videofuncs.c"
 
 #undef ACCEL_MMIO
-#undef VIDEO_PREAMBLE
-#undef BEGIN_VIDEO
-#undef OUT_VIDEO_REG
-#undef OUT_VIDEO_REG_F
-#undef FINISH_VIDEO
+#undef ACCEL_PREAMBLE
+#undef BEGIN_ACCEL
+#undef OUT_ACCEL_REG
+#undef OUT_ACCEL_REG_F
+#undef FINISH_ACCEL
 
 #ifdef XF86DRI
 
 #define ACCEL_CP
-#define VIDEO_PREAMBLE()						\
+#define ACCEL_PREAMBLE()						\
     RING_LOCALS;							\
     RADEONCP_REFRESH(pScrn, info)
-#define BEGIN_VIDEO(n)		BEGIN_RING(2*(n))
-#define OUT_VIDEO_REG(reg, val)	OUT_RING_REG(reg, val)
-#define OUT_VIDEO_REG_F(reg, val)	OUT_VIDEO_REG(reg, F_TO_DW(val))
-#define FINISH_VIDEO()		ADVANCE_RING()
-#define OUT_VIDEO_RING_F(x) OUT_RING(F_TO_DW(x))
+#define BEGIN_ACCEL(n)		BEGIN_RING(2*(n))
+#define OUT_ACCEL_REG(reg, val)	OUT_RING_REG(reg, val)
+#define OUT_ACCEL_REG_F(reg, val)	OUT_ACCEL_REG(reg, F_TO_DW(val))
+#define FINISH_ACCEL()		ADVANCE_RING()
+#define OUT_RING_F(x) OUT_RING(F_TO_DW(x))
 
 #include "radeon_textured_videofuncs.c"
 
+#undef ACCEL_CP
+#undef ACCEL_PREAMBLE
+#undef BEGIN_ACCEL
+#undef OUT_ACCEL_REG
+#undef OUT_ACCEL_REG_F
+#undef FINISH_ACCEL
+#undef OUT_RING_F
+
 #endif /* XF86DRI */
 
 static int
diff --git a/src/radeon_textured_videofuncs.c b/src/radeon_textured_videofuncs.c
index b53e1141..09e28110 100644
--- a/src/radeon_textured_videofuncs.c
+++ b/src/radeon_textured_videofuncs.c
@@ -52,40 +52,40 @@
 
 #define VTX_OUT_FILTER(_dstX, _dstY, _srcX, _srcY, _maskX, _maskY)	\
 do {									\
-    OUT_VIDEO_RING_F(_dstX);						\
-    OUT_VIDEO_RING_F(_dstY);						\
-    OUT_VIDEO_RING_F(_srcX);						\
-    OUT_VIDEO_RING_F(_srcY);						\
-    OUT_VIDEO_RING_F(_maskX);						\
-    OUT_VIDEO_RING_F(_maskY);						\
+    OUT_RING_F(_dstX);						\
+    OUT_RING_F(_dstY);						\
+    OUT_RING_F(_srcX);						\
+    OUT_RING_F(_srcY);						\
+    OUT_RING_F(_maskX);						\
+    OUT_RING_F(_maskY);						\
 } while (0)
 
 #define VTX_OUT(_dstX, _dstY, _srcX, _srcY)	\
 do {								\
-    OUT_VIDEO_RING_F(_dstX);						\
-    OUT_VIDEO_RING_F(_dstY);						\
-    OUT_VIDEO_RING_F(_srcX);						\
-    OUT_VIDEO_RING_F(_srcY);						\
+    OUT_RING_F(_dstX);						\
+    OUT_RING_F(_dstY);						\
+    OUT_RING_F(_srcX);						\
+    OUT_RING_F(_srcY);						\
 } while (0)
 
 #else /* ACCEL_CP */
 
 #define VTX_OUT_FILTER(_dstX, _dstY, _srcX, _srcY, _maskX, _maskY)	\
 do {									\
-    OUT_VIDEO_REG_F(RADEON_SE_PORT_DATA0, _dstX);			\
-    OUT_VIDEO_REG_F(RADEON_SE_PORT_DATA0, _dstY);			\
-    OUT_VIDEO_REG_F(RADEON_SE_PORT_DATA0, _srcX);			\
-    OUT_VIDEO_REG_F(RADEON_SE_PORT_DATA0, _srcY);			\
-    OUT_VIDEO_REG_F(RADEON_SE_PORT_DATA0, _maskX);			\
-    OUT_VIDEO_REG_F(RADEON_SE_PORT_DATA0, _maskY);			\
+    OUT_ACCEL_REG_F(RADEON_SE_PORT_DATA0, _dstX);			\
+    OUT_ACCEL_REG_F(RADEON_SE_PORT_DATA0, _dstY);			\
+    OUT_ACCEL_REG_F(RADEON_SE_PORT_DATA0, _srcX);			\
+    OUT_ACCEL_REG_F(RADEON_SE_PORT_DATA0, _srcY);			\
+    OUT_ACCEL_REG_F(RADEON_SE_PORT_DATA0, _maskX);			\
+    OUT_ACCEL_REG_F(RADEON_SE_PORT_DATA0, _maskY);			\
 } while (0)
 
 #define VTX_OUT(_dstX, _dstY, _srcX, _srcY)	\
 do {								\
-    OUT_VIDEO_REG_F(RADEON_SE_PORT_DATA0, _dstX);		\
-    OUT_VIDEO_REG_F(RADEON_SE_PORT_DATA0, _dstY);		\
-    OUT_VIDEO_REG_F(RADEON_SE_PORT_DATA0, _srcX);		\
-    OUT_VIDEO_REG_F(RADEON_SE_PORT_DATA0, _srcY);		\
+    OUT_ACCEL_REG_F(RADEON_SE_PORT_DATA0, _dstX);		\
+    OUT_ACCEL_REG_F(RADEON_SE_PORT_DATA0, _dstY);		\
+    OUT_ACCEL_REG_F(RADEON_SE_PORT_DATA0, _srcX);		\
+    OUT_ACCEL_REG_F(RADEON_SE_PORT_DATA0, _srcY);		\
 } while (0)
 
 #endif /* !ACCEL_CP */
@@ -103,7 +103,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
     int dstxoff, dstyoff, pixel_shift, vtx_count;
     BoxPtr pBox = REGION_RECTS(&pPriv->clip);
     int nBox = REGION_NUM_RECTS(&pPriv->clip);
-    VIDEO_PREAMBLE();
+    ACCEL_PREAMBLE();
 
     pixel_shift = pPixmap->drawable.bitsPerPixel >> 4;
 
@@ -131,18 +131,18 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 	RADEONInit3DEngine(pScrn);
 
     /* we can probably improve this */
-    BEGIN_VIDEO(2);
+    BEGIN_ACCEL(2);
     if (IS_R300_3D || IS_R500_3D)
-	OUT_VIDEO_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_DC_FLUSH_3D);
+	OUT_ACCEL_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_DC_FLUSH_3D);
     else
-	OUT_VIDEO_REG(RADEON_RB3D_DSTCACHE_CTLSTAT, RADEON_RB3D_DC_FLUSH);
+	OUT_ACCEL_REG(RADEON_RB3D_DSTCACHE_CTLSTAT, RADEON_RB3D_DC_FLUSH);
     /* We must wait for 3d to idle, in case source was just written as a dest. */
-    OUT_VIDEO_REG(RADEON_WAIT_UNTIL,
+    OUT_ACCEL_REG(RADEON_WAIT_UNTIL,
 		  RADEON_WAIT_HOST_IDLECLEAN |
 		  RADEON_WAIT_2D_IDLECLEAN |
 		  RADEON_WAIT_3D_IDLECLEAN |
 		  RADEON_WAIT_DMA_GUI_IDLE);
-    FINISH_VIDEO();
+    FINISH_ACCEL();
 
     if (pPriv->bicubic_enabled)
 	vtx_count = VTX_DWORD_COUNT_FILTER;
@@ -210,14 +210,14 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 
 	txoffset = pPriv->src_offset;
 
-	BEGIN_VIDEO(6);
-	OUT_VIDEO_REG(R300_TX_FILTER0_0, txfilter);
-	OUT_VIDEO_REG(R300_TX_FILTER1_0, 0);
-	OUT_VIDEO_REG(R300_TX_FORMAT0_0, txformat0);
-	OUT_VIDEO_REG(R300_TX_FORMAT1_0, txformat1);
-	OUT_VIDEO_REG(R300_TX_FORMAT2_0, txpitch);
-	OUT_VIDEO_REG(R300_TX_OFFSET_0, txoffset);
-	FINISH_VIDEO();
+	BEGIN_ACCEL(6);
+	OUT_ACCEL_REG(R300_TX_FILTER0_0, txfilter);
+	OUT_ACCEL_REG(R300_TX_FILTER1_0, 0);
+	OUT_ACCEL_REG(R300_TX_FORMAT0_0, txformat0);
+	OUT_ACCEL_REG(R300_TX_FORMAT1_0, txformat1);
+	OUT_ACCEL_REG(R300_TX_FORMAT2_0, txpitch);
+	OUT_ACCEL_REG(R300_TX_OFFSET_0, txoffset);
+	FINISH_ACCEL();
 
 	txenable = R300_TEX_0_ENABLE;
 
@@ -237,14 +237,14 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 			    R300_TX_MAG_FILTER_NEAREST |
 			    (1 << R300_TX_ID_SHIFT));
 
-		BEGIN_VIDEO(6);
-		OUT_VIDEO_REG(R300_TX_FILTER0_1, txfilter);
-		OUT_VIDEO_REG(R300_TX_FILTER1_1, 0);
-		OUT_VIDEO_REG(R300_TX_FORMAT0_1, txformat0);
-		OUT_VIDEO_REG(R300_TX_FORMAT1_1, txformat1);
-		OUT_VIDEO_REG(R300_TX_FORMAT2_1, txpitch);
-		OUT_VIDEO_REG(R300_TX_OFFSET_1, pPriv->bicubic_src_offset);
-		FINISH_VIDEO();
+		BEGIN_ACCEL(6);
+		OUT_ACCEL_REG(R300_TX_FILTER0_1, txfilter);
+		OUT_ACCEL_REG(R300_TX_FILTER1_1, 0);
+		OUT_ACCEL_REG(R300_TX_FORMAT0_1, txformat0);
+		OUT_ACCEL_REG(R300_TX_FORMAT1_1, txformat1);
+		OUT_ACCEL_REG(R300_TX_FORMAT2_1, txpitch);
+		OUT_ACCEL_REG(R300_TX_OFFSET_1, pPriv->bicubic_src_offset);
+		FINISH_ACCEL();
 
 		/* Enable tex 1 */
 		txenable |= R300_TEX_1_ENABLE;
@@ -253,14 +253,14 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 	/* setup the VAP */
 	if (info->has_tcl) {
 	    if (pPriv->bicubic_enabled)
-		BEGIN_VIDEO(7);
+		BEGIN_ACCEL(7);
 	    else
-		BEGIN_VIDEO(6);
+		BEGIN_ACCEL(6);
 	} else {
 	    if (pPriv->bicubic_enabled)
-		BEGIN_VIDEO(5);
+		BEGIN_ACCEL(5);
 	    else
-		BEGIN_VIDEO(4);
+		BEGIN_ACCEL(4);
 	}
 
 	/* These registers define the number, type, and location of data submitted
@@ -277,7 +277,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 	 * Fog
 	 */
 	if (pPriv->bicubic_enabled) {
-	    OUT_VIDEO_REG(R300_VAP_PROG_STREAM_CNTL_0,
+	    OUT_ACCEL_REG(R300_VAP_PROG_STREAM_CNTL_0,
 			  ((R300_DATA_TYPE_FLOAT_2 << R300_DATA_TYPE_0_SHIFT) |
 			   (0 << R300_SKIP_DWORDS_0_SHIFT) |
 			   (0 << R300_DST_VEC_LOC_0_SHIFT) |
@@ -286,14 +286,14 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 			   (0 << R300_SKIP_DWORDS_1_SHIFT) |
 			   (6 << R300_DST_VEC_LOC_1_SHIFT) |
 			   R300_SIGNED_1));
-	    OUT_VIDEO_REG(R300_VAP_PROG_STREAM_CNTL_1,
+	    OUT_ACCEL_REG(R300_VAP_PROG_STREAM_CNTL_1,
 			  ((R300_DATA_TYPE_FLOAT_2 << R300_DATA_TYPE_2_SHIFT) |
 			   (0 << R300_SKIP_DWORDS_2_SHIFT) |
 			   (7 << R300_DST_VEC_LOC_2_SHIFT) |
 			   R300_LAST_VEC_2 |
 			   R300_SIGNED_2));
 	} else {
-	    OUT_VIDEO_REG(R300_VAP_PROG_STREAM_CNTL_0,
+	    OUT_ACCEL_REG(R300_VAP_PROG_STREAM_CNTL_0,
 			  ((R300_DATA_TYPE_FLOAT_2 << R300_DATA_TYPE_0_SHIFT) |
 			   (0 << R300_SKIP_DWORDS_0_SHIFT) |
 			   (0 << R300_DST_VEC_LOC_0_SHIFT) |
@@ -314,52 +314,52 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 	 */
 	if (info->has_tcl) {
 	    if (pPriv->bicubic_enabled) {
-		OUT_VIDEO_REG(R300_VAP_PVS_CODE_CNTL_0,
+		OUT_ACCEL_REG(R300_VAP_PVS_CODE_CNTL_0,
 			      ((0 << R300_PVS_FIRST_INST_SHIFT) |
 			       (2 << R300_PVS_XYZW_VALID_INST_SHIFT) |
 			       (2 << R300_PVS_LAST_INST_SHIFT)));
-		OUT_VIDEO_REG(R300_VAP_PVS_CODE_CNTL_1,
+		OUT_ACCEL_REG(R300_VAP_PVS_CODE_CNTL_1,
 			      (2 << R300_PVS_LAST_VTX_SRC_INST_SHIFT));
 	    } else {
-		OUT_VIDEO_REG(R300_VAP_PVS_CODE_CNTL_0,
+		OUT_ACCEL_REG(R300_VAP_PVS_CODE_CNTL_0,
 			      ((5 << R300_PVS_FIRST_INST_SHIFT) |
 			       (6 << R300_PVS_XYZW_VALID_INST_SHIFT) |
 			       (6 << R300_PVS_LAST_INST_SHIFT)));
-		OUT_VIDEO_REG(R300_VAP_PVS_CODE_CNTL_1,
+		OUT_ACCEL_REG(R300_VAP_PVS_CODE_CNTL_1,
 			      (6 << R300_PVS_LAST_VTX_SRC_INST_SHIFT));
 	    }
 	}
 
 	/* Position and one set of 2 texture coordinates */
-	OUT_VIDEO_REG(R300_VAP_OUT_VTX_FMT_0, R300_VTX_POS_PRESENT);
+	OUT_ACCEL_REG(R300_VAP_OUT_VTX_FMT_0, R300_VTX_POS_PRESENT);
 	if (pPriv->bicubic_enabled)
-	    OUT_VIDEO_REG(R300_VAP_OUT_VTX_FMT_1, ((2 << R300_TEX_0_COMP_CNT_SHIFT) |
+	    OUT_ACCEL_REG(R300_VAP_OUT_VTX_FMT_1, ((2 << R300_TEX_0_COMP_CNT_SHIFT) |
 						   (2 << R300_TEX_1_COMP_CNT_SHIFT)));
 	else
-	    OUT_VIDEO_REG(R300_VAP_OUT_VTX_FMT_1, (2 << R300_TEX_0_COMP_CNT_SHIFT));
+	    OUT_ACCEL_REG(R300_VAP_OUT_VTX_FMT_1, (2 << R300_TEX_0_COMP_CNT_SHIFT));
 
-	OUT_VIDEO_REG(R300_US_OUT_FMT_0, output_fmt);
-	FINISH_VIDEO();
+	OUT_ACCEL_REG(R300_US_OUT_FMT_0, output_fmt);
+	FINISH_ACCEL();
 
 	/* setup pixel shader */
 	if (IS_R300_3D) {
-	    BEGIN_VIDEO(9);
+	    BEGIN_ACCEL(9);
 	    /* 2 components: 2 for tex0 */
-	    OUT_VIDEO_REG(R300_RS_COUNT,
+	    OUT_ACCEL_REG(R300_RS_COUNT,
 			  ((2 << R300_RS_COUNT_IT_COUNT_SHIFT) |
 			   R300_RS_COUNT_HIRES_EN));
 	    /* R300_INST_COUNT_RS - highest RS instruction used */
-	    OUT_VIDEO_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(0) | R300_TX_OFFSET_RS(6));
+	    OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(0) | R300_TX_OFFSET_RS(6));
 
-	    OUT_VIDEO_REG(R300_US_PIXSIZE, 0); /* highest temp used */
+	    OUT_ACCEL_REG(R300_US_PIXSIZE, 0); /* highest temp used */
 
-	    OUT_VIDEO_REG(R300_US_CODE_OFFSET,
+	    OUT_ACCEL_REG(R300_US_CODE_OFFSET,
 			  (R300_ALU_CODE_OFFSET(0) |
 			   R300_ALU_CODE_SIZE(1) |
 			   R300_TEX_CODE_OFFSET(0) |
 			   R300_TEX_CODE_SIZE(1)));
 
-	    OUT_VIDEO_REG(R300_US_CODE_ADDR_3,
+	    OUT_ACCEL_REG(R300_US_CODE_ADDR_3,
 			  (R300_ALU_START(0) |
 			   R300_ALU_SIZE(0) |
 			   R300_TEX_START(0) |
@@ -370,7 +370,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 
 	    /* ALU inst */
 	    /* RGB */
-	    OUT_VIDEO_REG(R300_US_ALU_RGB_ADDR_0,
+	    OUT_ACCEL_REG(R300_US_ALU_RGB_ADDR_0,
 			  (R300_ALU_RGB_ADDR0(0) |
 			   R300_ALU_RGB_ADDR1(0) |
 			   R300_ALU_RGB_ADDR2(0) |
@@ -379,7 +379,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 					       R300_ALU_RGB_MASK_G |
 					       R300_ALU_RGB_MASK_B)) |
 			   R300_ALU_RGB_TARGET_A));
-	    OUT_VIDEO_REG(R300_US_ALU_RGB_INST_0,
+	    OUT_ACCEL_REG(R300_US_ALU_RGB_INST_0,
 			  (R300_ALU_RGB_SEL_A(R300_ALU_RGB_SRC0_RGB) |
 			   R300_ALU_RGB_MOD_A(R300_ALU_RGB_MOD_NOP) |
 			   R300_ALU_RGB_SEL_B(R300_ALU_RGB_1_0) |
@@ -390,7 +390,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 			   R300_ALU_RGB_OMOD(R300_ALU_RGB_OMOD_NONE) |
 			   R300_ALU_RGB_CLAMP));
 	    /* Alpha */
-	    OUT_VIDEO_REG(R300_US_ALU_ALPHA_ADDR_0,
+	    OUT_ACCEL_REG(R300_US_ALU_ALPHA_ADDR_0,
 			  (R300_ALU_ALPHA_ADDR0(0) |
 			   R300_ALU_ALPHA_ADDR1(0) |
 			   R300_ALU_ALPHA_ADDR2(0) |
@@ -398,7 +398,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 			   R300_ALU_ALPHA_OMASK(R300_ALU_ALPHA_MASK_A) |
 			   R300_ALU_ALPHA_TARGET_A |
 			   R300_ALU_ALPHA_OMASK_W(R300_ALU_ALPHA_MASK_NONE)));
-	    OUT_VIDEO_REG(R300_US_ALU_ALPHA_INST_0,
+	    OUT_ACCEL_REG(R300_US_ALU_ALPHA_INST_0,
 			  (R300_ALU_ALPHA_SEL_A(R300_ALU_ALPHA_SRC0_A) |
 			   R300_ALU_ALPHA_MOD_A(R300_ALU_ALPHA_MOD_NOP) |
 			   R300_ALU_ALPHA_SEL_B(R300_ALU_ALPHA_1_0) |
@@ -408,34 +408,34 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 			   R300_ALU_ALPHA_OP(R300_ALU_ALPHA_OP_MAD) |
 			   R300_ALU_ALPHA_OMOD(R300_ALU_ALPHA_OMOD_NONE) |
 			   R300_ALU_ALPHA_CLAMP));
-	    FINISH_VIDEO();
+	    FINISH_ACCEL();
 	} else {
 	    if (pPriv->bicubic_enabled) {
-		BEGIN_VIDEO(7);
+		BEGIN_ACCEL(7);
 
 		/* 4 components: 2 for tex0 and 2 for tex1 */
-		OUT_VIDEO_REG(R300_RS_COUNT,
+		OUT_ACCEL_REG(R300_RS_COUNT,
 			      ((4 << R300_RS_COUNT_IT_COUNT_SHIFT) |
 			       R300_RS_COUNT_HIRES_EN));
 
 		/* R300_INST_COUNT_RS - highest RS instruction used */
-		OUT_VIDEO_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(1) | R300_TX_OFFSET_RS(6));
+		OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(1) | R300_TX_OFFSET_RS(6));
 
 		/* Pixel stack frame size. */
-		OUT_VIDEO_REG(R300_US_PIXSIZE, 5);
+		OUT_ACCEL_REG(R300_US_PIXSIZE, 5);
 
 		/* FP length. */
-		OUT_VIDEO_REG(R500_US_CODE_ADDR, (R500_US_CODE_START_ADDR(0) |
+		OUT_ACCEL_REG(R500_US_CODE_ADDR, (R500_US_CODE_START_ADDR(0) |
 						  R500_US_CODE_END_ADDR(13)));
-		OUT_VIDEO_REG(R500_US_CODE_RANGE, (R500_US_CODE_RANGE_ADDR(0) |
+		OUT_ACCEL_REG(R500_US_CODE_RANGE, (R500_US_CODE_RANGE_ADDR(0) |
 						   R500_US_CODE_RANGE_SIZE(13)));
 
 		/* Prepare for FP emission. */
-		OUT_VIDEO_REG(R500_US_CODE_OFFSET, 0);
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_INDEX, R500_US_VECTOR_INST_INDEX(0));
-		FINISH_VIDEO();
+		OUT_ACCEL_REG(R500_US_CODE_OFFSET, 0);
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_INDEX, R500_US_VECTOR_INST_INDEX(0));
+		FINISH_ACCEL();
 
-		BEGIN_VIDEO(89);
+		BEGIN_ACCEL(89);
 		/* Pixel shader.
 		 * I've gone ahead and annotated each instruction, since this
 		 * thing is MASSIVE. :3
@@ -443,14 +443,14 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 		 * inputs, all temps are offset by 2. temp0 -> register2. */
 
 		/* TEX temp2, input1.xxxx, tex1, 1D */
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_INST_TYPE_TEX |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_INST_TYPE_TEX |
 						       R500_INST_RGB_WMASK_R |
 						       R500_INST_RGB_WMASK_G |
 						       R500_INST_RGB_WMASK_B));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_ID(1) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_ID(1) |
 						       R500_TEX_INST_LD |
 						       R500_TEX_IGNORE_UNCOVERED));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_SRC_ADDR(1) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_SRC_ADDR(1) |
 						       R500_TEX_SRC_S_SWIZ_R |
 						       R500_TEX_SRC_T_SWIZ_R |
 						       R500_TEX_SRC_R_SWIZ_R |
@@ -460,21 +460,21 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 						       R500_TEX_DST_G_SWIZ_G |
 						       R500_TEX_DST_B_SWIZ_B |
 						       R500_TEX_DST_A_SWIZ_A));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, 0x00000000);
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, 0x00000000);
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, 0x00000000);
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00000000);
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00000000);
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00000000);
 
 		/* TEX temp5, input1.yyyy, tex1, 1D */
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_INST_TYPE_TEX |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_INST_TYPE_TEX |
 						       R500_INST_TEX_SEM_WAIT |
 						       R500_INST_RGB_WMASK_R |
 						       R500_INST_RGB_WMASK_G |
 						       R500_INST_RGB_WMASK_B));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_ID(1) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_ID(1) |
 						       R500_TEX_INST_LD |
 						       R500_TEX_SEM_ACQUIRE |
 						       R500_TEX_IGNORE_UNCOVERED));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_SRC_ADDR(1) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_SRC_ADDR(1) |
 						       R500_TEX_SRC_S_SWIZ_G |
 						       R500_TEX_SRC_T_SWIZ_G |
 						       R500_TEX_SRC_R_SWIZ_G |
@@ -484,24 +484,24 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 						       R500_TEX_DST_G_SWIZ_G |
 						       R500_TEX_DST_B_SWIZ_B |
 						       R500_TEX_DST_A_SWIZ_A));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, 0x00000000);
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, 0x00000000);
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, 0x00000000);
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00000000);
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00000000);
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00000000);
 
 		/* MUL temp4, const0.x0x0, temp2.yyxx */
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_INST_TYPE_ALU |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_INST_TYPE_ALU |
 						       R500_INST_TEX_SEM_WAIT |
 						       R500_INST_RGB_WMASK_R |
 						       R500_INST_RGB_WMASK_G |
 						       R500_INST_RGB_WMASK_B |
 						       R500_INST_ALPHA_WMASK));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_RGB_ADDR0(0) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_RGB_ADDR0(0) |
 						       R500_RGB_ADDR0_CONST |
 						       R500_RGB_ADDR1(2)));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDR0(0) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDR0(0) |
 						       R500_ALPHA_ADDR0_CONST |
 						       R500_ALPHA_ADDR1(2)));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGB_SEL_A_SRC0 |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGB_SEL_A_SRC0 |
 						       R500_ALU_RGB_R_SWIZ_A_R |
 						       R500_ALU_RGB_G_SWIZ_A_0 |
 						       R500_ALU_RGB_B_SWIZ_A_R |
@@ -509,13 +509,13 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 						       R500_ALU_RGB_R_SWIZ_B_G |
 						       R500_ALU_RGB_G_SWIZ_B_G |
 						       R500_ALU_RGB_B_SWIZ_B_R));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDRD(4) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDRD(4) |
 						       R500_ALPHA_OP_MAD |
 						       R500_ALPHA_SEL_A_SRC0 |
 						       R500_ALPHA_SWIZ_A_0 |
 						       R500_ALPHA_SEL_B_SRC1 |
 						       R500_ALPHA_SWIZ_B_R));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGBA_ADDRD(4) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGBA_ADDRD(4) |
 						       R500_ALU_RGBA_OP_MAD |
 						       R500_ALU_RGBA_R_SWIZ_0 |
 						       R500_ALU_RGBA_G_SWIZ_0 |
@@ -523,20 +523,20 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 						       R500_ALU_RGBA_A_SWIZ_0));
 
 		/* MAD temp3, const0.0y0y, temp5.xxxx, temp4 */
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_INST_TYPE_ALU |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_INST_TYPE_ALU |
 						       R500_INST_RGB_WMASK_R |
 						       R500_INST_RGB_WMASK_G |
 						       R500_INST_RGB_WMASK_B |
 						       R500_INST_ALPHA_WMASK));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_RGB_ADDR0(0) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_RGB_ADDR0(0) |
 						       R500_RGB_ADDR0_CONST |
 						       R500_RGB_ADDR1(5) |
 						       R500_RGB_ADDR2(4)));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDR0(0) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDR0(0) |
 						       R500_ALPHA_ADDR0_CONST |
 						       R500_ALPHA_ADDR1(5) |
 						       R500_ALPHA_ADDR2(4)));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGB_SEL_A_SRC0 |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGB_SEL_A_SRC0 |
 						       R500_ALU_RGB_R_SWIZ_A_0 |
 						       R500_ALU_RGB_G_SWIZ_A_G |
 						       R500_ALU_RGB_B_SWIZ_A_0 |
@@ -544,13 +544,13 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 						       R500_ALU_RGB_R_SWIZ_B_R |
 						       R500_ALU_RGB_G_SWIZ_B_R |
 						       R500_ALU_RGB_B_SWIZ_B_R));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDRD(3) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDRD(3) |
 						       R500_ALPHA_OP_MAD |
 						       R500_ALPHA_SEL_A_SRC0 |
 						       R500_ALPHA_SWIZ_A_G |
 						       R500_ALPHA_SEL_B_SRC1 |
 						       R500_ALPHA_SWIZ_B_R));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGBA_ADDRD(3) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGBA_ADDRD(3) |
 						       R500_ALU_RGBA_OP_MAD |
 						       R500_ALU_RGBA_SEL_C_SRC2 |
 						       R500_ALU_RGBA_R_SWIZ_R |
@@ -559,28 +559,28 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 						       R500_ALU_RGBA_A_SWIZ_A));
 
 		/* ADD temp3, temp3, input0.xyxy */
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_INST_TYPE_ALU |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_INST_TYPE_ALU |
 						       R500_INST_RGB_WMASK_R |
 						       R500_INST_RGB_WMASK_G |
 						       R500_INST_RGB_WMASK_B |
 						       R500_INST_ALPHA_WMASK));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_RGB_ADDR1(3) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_RGB_ADDR1(3) |
 						       R500_RGB_ADDR2(0)));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDR1(3) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDR1(3) |
 						       R500_ALPHA_ADDR2(0)));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGB_R_SWIZ_A_1 |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGB_R_SWIZ_A_1 |
 						       R500_ALU_RGB_G_SWIZ_A_1 |
 						       R500_ALU_RGB_B_SWIZ_A_1 |
 						       R500_ALU_RGB_SEL_B_SRC1 |
 						       R500_ALU_RGB_R_SWIZ_B_R |
 						       R500_ALU_RGB_G_SWIZ_B_G |
 						       R500_ALU_RGB_B_SWIZ_B_B));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDRD(3) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDRD(3) |
 						       R500_ALPHA_OP_MAD |
 						       R500_ALPHA_SWIZ_A_1 |
 						       R500_ALPHA_SEL_B_SRC1 |
 						       R500_ALPHA_SWIZ_B_A));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGBA_ADDRD(3) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGBA_ADDRD(3) |
 						       R500_ALU_RGBA_OP_MAD |
 						       R500_ALU_RGBA_SEL_C_SRC2 |
 						       R500_ALU_RGBA_R_SWIZ_R |
@@ -589,15 +589,15 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 						       R500_ALU_RGBA_A_SWIZ_G));
 
 		/* TEX temp1, temp3.zwxy, tex0, 1D */
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_INST_TYPE_TEX |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_INST_TYPE_TEX |
 						       R500_INST_RGB_WMASK_R |
 						       R500_INST_RGB_WMASK_G |
 						       R500_INST_RGB_WMASK_B |
 						       R500_INST_ALPHA_WMASK));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_ID(0) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_ID(0) |
 						       R500_TEX_INST_LD |
 						       R500_TEX_IGNORE_UNCOVERED));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_SRC_ADDR(3) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_SRC_ADDR(3) |
 						       R500_TEX_SRC_S_SWIZ_B |
 						       R500_TEX_SRC_T_SWIZ_A |
 						       R500_TEX_SRC_R_SWIZ_R |
@@ -607,22 +607,22 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 						       R500_TEX_DST_G_SWIZ_G |
 						       R500_TEX_DST_B_SWIZ_B |
 						       R500_TEX_DST_A_SWIZ_A));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, 0x00000000);
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, 0x00000000);
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, 0x00000000);
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00000000);
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00000000);
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00000000);
 
 		/* TEX temp3, temp3.xyzw, tex0, 1D */
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_INST_TYPE_TEX |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_INST_TYPE_TEX |
 						       R500_INST_TEX_SEM_WAIT |
 						       R500_INST_RGB_WMASK_R |
 						       R500_INST_RGB_WMASK_G |
 						       R500_INST_RGB_WMASK_B |
 						       R500_INST_ALPHA_WMASK));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_ID(0) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_ID(0) |
 						       R500_TEX_INST_LD |
 						       R500_TEX_SEM_ACQUIRE |
 						       R500_TEX_IGNORE_UNCOVERED));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_SRC_ADDR(3) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_SRC_ADDR(3) |
 						       R500_TEX_SRC_S_SWIZ_R |
 						       R500_TEX_SRC_T_SWIZ_G |
 						       R500_TEX_SRC_R_SWIZ_B |
@@ -632,25 +632,25 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 						       R500_TEX_DST_G_SWIZ_G |
 						       R500_TEX_DST_B_SWIZ_B |
 						       R500_TEX_DST_A_SWIZ_A));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, 0x00000000);
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, 0x00000000);
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, 0x00000000);
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00000000);
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00000000);
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00000000);
 
 		/* MAD temp4, const1.0y0y, temp5.yyyy, temp4 */
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_INST_TYPE_ALU |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_INST_TYPE_ALU |
 						       R500_INST_RGB_WMASK_R |
 						       R500_INST_RGB_WMASK_G |
 						       R500_INST_RGB_WMASK_B |
 						       R500_INST_ALPHA_WMASK));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_RGB_ADDR0(0) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_RGB_ADDR0(0) |
 						       R500_RGB_ADDR0_CONST |
 						       R500_RGB_ADDR1(5) |
 						       R500_RGB_ADDR2(4)));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDR0(0) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDR0(0) |
 						       R500_ALPHA_ADDR0_CONST |
 						       R500_ALPHA_ADDR1(5) |
 						       R500_ALPHA_ADDR2(4)));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGB_SEL_A_SRC0 |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGB_SEL_A_SRC0 |
 						       R500_ALU_RGB_R_SWIZ_A_0 |
 						       R500_ALU_RGB_G_SWIZ_A_G |
 						       R500_ALU_RGB_B_SWIZ_A_0 |
@@ -658,13 +658,13 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 						       R500_ALU_RGB_R_SWIZ_B_G |
 						       R500_ALU_RGB_G_SWIZ_B_G |
 						       R500_ALU_RGB_B_SWIZ_B_G));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDRD(4) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDRD(4) |
 						       R500_ALPHA_OP_MAD |
 						       R500_ALPHA_SEL_A_SRC0 |
 						       R500_ALPHA_SWIZ_A_G |
 						       R500_ALPHA_SEL_B_SRC1 |
 						       R500_ALPHA_SWIZ_B_G));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGBA_ADDRD(4) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGBA_ADDRD(4) |
 						       R500_ALU_RGBA_OP_MAD |
 						       R500_ALU_RGBA_SEL_C_SRC2 |
 						       R500_ALU_RGBA_R_SWIZ_R |
@@ -673,28 +673,28 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 						       R500_ALU_RGBA_A_SWIZ_A));
 
 		/* ADD temp0, temp4, input0.xyxy */
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_INST_TYPE_ALU |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_INST_TYPE_ALU |
 						       R500_INST_RGB_WMASK_R |
 						       R500_INST_RGB_WMASK_G |
 						       R500_INST_RGB_WMASK_B |
 						       R500_INST_ALPHA_WMASK));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_RGB_ADDR1(4) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_RGB_ADDR1(4) |
 						       R500_RGB_ADDR2(0)));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDR1(4) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDR1(4) |
 						       R500_ALPHA_ADDR2(0)));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGB_R_SWIZ_A_1 |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGB_R_SWIZ_A_1 |
 						       R500_ALU_RGB_G_SWIZ_A_1 |
 						       R500_ALU_RGB_B_SWIZ_A_1 |
 						       R500_ALU_RGB_SEL_B_SRC1 |
 						       R500_ALU_RGB_R_SWIZ_B_R |
 						       R500_ALU_RGB_G_SWIZ_B_G |
 						       R500_ALU_RGB_B_SWIZ_B_B));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDRD(0) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDRD(0) |
 						       R500_ALPHA_OP_MAD |
 						       R500_ALPHA_SWIZ_A_1 |
 						       R500_ALPHA_SEL_B_SRC1 |
 						       R500_ALPHA_SWIZ_B_A));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGBA_ADDRD(0) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGBA_ADDRD(0) |
 						       R500_ALU_RGBA_OP_MAD |
 						       R500_ALU_RGBA_SEL_C_SRC2 |
 						       R500_ALU_RGBA_R_SWIZ_R |
@@ -703,16 +703,16 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 						       R500_ALU_RGBA_A_SWIZ_G));
 
 		/* TEX temp4, temp0.zwzw, tex0, 1D */
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_INST_TYPE_TEX |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_INST_TYPE_TEX |
 						       R500_INST_TEX_SEM_WAIT |
 						       R500_INST_RGB_WMASK_R |
 						       R500_INST_RGB_WMASK_G |
 						       R500_INST_RGB_WMASK_B |
 						       R500_INST_ALPHA_WMASK));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_ID(0) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_ID(0) |
 						       R500_TEX_INST_LD |
 						       R500_TEX_IGNORE_UNCOVERED));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_SRC_ADDR(0) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_SRC_ADDR(0) |
 						       R500_TEX_SRC_S_SWIZ_B |
 						       R500_TEX_SRC_T_SWIZ_A |
 						       R500_TEX_SRC_R_SWIZ_B |
@@ -722,22 +722,22 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 						       R500_TEX_DST_G_SWIZ_G |
 						       R500_TEX_DST_B_SWIZ_B |
 						       R500_TEX_DST_A_SWIZ_A));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, 0x00000000);
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, 0x00000000);
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, 0x00000000);
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00000000);
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00000000);
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00000000);
 
 		/* TEX temp0, temp0.xyzw, tex0, 1D */
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_INST_TYPE_TEX |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_INST_TYPE_TEX |
 						       R500_INST_TEX_SEM_WAIT |
 						       R500_INST_RGB_WMASK_R |
 						       R500_INST_RGB_WMASK_G |
 						       R500_INST_RGB_WMASK_B |
 						   R500_INST_ALPHA_WMASK));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_ID(0) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_ID(0) |
 						       R500_TEX_INST_LD |
 						       R500_TEX_SEM_ACQUIRE |
 						       R500_TEX_IGNORE_UNCOVERED));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_SRC_ADDR(0) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_SRC_ADDR(0) |
 						       R500_TEX_SRC_S_SWIZ_R |
 						       R500_TEX_SRC_T_SWIZ_G |
 						       R500_TEX_SRC_R_SWIZ_B |
@@ -747,27 +747,27 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 						       R500_TEX_DST_G_SWIZ_G |
 						       R500_TEX_DST_B_SWIZ_B |
 						       R500_TEX_DST_A_SWIZ_A));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, 0x00000000);
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, 0x00000000);
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, 0x00000000);
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00000000);
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00000000);
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00000000);
 
 		/* LRP temp3, temp2.zzzz, temp1, temp3 ->
 		 * - PRESUB temps, temp1 - temp3
 		 * - MAD temp2.zzzz, temps, temp3 */
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_INST_TYPE_ALU |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_INST_TYPE_ALU |
 						       R500_INST_RGB_WMASK_R |
 						       R500_INST_RGB_WMASK_G |
 						       R500_INST_RGB_WMASK_B |
 						       R500_INST_ALPHA_WMASK));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_RGB_ADDR0(3) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_RGB_ADDR0(3) |
 						       R500_RGB_SRCP_OP_RGB1_MINUS_RGB0 |
 						       R500_RGB_ADDR1(1) |
 						       R500_RGB_ADDR2(2)));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDR0(3) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDR0(3) |
 						       R500_ALPHA_SRCP_OP_A1_MINUS_A0 |
 						       R500_ALPHA_ADDR1(1) |
 						       R500_ALPHA_ADDR2(2)));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGB_SEL_A_SRC2 |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGB_SEL_A_SRC2 |
 						       R500_ALU_RGB_R_SWIZ_A_B |
 						       R500_ALU_RGB_G_SWIZ_A_B |
 						       R500_ALU_RGB_B_SWIZ_A_B |
@@ -775,13 +775,13 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 						       R500_ALU_RGB_R_SWIZ_B_R |
 						       R500_ALU_RGB_G_SWIZ_B_G |
 						       R500_ALU_RGB_B_SWIZ_B_B));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDRD(3) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDRD(3) |
 						       R500_ALPHA_OP_MAD |
 						       R500_ALPHA_SEL_A_SRC2 |
 						       R500_ALPHA_SWIZ_A_B |
 						       R500_ALPHA_SEL_B_SRCP |
 						       R500_ALPHA_SWIZ_B_A));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGBA_ADDRD(3) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGBA_ADDRD(3) |
 						       R500_ALU_RGBA_OP_MAD |
 						       R500_ALU_RGBA_SEL_C_SRC0 |
 						       R500_ALU_RGBA_R_SWIZ_R |
@@ -792,21 +792,21 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 		/* LRP temp0, temp2.zzzz, temp4, temp0 ->
 		 * - PRESUB temps, temp4 - temp1
 		 * - MAD temp2.zzzz, temps, temp0 */
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_INST_TYPE_ALU |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_INST_TYPE_ALU |
 						       R500_INST_TEX_SEM_WAIT |
 						       R500_INST_RGB_WMASK_R |
 						       R500_INST_RGB_WMASK_G |
 						       R500_INST_RGB_WMASK_B |
 						       R500_INST_ALPHA_WMASK));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_RGB_ADDR0(0) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_RGB_ADDR0(0) |
 						       R500_RGB_SRCP_OP_RGB1_MINUS_RGB0 |
 						       R500_RGB_ADDR1(4) |
 						       R500_RGB_ADDR2(2)));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDR0(0) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDR0(0) |
 						       R500_ALPHA_SRCP_OP_A1_MINUS_A0 |
 						       R500_ALPHA_ADDR1(4) |
 						       R500_ALPHA_ADDR2(2)));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGB_SEL_A_SRC2 |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGB_SEL_A_SRC2 |
 						       R500_ALU_RGB_R_SWIZ_A_B |
 						       R500_ALU_RGB_G_SWIZ_A_B |
 						       R500_ALU_RGB_B_SWIZ_A_B |
@@ -814,13 +814,13 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 						       R500_ALU_RGB_R_SWIZ_B_R |
 						       R500_ALU_RGB_G_SWIZ_B_G |
 						       R500_ALU_RGB_B_SWIZ_B_B));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDRD(0) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDRD(0) |
 						       R500_ALPHA_OP_MAD |
 						       R500_ALPHA_SEL_A_SRC2 |
 						       R500_ALPHA_SWIZ_A_B |
 						       R500_ALPHA_SEL_B_SRCP |
 						       R500_ALPHA_SWIZ_B_A));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGBA_ADDRD(0) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGBA_ADDRD(0) |
 						       R500_ALU_RGBA_OP_MAD |
 						       R500_ALU_RGBA_SEL_C_SRC0 |
 						       R500_ALU_RGBA_R_SWIZ_R |
@@ -831,7 +831,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 		/* LRP output, temp5.zzzz, temp3, temp0 ->
 		 * - PRESUB temps, temp3 - temp0
 		 * - MAD temp5.zzzz, temps, temp0 */
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_INST_TYPE_OUT |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_INST_TYPE_OUT |
 						       R500_INST_LAST |
 						       R500_INST_TEX_SEM_WAIT |
 						       R500_INST_RGB_WMASK_R |
@@ -842,15 +842,15 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 						       R500_INST_RGB_OMASK_G |
 						       R500_INST_RGB_OMASK_B |
 						       R500_INST_ALPHA_OMASK));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_RGB_ADDR0(0) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_RGB_ADDR0(0) |
 						       R500_RGB_SRCP_OP_RGB1_MINUS_RGB0 |
 						       R500_RGB_ADDR1(3) |
 						       R500_RGB_ADDR2(5)));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDR0(0) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDR0(0) |
 						       R500_ALPHA_SRCP_OP_A1_MINUS_A0 |
 						       R500_ALPHA_ADDR1(3) |
 						       R500_ALPHA_ADDR2(5)));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGB_SEL_A_SRC2 |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGB_SEL_A_SRC2 |
 						       R500_ALU_RGB_R_SWIZ_A_B |
 						       R500_ALU_RGB_G_SWIZ_A_B |
 						       R500_ALU_RGB_B_SWIZ_A_B |
@@ -858,13 +858,13 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 						       R500_ALU_RGB_R_SWIZ_B_R |
 						       R500_ALU_RGB_G_SWIZ_B_G |
 						       R500_ALU_RGB_B_SWIZ_B_B));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDRD(0) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDRD(0) |
 						       R500_ALPHA_OP_MAD |
 						       R500_ALPHA_SEL_A_SRC2 |
 						       R500_ALPHA_SWIZ_A_B |
 						       R500_ALPHA_SEL_B_SRCP |
 						       R500_ALPHA_SWIZ_B_A));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGBA_ADDRD(0) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGBA_ADDRD(0) |
 						       R500_ALU_RGBA_OP_MAD |
 						       R500_ALU_RGBA_SEL_C_SRC0 |
 						       R500_ALU_RGBA_R_SWIZ_R |
@@ -873,41 +873,41 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 						       R500_ALU_RGBA_A_SWIZ_A));
 
 		/* Shader constants. */
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_INDEX, R500_US_VECTOR_CONST_INDEX(0));
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_INDEX, R500_US_VECTOR_CONST_INDEX(0));
 
 		/* const0 = {1 / texture[0].width, 0, 0, 0} */
-		OUT_VIDEO_REG_F(R500_GA_US_VECTOR_DATA, (1.0/(float)pPriv->w));
-		OUT_VIDEO_REG_F(R500_GA_US_VECTOR_DATA, (1.0/(float)pPriv->h));
-		OUT_VIDEO_REG_F(R500_GA_US_VECTOR_DATA, 0x0);
-		OUT_VIDEO_REG_F(R500_GA_US_VECTOR_DATA, 0x0);
+		OUT_ACCEL_REG_F(R500_GA_US_VECTOR_DATA, (1.0/(float)pPriv->w));
+		OUT_ACCEL_REG_F(R500_GA_US_VECTOR_DATA, (1.0/(float)pPriv->h));
+		OUT_ACCEL_REG_F(R500_GA_US_VECTOR_DATA, 0x0);
+		OUT_ACCEL_REG_F(R500_GA_US_VECTOR_DATA, 0x0);
 
-		FINISH_VIDEO();
+		FINISH_ACCEL();
 
 	    } else {
-		BEGIN_VIDEO(19);
+		BEGIN_ACCEL(19);
 		/* 2 components: 2 for tex0 */
-		OUT_VIDEO_REG(R300_RS_COUNT,
+		OUT_ACCEL_REG(R300_RS_COUNT,
 			      ((2 << R300_RS_COUNT_IT_COUNT_SHIFT) |
 			       R300_RS_COUNT_HIRES_EN));
 
 		/* R300_INST_COUNT_RS - highest RS instruction used */
-		OUT_VIDEO_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(0) | R300_TX_OFFSET_RS(6));
+		OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(0) | R300_TX_OFFSET_RS(6));
 
 		/* Pixel stack frame size. */
-		OUT_VIDEO_REG(R300_US_PIXSIZE, 0); /* highest temp used */
+		OUT_ACCEL_REG(R300_US_PIXSIZE, 0); /* highest temp used */
 
 		/* FP length. */
-		OUT_VIDEO_REG(R500_US_CODE_ADDR, (R500_US_CODE_START_ADDR(0) |
+		OUT_ACCEL_REG(R500_US_CODE_ADDR, (R500_US_CODE_START_ADDR(0) |
 						  R500_US_CODE_END_ADDR(1)));
-		OUT_VIDEO_REG(R500_US_CODE_RANGE, (R500_US_CODE_RANGE_ADDR(0) |
+		OUT_ACCEL_REG(R500_US_CODE_RANGE, (R500_US_CODE_RANGE_ADDR(0) |
 						   R500_US_CODE_RANGE_SIZE(1)));
 
 		/* Prepare for FP emission. */
-		OUT_VIDEO_REG(R500_US_CODE_OFFSET, 0);
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_INDEX, R500_US_VECTOR_INST_INDEX(0));
+		OUT_ACCEL_REG(R500_US_CODE_OFFSET, 0);
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_INDEX, R500_US_VECTOR_INST_INDEX(0));
 
 		/* tex inst */
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_INST_TYPE_TEX |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_INST_TYPE_TEX |
 						       R500_INST_TEX_SEM_WAIT |
 						       R500_INST_RGB_WMASK_R |
 						       R500_INST_RGB_WMASK_G |
@@ -915,11 +915,11 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 						       R500_INST_ALPHA_WMASK |
 						       R500_INST_RGB_CLAMP |
 						       R500_INST_ALPHA_CLAMP));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_ID(0) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_ID(0) |
 						       R500_TEX_INST_LD |
 						       R500_TEX_SEM_ACQUIRE |
 						       R500_TEX_IGNORE_UNCOVERED));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_SRC_ADDR(0) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_SRC_ADDR(0) |
 						       R500_TEX_SRC_S_SWIZ_R |
 						       R500_TEX_SRC_T_SWIZ_G |
 						       R500_TEX_DST_ADDR(0) |
@@ -927,7 +927,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 						       R500_TEX_DST_G_SWIZ_G |
 						       R500_TEX_DST_B_SWIZ_B |
 						       R500_TEX_DST_A_SWIZ_A));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_DX_ADDR(0) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_DX_ADDR(0) |
 						       R500_DX_S_SWIZ_R |
 						       R500_DX_T_SWIZ_R |
 						       R500_DX_R_SWIZ_R |
@@ -937,11 +937,11 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 						       R500_DY_T_SWIZ_R |
 						       R500_DY_R_SWIZ_R |
 						       R500_DY_Q_SWIZ_R));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, 0x00000000);
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, 0x00000000);
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00000000);
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00000000);
 
 		/* ALU inst */
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_INST_TYPE_OUT |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_INST_TYPE_OUT |
 						       R500_INST_TEX_SEM_WAIT |
 						       R500_INST_LAST |
 						       R500_INST_RGB_OMASK_R |
@@ -950,17 +950,17 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 						       R500_INST_ALPHA_OMASK |
 						       R500_INST_RGB_CLAMP |
 						       R500_INST_ALPHA_CLAMP));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_RGB_ADDR0(0) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_RGB_ADDR0(0) |
 						       R500_RGB_ADDR1(0) |
 						       R500_RGB_ADDR1_CONST |
 						       R500_RGB_ADDR2(0) |
 						       R500_RGB_ADDR2_CONST));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDR0(0) |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDR0(0) |
 						       R500_ALPHA_ADDR1(0) |
 						       R500_ALPHA_ADDR1_CONST |
 						       R500_ALPHA_ADDR2(0) |
 						       R500_ALPHA_ADDR2_CONST));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGB_SEL_A_SRC0 |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGB_SEL_A_SRC0 |
 						       R500_ALU_RGB_R_SWIZ_A_R |
 						       R500_ALU_RGB_G_SWIZ_A_G |
 						       R500_ALU_RGB_B_SWIZ_A_B |
@@ -968,31 +968,31 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 						       R500_ALU_RGB_R_SWIZ_B_1 |
 						       R500_ALU_RGB_B_SWIZ_B_1 |
 						       R500_ALU_RGB_G_SWIZ_B_1));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_OP_MAD |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_OP_MAD |
 						       R500_ALPHA_SWIZ_A_A |
 						       R500_ALPHA_SWIZ_B_1));
-		OUT_VIDEO_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGBA_OP_MAD |
+		OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGBA_OP_MAD |
 						       R500_ALU_RGBA_R_SWIZ_0 |
 						       R500_ALU_RGBA_G_SWIZ_0 |
 						       R500_ALU_RGBA_B_SWIZ_0 |
 						       R500_ALU_RGBA_A_SWIZ_0));
-		FINISH_VIDEO();
+		FINISH_ACCEL();
 	    }
 	}
 
-	BEGIN_VIDEO(6);
-	OUT_VIDEO_REG(R300_TX_INVALTAGS, 0);
-	OUT_VIDEO_REG(R300_TX_ENABLE, txenable);
+	BEGIN_ACCEL(6);
+	OUT_ACCEL_REG(R300_TX_INVALTAGS, 0);
+	OUT_ACCEL_REG(R300_TX_ENABLE, txenable);
 
-	OUT_VIDEO_REG(R300_RB3D_COLOROFFSET0, dst_offset);
-	OUT_VIDEO_REG(R300_RB3D_COLORPITCH0, colorpitch);
+	OUT_ACCEL_REG(R300_RB3D_COLOROFFSET0, dst_offset);
+	OUT_ACCEL_REG(R300_RB3D_COLORPITCH0, colorpitch);
 
 	blendcntl = RADEON_SRC_BLEND_GL_ONE | RADEON_DST_BLEND_GL_ZERO;
 	/* no need to enable blending */
-	OUT_VIDEO_REG(R300_RB3D_BLENDCNTL, blendcntl);
+	OUT_ACCEL_REG(R300_RB3D_BLENDCNTL, blendcntl);
 
-	OUT_VIDEO_REG(R300_VAP_VTX_SIZE, vtx_count);
-	FINISH_VIDEO();
+	OUT_ACCEL_REG(R300_VAP_VTX_SIZE, vtx_count);
+	FINISH_ACCEL();
 
     } else {
 
@@ -1023,20 +1023,20 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 	if (RADEONTilingEnabled(pScrn, pPixmap))
 	    colorpitch |= RADEON_COLOR_TILE_ENABLE;
 
-	BEGIN_VIDEO(5);
+	BEGIN_ACCEL(5);
 
-	OUT_VIDEO_REG(RADEON_PP_CNTL,
+	OUT_ACCEL_REG(RADEON_PP_CNTL,
 		      RADEON_TEX_0_ENABLE | RADEON_TEX_BLEND_0_ENABLE);
-	OUT_VIDEO_REG(RADEON_RB3D_CNTL,
+	OUT_ACCEL_REG(RADEON_RB3D_CNTL,
 		      dst_format | RADEON_ALPHA_BLEND_ENABLE);
-	OUT_VIDEO_REG(RADEON_RB3D_COLOROFFSET, dst_offset);
+	OUT_ACCEL_REG(RADEON_RB3D_COLOROFFSET, dst_offset);
 
-	OUT_VIDEO_REG(RADEON_RB3D_COLORPITCH, colorpitch);
+	OUT_ACCEL_REG(RADEON_RB3D_COLORPITCH, colorpitch);
 
-	OUT_VIDEO_REG(RADEON_RB3D_BLENDCNTL,
+	OUT_ACCEL_REG(RADEON_RB3D_BLENDCNTL,
 		      RADEON_SRC_BLEND_GL_ONE | RADEON_DST_BLEND_GL_ZERO);
 
-	FINISH_VIDEO();
+	FINISH_ACCEL();
 
 
 	if ((info->ChipFamily == CHIP_FAMILY_RV250) ||
@@ -1047,79 +1047,79 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 	    info->texW[0] = pPriv->w;
 	    info->texH[0] = pPriv->h;
 
-	    BEGIN_VIDEO(12);
+	    BEGIN_ACCEL(12);
 
-	    OUT_VIDEO_REG(R200_SE_VTX_FMT_0, R200_VTX_XY);
-	    OUT_VIDEO_REG(R200_SE_VTX_FMT_1,
+	    OUT_ACCEL_REG(R200_SE_VTX_FMT_0, R200_VTX_XY);
+	    OUT_ACCEL_REG(R200_SE_VTX_FMT_1,
 			  (2 << R200_VTX_TEX0_COMP_CNT_SHIFT));
 
-	    OUT_VIDEO_REG(R200_PP_TXFILTER_0,
+	    OUT_ACCEL_REG(R200_PP_TXFILTER_0,
 			  R200_MAG_FILTER_LINEAR |
 			  R200_MIN_FILTER_LINEAR |
 			  R200_CLAMP_S_CLAMP_LAST |
 			  R200_CLAMP_T_CLAMP_LAST |
 			  R200_YUV_TO_RGB);
-	    OUT_VIDEO_REG(R200_PP_TXFORMAT_0, txformat);
-	    OUT_VIDEO_REG(R200_PP_TXFORMAT_X_0, 0);
-	    OUT_VIDEO_REG(R200_PP_TXSIZE_0,
+	    OUT_ACCEL_REG(R200_PP_TXFORMAT_0, txformat);
+	    OUT_ACCEL_REG(R200_PP_TXFORMAT_X_0, 0);
+	    OUT_ACCEL_REG(R200_PP_TXSIZE_0,
 			  (pPriv->w - 1) |
 			  ((pPriv->h - 1) << RADEON_TEX_VSIZE_SHIFT));
-	    OUT_VIDEO_REG(R200_PP_TXPITCH_0, pPriv->src_pitch - 32);
+	    OUT_ACCEL_REG(R200_PP_TXPITCH_0, pPriv->src_pitch - 32);
 
-	    OUT_VIDEO_REG(R200_PP_TXOFFSET_0, pPriv->src_offset);
+	    OUT_ACCEL_REG(R200_PP_TXOFFSET_0, pPriv->src_offset);
 
-	    OUT_VIDEO_REG(R200_PP_TXCBLEND_0,
+	    OUT_ACCEL_REG(R200_PP_TXCBLEND_0,
 			  R200_TXC_ARG_A_ZERO |
 			  R200_TXC_ARG_B_ZERO |
 			  R200_TXC_ARG_C_R0_COLOR |
 			  R200_TXC_OP_MADD);
-	    OUT_VIDEO_REG(R200_PP_TXCBLEND2_0,
+	    OUT_ACCEL_REG(R200_PP_TXCBLEND2_0,
 			  R200_TXC_CLAMP_0_1 | R200_TXC_OUTPUT_REG_R0);
-	    OUT_VIDEO_REG(R200_PP_TXABLEND_0,
+	    OUT_ACCEL_REG(R200_PP_TXABLEND_0,
 			  R200_TXA_ARG_A_ZERO |
 			  R200_TXA_ARG_B_ZERO |
 			  R200_TXA_ARG_C_R0_ALPHA |
 			  R200_TXA_OP_MADD);
-	    OUT_VIDEO_REG(R200_PP_TXABLEND2_0,
+	    OUT_ACCEL_REG(R200_PP_TXABLEND2_0,
 			  R200_TXA_CLAMP_0_1 | R200_TXA_OUTPUT_REG_R0);
-	    FINISH_VIDEO();
+	    FINISH_ACCEL();
 	} else {
 
 	    info->texW[0] = 1;
 	    info->texH[0] = 1;
 
-	    BEGIN_VIDEO(8);
+	    BEGIN_ACCEL(8);
 
-	    OUT_VIDEO_REG(RADEON_SE_VTX_FMT, (RADEON_SE_VTX_FMT_XY |
+	    OUT_ACCEL_REG(RADEON_SE_VTX_FMT, (RADEON_SE_VTX_FMT_XY |
 					      RADEON_SE_VTX_FMT_ST0));
 
-	    OUT_VIDEO_REG(RADEON_PP_TXFILTER_0,
+	    OUT_ACCEL_REG(RADEON_PP_TXFILTER_0,
 			  RADEON_MAG_FILTER_LINEAR |
 			  RADEON_MIN_FILTER_LINEAR |
 			  RADEON_CLAMP_S_CLAMP_LAST |
 			  RADEON_CLAMP_T_CLAMP_LAST |
 			  RADEON_YUV_TO_RGB);
-	    OUT_VIDEO_REG(RADEON_PP_TXFORMAT_0, txformat);
-	    OUT_VIDEO_REG(RADEON_PP_TXOFFSET_0, pPriv->src_offset);
-	    OUT_VIDEO_REG(RADEON_PP_TXCBLEND_0,
+	    OUT_ACCEL_REG(RADEON_PP_TXFORMAT_0, txformat);
+	    OUT_ACCEL_REG(RADEON_PP_TXOFFSET_0, pPriv->src_offset);
+	    OUT_ACCEL_REG(RADEON_PP_TXCBLEND_0,
 			  RADEON_COLOR_ARG_A_ZERO |
 			  RADEON_COLOR_ARG_B_ZERO |
 			  RADEON_COLOR_ARG_C_T0_COLOR |
 			  RADEON_BLEND_CTL_ADD |
 			  RADEON_CLAMP_TX);
-	    OUT_VIDEO_REG(RADEON_PP_TXABLEND_0,
+	    OUT_ACCEL_REG(RADEON_PP_TXABLEND_0,
 			  RADEON_ALPHA_ARG_A_ZERO |
 			  RADEON_ALPHA_ARG_B_ZERO |
 			  RADEON_ALPHA_ARG_C_T0_ALPHA |
 			  RADEON_BLEND_CTL_ADD |
 			  RADEON_CLAMP_TX);
 
-	    OUT_VIDEO_REG(RADEON_PP_TEX_SIZE_0,
+	    OUT_ACCEL_REG(RADEON_PP_TEX_SIZE_0,
 			  (pPriv->w - 1) |
 			  ((pPriv->h - 1) << RADEON_TEX_VSIZE_SHIFT));
-	    OUT_VIDEO_REG(RADEON_PP_TEX_PITCH_0,
+	    OUT_ACCEL_REG(RADEON_PP_TEX_PITCH_0,
 			  pPriv->src_pitch - 32);
-	    FINISH_VIDEO();
+	    FINISH_ACCEL();
 	}
     }
 
@@ -1180,19 +1180,19 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 	}
 #else /* ACCEL_CP */
 	if (IS_R300_3D || IS_R500_3D)
-	    BEGIN_VIDEO(2 + vtx_count * 4);
+	    BEGIN_ACCEL(2 + vtx_count * 4);
 	else if (info->ChipFamily < CHIP_FAMILY_R200)
-	    BEGIN_VIDEO(1 + vtx_count * 3);
+	    BEGIN_ACCEL(1 + vtx_count * 3);
 	else
-	    BEGIN_VIDEO(1 + vtx_count * 4);
+	    BEGIN_ACCEL(1 + vtx_count * 4);
 
 	if (info->ChipFamily < CHIP_FAMILY_R200)
-	    OUT_VIDEO_REG(RADEON_SE_VF_CNTL, (RADEON_VF_PRIM_TYPE_RECTANGLE_LIST |
+	    OUT_ACCEL_REG(RADEON_SE_VF_CNTL, (RADEON_VF_PRIM_TYPE_RECTANGLE_LIST |
 					      RADEON_VF_PRIM_WALK_DATA |
 					      RADEON_VF_RADEON_MODE |
 					      (3 << RADEON_VF_NUM_VERTICES_SHIFT)));
 	else
-	    OUT_VIDEO_REG(RADEON_SE_VF_CNTL, (RADEON_VF_PRIM_TYPE_QUAD_LIST |
+	    OUT_ACCEL_REG(RADEON_SE_VF_CNTL, (RADEON_VF_PRIM_TYPE_QUAD_LIST |
 					      RADEON_VF_PRIM_WALK_DATA |
 					      (4 << RADEON_VF_NUM_VERTICES_SHIFT)));
 
@@ -1225,24 +1225,24 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 
 	if (IS_R300_3D || IS_R500_3D)
 	    /* flushing is pipelined, free/finish is not */
-	    OUT_VIDEO_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_DC_FLUSH_3D);
+	    OUT_ACCEL_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_DC_FLUSH_3D);
 
 #ifdef ACCEL_CP
 	ADVANCE_RING();
 #else
-	FINISH_VIDEO();
+	FINISH_ACCEL();
 #endif /* !ACCEL_CP */
 
 	pBox++;
     }
 
     if (IS_R300_3D || IS_R500_3D) {
-	BEGIN_VIDEO(2);
-	OUT_VIDEO_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_RB3D_DC_FLUSH_ALL);
+	BEGIN_ACCEL(2);
+	OUT_ACCEL_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_RB3D_DC_FLUSH_ALL);
     } else
-	BEGIN_VIDEO(1);
-    OUT_VIDEO_REG(RADEON_WAIT_UNTIL, RADEON_WAIT_3D_IDLECLEAN);
-    FINISH_VIDEO();
+	BEGIN_ACCEL(1);
+    OUT_ACCEL_REG(RADEON_WAIT_UNTIL, RADEON_WAIT_3D_IDLECLEAN);
+    FINISH_ACCEL();
 
     DamageDamageRegion(pPriv->pDraw, &pPriv->clip);
 }