RADEON: decrease crtc/output verbosity

4 files changed, 62 insertions, 62 deletions

diff --git a/src/atombios_crtc.c b/src/atombios_crtc.c
index 51981a75..bab56b28 100644
--- a/src/atombios_crtc.c
+++ b/src/atombios_crtc.c
@@ -231,7 +231,7 @@ atombios_crtc_set_pll(xf86CrtcPtr crtc, DisplayModePtr mode)
 
     atombios_get_command_table_version(info->atomBIOS, index, &major, &minor);
 
-    ErrorF("table is %d %d\n", major, minor);
+    /*ErrorF("table is %d %d\n", major, minor);*/
     switch(major) {
     case 1:
 	switch(minor) {
diff --git a/src/atombios_output.c b/src/atombios_output.c
index a00d87f8..d8e88cae 100644
--- a/src/atombios_output.c
+++ b/src/atombios_output.c
@@ -742,49 +742,49 @@ atombios_output_dpms(xf86OutputPtr output, int mode)
     RADEONOutputPrivatePtr radeon_output = output->driver_private;
     RADEONInfoPtr info       = RADEONPTR(output->scrn);
 
-    ErrorF("AGD: output dpms %d\n", mode);
-
-   if (radeon_output->MonType == MT_LCD) {
-       if (radeon_output->devices & ATOM_DEVICE_LCD1_SUPPORT) {
-	   if (IS_DCE3_VARIANT)
-	       atombios_output_dig_dpms(output, mode, 2);
-	   else
-	       atombios_device_dpms(output, ATOM_DEVICE_LCD1_SUPPORT, mode);
-       }
-   } else if (radeon_output->MonType == MT_DFP) {
-       ErrorF("AGD: tmds dpms\n");
-       if (radeon_output->devices & ATOM_DEVICE_DFP1_SUPPORT) {
-	   if (IS_DCE3_VARIANT)
-	       atombios_output_dig_dpms(output, mode, 1);
-	   else
-	       atombios_device_dpms(output, ATOM_DEVICE_DFP1_SUPPORT, mode);
-       } else if (radeon_output->devices & ATOM_DEVICE_DFP2_SUPPORT) {
-	   if (IS_DCE3_VARIANT)
-	       return; // fixme
-	   else
-	       atombios_device_dpms(output, ATOM_DEVICE_DFP2_SUPPORT, mode);
-       } else if (radeon_output->devices & ATOM_DEVICE_DFP3_SUPPORT) {
-	   if (IS_DCE3_VARIANT)
-	       atombios_output_dig_dpms(output, mode, 2);
-	   else
-	       atombios_device_dpms(output, ATOM_DEVICE_DFP3_SUPPORT, mode);
-       }
-   } else if (radeon_output->MonType == MT_CRT) {
-       ErrorF("AGD: dac dpms\n");
-       if (radeon_output->devices & ATOM_DEVICE_CRT1_SUPPORT)
-	   atombios_device_dpms(output, ATOM_DEVICE_CRT1_SUPPORT, mode);
-       else if (radeon_output->devices & ATOM_DEVICE_CRT2_SUPPORT)
-	   atombios_device_dpms(output, ATOM_DEVICE_CRT2_SUPPORT, mode);
-   } else if (radeon_output->MonType == MT_CV) {
-       ErrorF("AGD: cv dpms\n");
-       if (radeon_output->devices & ATOM_DEVICE_CV_SUPPORT)
-	   atombios_device_dpms(output, ATOM_DEVICE_CV_SUPPORT, mode);
-   } else if (0 /*radeon_output->MonType == MT_STV ||
-		  radeon_output->MonType == MT_CTV*/) {
-       ErrorF("AGD: tv dpms\n");
-       if (radeon_output->devices & ATOM_DEVICE_TV1_SUPPORT)
-	   atombios_device_dpms(output, ATOM_DEVICE_TV1_SUPPORT, mode);
-   }
+    /*ErrorF("output dpms %d\n", mode);*/
+
+    if (radeon_output->MonType == MT_LCD) {
+	if (radeon_output->devices & ATOM_DEVICE_LCD1_SUPPORT) {
+	    if (IS_DCE3_VARIANT)
+		atombios_output_dig_dpms(output, mode, 2);
+	    else
+		atombios_device_dpms(output, ATOM_DEVICE_LCD1_SUPPORT, mode);
+	}
+    } else if (radeon_output->MonType == MT_DFP) {
+	/*ErrorF("tmds dpms\n");*/
+	if (radeon_output->devices & ATOM_DEVICE_DFP1_SUPPORT) {
+	    if (IS_DCE3_VARIANT)
+		atombios_output_dig_dpms(output, mode, 1);
+	    else
+		atombios_device_dpms(output, ATOM_DEVICE_DFP1_SUPPORT, mode);
+	} else if (radeon_output->devices & ATOM_DEVICE_DFP2_SUPPORT) {
+	    if (IS_DCE3_VARIANT)
+		return; // fixme
+	    else
+		atombios_device_dpms(output, ATOM_DEVICE_DFP2_SUPPORT, mode);
+	} else if (radeon_output->devices & ATOM_DEVICE_DFP3_SUPPORT) {
+	    if (IS_DCE3_VARIANT)
+		atombios_output_dig_dpms(output, mode, 2);
+	    else
+		atombios_device_dpms(output, ATOM_DEVICE_DFP3_SUPPORT, mode);
+	}
+    } else if (radeon_output->MonType == MT_CRT) {
+	/*ErrorF("AGD: dac dpms\n");*/
+	if (radeon_output->devices & ATOM_DEVICE_CRT1_SUPPORT)
+	    atombios_device_dpms(output, ATOM_DEVICE_CRT1_SUPPORT, mode);
+	else if (radeon_output->devices & ATOM_DEVICE_CRT2_SUPPORT)
+	    atombios_device_dpms(output, ATOM_DEVICE_CRT2_SUPPORT, mode);
+    } else if (radeon_output->MonType == MT_CV) {
+	/*ErrorF("AGD: cv dpms\n");*/
+	if (radeon_output->devices & ATOM_DEVICE_CV_SUPPORT)
+	    atombios_device_dpms(output, ATOM_DEVICE_CV_SUPPORT, mode);
+    } else if (0 /*radeon_output->MonType == MT_STV ||
+		   radeon_output->MonType == MT_CTV*/) {
+	/*ErrorF("AGD: tv dpms\n");*/
+	if (radeon_output->devices & ATOM_DEVICE_TV1_SUPPORT)
+	    atombios_device_dpms(output, ATOM_DEVICE_TV1_SUPPORT, mode);
+    }
 
 }
 
@@ -803,7 +803,7 @@ atombios_set_output_crtc_source(xf86OutputPtr output)
 
     atombios_get_command_table_version(info->atomBIOS, index, &major, &minor);
 
-    ErrorF("select crtc source table is %d %d\n", major, minor);
+    /*ErrorF("select crtc source table is %d %d\n", major, minor);*/
 
     switch(major) {
     case 1: {
@@ -836,7 +836,7 @@ atombios_set_output_crtc_source(xf86OutputPtr output)
 		    crtc_src_param.ucDevice = ATOM_DEVICE_CV_INDEX;
 	    }
 	    data.exec.pspace = &crtc_src_param;
-	    ErrorF("device sourced: 0x%x\n", crtc_src_param.ucDevice);
+	    /*ErrorF("device sourced: 0x%x\n", crtc_src_param.ucDevice);*/
 	    break;
 	case 2:
 	    crtc_src_param2.ucCRTC = radeon_crtc->crtc_id;
@@ -874,7 +874,7 @@ atombios_set_output_crtc_source(xf86OutputPtr output)
 	    }
 
 	    data.exec.pspace = &crtc_src_param2;
-	    ErrorF("device sourced: 0x%x\n", crtc_src_param2.ucEncoderID);
+	    /*ErrorF("device sourced: 0x%x\n", crtc_src_param2.ucEncoderID);*/
 	    break;
 	}
 	break;
@@ -1049,7 +1049,7 @@ atombios_dac_detect(ScrnInfoPtr pScrn, xf86OutputPtr output)
 	    bios_0_scratch = INREG(R600_BIOS_0_SCRATCH);
 	else
 	    bios_0_scratch = INREG(RADEON_BIOS_0_SCRATCH);
-	ErrorF("DAC connect %08X\n", (unsigned int)bios_0_scratch);
+	/*ErrorF("DAC connect %08X\n", (unsigned int)bios_0_scratch);*/
 
 	if (radeon_output->devices & ATOM_DEVICE_CRT1_SUPPORT) {
 	    if (bios_0_scratch & ATOM_S0_CRT1_MASK)
diff --git a/src/legacy_output.c b/src/legacy_output.c
index 0d6e4f1d..a65a41e0 100644
--- a/src/legacy_output.c
+++ b/src/legacy_output.c
@@ -701,7 +701,7 @@ RADEONEnableDisplay(xf86OutputPtr output, BOOL bEnable)
     }
 
     if (bEnable) {
-	ErrorF("enable montype: %d\n", radeon_output->MonType);
+	/*ErrorF("enable montype: %d\n", radeon_output->MonType);*/
 	if (radeon_output->MonType == MT_CRT) {
 	    if (radeon_output->DACType == DAC_PRIMARY) {
 		info->output_crt1 |= (1 << o);
@@ -775,7 +775,7 @@ RADEONEnableDisplay(xf86OutputPtr output, BOOL bEnable)
 	    radeon_output->tv_on = TRUE;
 	}
     } else {
-	ErrorF("disable montype: %d\n", radeon_output->MonType);
+	/*ErrorF("disable montype: %d\n", radeon_output->MonType);*/
 	if (radeon_output->MonType == MT_CRT) {
 	    if (radeon_output->DACType == DAC_PRIMARY) {
 		info->output_crt1 &= ~(1 << o);
diff --git a/src/radeon_atombios.c b/src/radeon_atombios.c
index 224aae3b..b17b53c9 100644
--- a/src/radeon_atombios.c
+++ b/src/radeon_atombios.c
@@ -2071,7 +2071,7 @@ CailDelayMicroSeconds(VOID *CAIL, UINT32 delay)
 
     usleep(delay);
 
-    DEBUGP(xf86DrvMsg(((atomBiosHandlePtr)CAIL)->scrnIndex,X_INFO,"Delay %i usec\n",delay));
+    /*DEBUGP(xf86DrvMsg(((atomBiosHandlePtr)CAIL)->scrnIndex,X_INFO,"Delay %i usec\n",delay));*/
 }
 
 UINT32
@@ -2084,7 +2084,7 @@ CailReadATIRegister(VOID* CAIL, UINT32 idx)
     CAILFUNC(CAIL);
 
     ret  =  INREG(idx << 2);
-    DEBUGP(ErrorF("%s(%x) = %x\n",__func__,idx << 2,ret));
+    /*DEBUGP(ErrorF("%s(%x) = %x\n",__func__,idx << 2,ret));*/
     return ret;
 }
 
@@ -2097,7 +2097,7 @@ CailWriteATIRegister(VOID *CAIL, UINT32 idx, UINT32 data)
     CAILFUNC(CAIL);
 
     OUTREG(idx << 2,data);
-    DEBUGP(ErrorF("%s(%x,%x)\n",__func__,idx << 2,data));
+    /*DEBUGP(ErrorF("%s(%x,%x)\n",__func__,idx << 2,data));*/
 }
 
 UINT32
@@ -2112,10 +2112,10 @@ CailReadFBData(VOID* CAIL, UINT32 idx)
     if (((atomBiosHandlePtr)CAIL)->fbBase) {
 	CARD8 *FBBase = (CARD8*)info->FB;
 	ret =  *((CARD32*)(FBBase + (((atomBiosHandlePtr)CAIL)->fbBase) + idx));
-	DEBUGP(ErrorF("%s(%x) = %x\n",__func__,idx,ret));
+	/*DEBUGP(ErrorF("%s(%x) = %x\n",__func__,idx,ret));*/
     } else if (((atomBiosHandlePtr)CAIL)->scratchBase) {
 	ret = *(CARD32*)((CARD8*)(((atomBiosHandlePtr)CAIL)->scratchBase) + idx);
-	DEBUGP(ErrorF("%s(%x) = %x\n",__func__,idx,ret));
+	/*DEBUGP(ErrorF("%s(%x) = %x\n",__func__,idx,ret));*/
     } else {
 	xf86DrvMsg(((atomBiosHandlePtr)CAIL)->scrnIndex,X_ERROR,
 		   "%s: no fbbase set\n",__func__);
@@ -2129,7 +2129,7 @@ CailWriteFBData(VOID *CAIL, UINT32 idx, UINT32 data)
 {
     CAILFUNC(CAIL);
 
-    DEBUGP(ErrorF("%s(%x,%x)\n",__func__,idx,data));
+    /*DEBUGP(ErrorF("%s(%x,%x)\n",__func__,idx,data));*/
     if (((atomBiosHandlePtr)CAIL)->fbBase) {
 	CARD8 *FBBase = (CARD8*)
 	    RADEONPTR(xf86Screens[((atomBiosHandlePtr)CAIL)->scrnIndex])->FB;
@@ -2150,7 +2150,7 @@ CailReadMC(VOID *CAIL, ULONG Address)
     CAILFUNC(CAIL);
 
     ret = INMC(pScrn, Address);
-    DEBUGP(ErrorF("%s(%x) = %x\n",__func__,Address,ret));
+    /*DEBUGP(ErrorF("%s(%x) = %x\n",__func__,Address,ret));*/
     return ret;
 }
 
@@ -2160,7 +2160,7 @@ CailWriteMC(VOID *CAIL, ULONG Address, ULONG data)
     ScrnInfoPtr pScrn = xf86Screens[((atomBiosHandlePtr)CAIL)->scrnIndex];
 
     CAILFUNC(CAIL);
-    DEBUGP(ErrorF("%s(%x,%x)\n",__func__,Address,data));
+    /*DEBUGP(ErrorF("%s(%x,%x)\n",__func__,Address,data));*/
     OUTMC(pScrn, Address, data);
 }
 
@@ -2206,7 +2206,7 @@ CailReadPCIConfigData(VOID*CAIL, VOID* ret, UINT32 idx,UINT16 size)
 	return;
 	    break;
     }
-    DEBUGP(ErrorF("%s(%x) = %x\n",__func__,idx,*(unsigned int*)ret));
+    /*DEBUGP(ErrorF("%s(%x) = %x\n",__func__,idx,*(unsigned int*)ret));*/
 
 }
 
@@ -2216,7 +2216,7 @@ CailWritePCIConfigData(VOID*CAIL,VOID*src,UINT32 idx,UINT16 size)
     PCITAG tag = ((atomBiosHandlePtr)CAIL)->PciTag;
 
     CAILFUNC(CAIL);
-    DEBUGP(ErrorF("%s(%x,%x)\n",__func__,idx,(*(unsigned int*)src)));
+    /*DEBUGP(ErrorF("%s(%x,%x)\n",__func__,idx,(*(unsigned int*)src)));*/
     switch (size) {
 	case 8:
 	    pciWriteByte(tag,idx << 2,*(CARD8*)src);
@@ -2244,7 +2244,7 @@ CailReadPLL(VOID *CAIL, ULONG Address)
     CAILFUNC(CAIL);
 
     ret = RADEONINPLL(pScrn, Address);
-    DEBUGP(ErrorF("%s(%x) = %x\n",__func__,Address,ret));
+    /*DEBUGP(ErrorF("%s(%x) = %x\n",__func__,Address,ret));*/
     return ret;
 }
 
@@ -2254,7 +2254,7 @@ CailWritePLL(VOID *CAIL, ULONG Address,ULONG Data)
     ScrnInfoPtr pScrn = xf86Screens[((atomBiosHandlePtr)CAIL)->scrnIndex];
     CAILFUNC(CAIL);
 
-    DEBUGP(ErrorF("%s(%x,%x)\n",__func__,Address,Data));
+    /*DEBUGP(ErrorF("%s(%x,%x)\n",__func__,Address,Data));*/
     RADEONOUTPLL(pScrn, Address, Data);
 }