Merge branch 'master' into agd-atom-merge

Conflicts:

	src/radeon_cursor.c
	src/radeon_output.c

5 files changed, 54 insertions, 46 deletions

diff --git a/src/radeon_cursor.c b/src/radeon_cursor.c
index bf66516b..8cef5d63 100644
--- a/src/radeon_cursor.c
+++ b/src/radeon_cursor.c
@@ -117,29 +117,26 @@ radeon_crtc_show_cursor (xf86CrtcPtr crtc)
     RADEONInfoPtr      info       = RADEONPTR(pScrn);
     unsigned char     *RADEONMMIO = info->MMIO;
 
-#ifdef XF86DRI
-    if (info->CPStarted && pScrn->pScreen) DRILock(pScrn->pScreen, 0);
-#endif
-
-    RADEON_SYNC(info, pScrn);
-
     if (IS_AVIVO_VARIANT) {
 	OUTREG(AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset,
 	       INREG(AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset)
 	       | AVIVO_D1CURSOR_EN);
 	avivo_setup_cursor(crtc, TRUE);
     } else {
-	if (crtc_id == 0) 
-	    OUTREGP(RADEON_CRTC_GEN_CNTL, RADEON_CRTC_CUR_EN | 2 << 20, 
-		    ~(RADEON_CRTC_CUR_EN | RADEON_CRTC_CUR_MODE_MASK));
-	else if (crtc_id == 1)
-	    OUTREGP(RADEON_CRTC2_GEN_CNTL, RADEON_CRTC2_CUR_EN | 2 << 20,
-		    ~(RADEON_CRTC2_CUR_EN | RADEON_CRTC2_CUR_MODE_MASK));
+        switch (crtc_id) {
+        case 0:
+            OUTREG(RADEON_MM_INDEX, RADEON_CRTC_GEN_CNTL);
+	    break;
+        case 1:
+            OUTREG(RADEON_MM_INDEX, RADEON_CRTC2_GEN_CNTL);
+	    break;
+        default:
+            return;
+        }
+
+        OUTREGP(RADEON_MM_DATA, RADEON_CRTC_CUR_EN | 2 << 20, 
+                ~(RADEON_CRTC_CUR_EN | RADEON_CRTC_CUR_MODE_MASK));
     }
-
-#ifdef XF86DRI
-    if (info->CPStarted && pScrn->pScreen) DRIUnlock(pScrn->pScreen);
-#endif
 }
 
 void
@@ -151,27 +148,24 @@ radeon_crtc_hide_cursor (xf86CrtcPtr crtc)
     RADEONInfoPtr      info       = RADEONPTR(pScrn);
     unsigned char     *RADEONMMIO = info->MMIO;
 
-#ifdef XF86DRI
-    if (info->CPStarted && pScrn->pScreen) DRILock(pScrn->pScreen, 0);
-#endif
-
-    RADEON_SYNC(info, pScrn);
-
     if (IS_AVIVO_VARIANT) {
 	OUTREG(AVIVO_D1CUR_CONTROL+ radeon_crtc->crtc_offset,
 	       INREG(AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset)
 	       & ~(AVIVO_D1CURSOR_EN));
 	avivo_setup_cursor(crtc, FALSE);
     } else {
-	if (crtc_id == 0)
-	    OUTREGP(RADEON_CRTC_GEN_CNTL, 0, ~RADEON_CRTC_CUR_EN);
-	else if (crtc_id == 1)
-	    OUTREGP(RADEON_CRTC2_GEN_CNTL, 0, ~RADEON_CRTC2_CUR_EN);
-    }
-
-#ifdef XF86DRI
-    if (info->CPStarted && pScrn->pScreen) DRIUnlock(pScrn->pScreen);
-#endif
+    	case 0:
+            OUTREG(RADEON_MM_INDEX, RADEON_CRTC_GEN_CNTL);
+            break;
+    	case 1:
+	    OUTREG(RADEON_MM_INDEX, RADEON_CRTC2_GEN_CNTL);
+	    break;
+        default:
+	    return;
+        }
+
+        OUTREGP(RADEON_MM_DATA, 0, ~RADEON_CRTC_CUR_EN);
+   }
 }
 
 void
diff --git a/src/radeon_dri.c b/src/radeon_dri.c
index 2c533b1f..ed418b8c 100644
--- a/src/radeon_dri.c
+++ b/src/radeon_dri.c
@@ -722,7 +722,9 @@ static Bool RADEONSetAgpMode(RADEONInfoPtr info, ScreenPtr pScreen)
     unsigned long mode   = drmAgpGetMode(info->drmFD);	/* Default mode */
     unsigned int  vendor = drmAgpVendorId(info->drmFD);
     unsigned int  device = drmAgpDeviceId(info->drmFD);
-    CARD32 agp_status = INREG(RADEON_AGP_STATUS) & mode;
+    /* ignore agp 3.0 mode bit from the chip as it's buggy on some cards with
+       pcie-agp rialto bridge chip - use the one from bridge which must match */
+    CARD32 agp_status = (INREG(RADEON_AGP_STATUS) | RADEON_AGPv3_MODE) & mode;
     Bool is_v3 = (agp_status & RADEON_AGPv3_MODE);
     unsigned int defaultMode;
     MessageType from;
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index e5b87e16..55f279bf 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -6428,7 +6428,7 @@ static Bool RADEONCloseScreen(int scrnIndex, ScreenPtr pScreen)
 #endif /* USE_XAA */
 
     xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
-		   "Disposing cusor info\n");
+		   "Disposing cursor info\n");
     if (info->cursor) xf86DestroyCursorInfoRec(info->cursor);
     info->cursor = NULL;
 
diff --git a/src/radeon_output.c b/src/radeon_output.c
index 59ed8b16..14abb2e4 100644
--- a/src/radeon_output.c
+++ b/src/radeon_output.c
@@ -702,8 +702,6 @@ void RADEONConnectorFindMonitor(ScrnInfoPtr pScrn, xf86OutputPtr output)
 
 static RADEONMonitorType RADEONPortCheckNonDDC(ScrnInfoPtr pScrn, xf86OutputPtr output)
 {
-    RADEONInfoPtr info       = RADEONPTR(pScrn);
-    unsigned char *RADEONMMIO = info->MMIO;
     RADEONOutputPrivatePtr radeon_output = output->driver_private;
     RADEONMonitorType MonType = MT_NONE;
 
@@ -711,7 +709,11 @@ static RADEONMonitorType RADEONPortCheckNonDDC(ScrnInfoPtr pScrn, xf86OutputPtr
 #if defined(__powerpc__)
 	/* not sure on ppc, OF? */
 #else
+	RADEONInfoPtr info       = RADEONPTR(pScrn);
+
 	if (!info->IsAtomBios) {
+	    unsigned char *RADEONMMIO = info->MMIO;
+
 	    /* see if the lid is closed -- only works at boot */
 	    if (INREG(RADEON_BIOS_6_SCRATCH) & 0x10)
 		MonType = MT_NONE;
@@ -720,7 +722,7 @@ static RADEONMonitorType RADEONPortCheckNonDDC(ScrnInfoPtr pScrn, xf86OutputPtr
 	} else
 #endif
 	    MonType = MT_LCD;
-    } else if (OUTPUT_IS_DVI) {
+    } /*else if (radeon_output->type == OUTPUT_DVI) {
 	if (radeon_output->TMDSType == TMDS_INT) {
 	    if (INREG(RADEON_FP_GEN_CNTL) & RADEON_FP_DETECT_SENSE)
 		MonType = MT_DFP;
@@ -728,7 +730,7 @@ static RADEONMonitorType RADEONPortCheckNonDDC(ScrnInfoPtr pScrn, xf86OutputPtr
 	    if (INREG(RADEON_FP2_GEN_CNTL) & RADEON_FP2_DETECT_SENSE)
 		MonType = MT_DFP;
 	}
-    }
+	}*/
 
     xf86DrvMsg(pScrn->scrnIndex, X_INFO,
 	       "Detected non-DDC Monitor Type: %d\n", MonType);
@@ -1078,11 +1080,12 @@ static void RADEONInitDACRegisters(xf86OutputPtr output, RADEONSavePtr save,
     save->dac_macro_cntl = info->SavedReg.dac_macro_cntl;
 }
 
-/* XXX: fix me */
 static void
-RADEONInitTvDacCntl(ScrnInfoPtr pScrn, RADEONSavePtr save)
+RADEONInitTvDacCntl(xf86OutputPtr output, RADEONSavePtr save)
 {
+    ScrnInfoPtr pScrn = output->scrn;
     RADEONInfoPtr  info       = RADEONPTR(pScrn);
+    RADEONOutputPrivatePtr radeon_output = output->driver_private;
 
     if (info->ChipFamily == CHIP_FAMILY_R420 ||
 	info->ChipFamily == CHIP_FAMILY_RV410) {
@@ -1103,10 +1106,11 @@ RADEONInitTvDacCntl(ScrnInfoPtr pScrn, RADEONSavePtr save)
 			       RADEON_TV_DAC_GDACPD |
 			       RADEON_TV_DAC_GDACPD);
     }
-    /* FIXME: doesn't make sense, this just replaces the previous value... */
+
     save->tv_dac_cntl |= (RADEON_TV_DAC_NBLANK |
-			 RADEON_TV_DAC_NHOLD |
-			  RADEON_TV_DAC_STD_PS2);
+			  RADEON_TV_DAC_NHOLD |
+			  RADEON_TV_DAC_STD_PS2 |
+			  radeon_output->tv_dac_adj);
 
 }
 
@@ -1117,7 +1121,7 @@ static void RADEONInitDAC2Registers(xf86OutputPtr output, RADEONSavePtr save,
     RADEONInfoPtr  info       = RADEONPTR(pScrn);
 
     /*0x0028023;*/
-    RADEONInitTvDacCntl(pScrn, save);
+    RADEONInitTvDacCntl(output, save);
 
     if (IS_R300_VARIANT)
 	save->gpiopad_a = info->SavedReg.gpiopad_a | 1;
@@ -1727,7 +1731,12 @@ radeon_detect(xf86OutputPtr output)
 	  if (((radeon_output->type == OUTPUT_VGA || radeon_output->type == OUTPUT_DVI_I) &&
 	       radeon_output->DACType == DAC_TVDAC) ||
 	      (info->IsIGP && radeon_output->type == OUTPUT_DVI_D))
+	      radeon_output->MonType = MT_CRT;
 	      return XF86OutputStatusUnknown;
+	  } else if  (info->IsIGP && radeon_output->type == OUTPUT_DVI) {
+	      radeon_output->MonType = MT_DFP; /* MT_LCD ??? */
+	      return XF86OutputStatusUnknown;
+	  }
       }
 
       if (connected)
@@ -2739,6 +2748,7 @@ void RADEONInitConnector(xf86OutputPtr output)
 
     if (OUTPUT_IS_TV) {
 	RADEONGetTVInfo(output);
+	RADEONGetTVDacAdjInfo(output);
     }
 
     if (radeon_output->DACType == DAC_TVDAC) {
diff --git a/src/radeon_tv.c b/src/radeon_tv.c
index 3a26a0a7..2a8873c8 100644
--- a/src/radeon_tv.c
+++ b/src/radeon_tv.c
@@ -434,7 +434,7 @@ void RADEONInitTVRegisters(xf86OutputPtr output, RADEONSavePtr save,
 
     save->tv_vscaler_cntl2 = ((save->tv_vscaler_cntl2 & 0x00fffff0)
 			      | (0x10 << 24)
-			      | RADEON_DITHER_MODE 
+			      | RADEON_DITHER_MODE
 			      | RADEON_Y_OUTPUT_DITHER_EN
 			      | RADEON_UV_OUTPUT_DITHER_EN
 			      | RADEON_UV_TO_BUF_DITHER_EN);
@@ -444,10 +444,12 @@ void RADEONInitTVRegisters(xf86OutputPtr output, RADEONSavePtr save,
     tmp = (tmp << RADEON_UV_OUTPUT_POST_SCALE_SHIFT) | 0x000b0000;
     save->tv_timing_cntl = tmp;
 
-    save->tv_dac_cntl = RADEON_TV_DAC_NBLANK | RADEON_TV_DAC_NHOLD | (8 << 16) | (6 << 20);
+    save->tv_dac_cntl = (RADEON_TV_DAC_NBLANK |
+			 RADEON_TV_DAC_NHOLD |
+			 radeon_output->tv_dac_adj /*(8 << 16) | (6 << 20)*/);
 
     if (radeon_output->tvStd == TV_STD_NTSC ||
-        radeon_output->tvStd == TV_STD_NTSC_J)
+	radeon_output->tvStd == TV_STD_NTSC_J)
 	save->tv_dac_cntl |= RADEON_TV_DAC_STD_NTSC;
     else
 	save->tv_dac_cntl |= RADEON_TV_DAC_STD_PAL;