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authorAlex Deucher <alex@botch2.(none)>2007-11-16 02:43:00 -0500
committerAlex Deucher <alex@botch2.(none)>2007-11-16 02:43:00 -0500
commit7d06a8791839ce6b22e2449646832b79cebf1b21 (patch)
tree88f997df699448bc51c7938514ee199a67363fbc /src
parent3e62730f79a13883a65a568bc821bc56055a4ab7 (diff)
WIP: sync up with the latest ATOM bios code in rhd
doesn't compile ATM
Diffstat (limited to 'src')
-rw-r--r--src/AtomBios/includes/CD_Common_Types.h6
-rw-r--r--src/AtomBios/includes/ObjectID.h448
-rw-r--r--src/radeon.h5
-rw-r--r--src/radeon_atombios.c2015
-rw-r--r--src/radeon_atombios.h107
-rw-r--r--src/radeon_bios.c7
6 files changed, 2102 insertions, 486 deletions
diff --git a/src/AtomBios/includes/CD_Common_Types.h b/src/AtomBios/includes/CD_Common_Types.h
index 7a0f27f0..44a0b351 100644
--- a/src/AtomBios/includes/CD_Common_Types.h
+++ b/src/AtomBios/includes/CD_Common_Types.h
@@ -47,7 +47,7 @@ Revision History:
// typedef __int64 int64_t;
typedef unsigned __int32 uint32_t;
typedef __int32 int32_t;
-#elif defined (linux) || defined (__NetBSD__)
+#elif defined (__linux__) || defined (__NetBSD__) || defined(__sun) || defined(__OpenBSD__) || defined (__FreeBSD__)
typedef unsigned int uint32_t;
typedef int int32_t;
#else
@@ -55,7 +55,11 @@ Revision History:
typedef signed long int32_t;
#endif
typedef unsigned char uint8_t;
+#if (defined(__sun) && defined(_CHAR_IS_SIGNED))
+ typedef char int8_t;
+#else
typedef signed char int8_t;
+#endif
typedef unsigned short uint16_t;
typedef signed short int16_t;
#endif
diff --git a/src/AtomBios/includes/ObjectID.h b/src/AtomBios/includes/ObjectID.h
new file mode 100644
index 00000000..a630c692
--- /dev/null
+++ b/src/AtomBios/includes/ObjectID.h
@@ -0,0 +1,448 @@
+/*
+* Copyright 2006-2007 Advanced Micro Devices, Inc.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a
+* copy of this software and associated documentation files (the "Software"),
+* to deal in the Software without restriction, including without limitation
+* the rights to use, copy, modify, merge, publish, distribute, sublicense,
+* and/or sell copies of the Software, and to permit persons to whom the
+* Software is furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+* OTHER DEALINGS IN THE SOFTWARE.
+*/
+/* based on stg/asic_reg/drivers/inc/asic_reg/ObjectID.h ver 23 */
+
+#ifndef _OBJECTID_H
+#define _OBJECTID_H
+
+#if defined(_X86_)
+#pragma pack(1)
+#endif
+
+/****************************************************/
+/* Graphics Object Type Definition */
+/****************************************************/
+#define GRAPH_OBJECT_TYPE_NONE 0x0
+#define GRAPH_OBJECT_TYPE_GPU 0x1
+#define GRAPH_OBJECT_TYPE_ENCODER 0x2
+#define GRAPH_OBJECT_TYPE_CONNECTOR 0x3
+#define GRAPH_OBJECT_TYPE_ROUTER 0x4
+/* deleted */
+
+/****************************************************/
+/* Encoder Object ID Definition */
+/****************************************************/
+#define ENCODER_OBJECT_ID_NONE 0x00
+
+/* Radeon Class Display Hardware */
+#define ENCODER_OBJECT_ID_INTERNAL_LVDS 0x01
+#define ENCODER_OBJECT_ID_INTERNAL_TMDS1 0x02
+#define ENCODER_OBJECT_ID_INTERNAL_TMDS2 0x03
+#define ENCODER_OBJECT_ID_INTERNAL_DAC1 0x04
+#define ENCODER_OBJECT_ID_INTERNAL_DAC2 0x05 /* TV/CV DAC */
+#define ENCODER_OBJECT_ID_INTERNAL_SDVOA 0x06
+#define ENCODER_OBJECT_ID_INTERNAL_SDVOB 0x07
+
+/* External Third Party Encoders */
+#define ENCODER_OBJECT_ID_SI170B 0x08
+#define ENCODER_OBJECT_ID_CH7303 0x09
+#define ENCODER_OBJECT_ID_CH7301 0x0A
+#define ENCODER_OBJECT_ID_INTERNAL_DVO1 0x0B /* This belongs to Radeon Class Display Hardware */
+#define ENCODER_OBJECT_ID_EXTERNAL_SDVOA 0x0C
+#define ENCODER_OBJECT_ID_EXTERNAL_SDVOB 0x0D
+#define ENCODER_OBJECT_ID_TITFP513 0x0E
+#define ENCODER_OBJECT_ID_INTERNAL_LVTM1 0x0F /* not used for Radeon */
+#define ENCODER_OBJECT_ID_VT1623 0x10
+#define ENCODER_OBJECT_ID_HDMI_SI1930 0x11
+#define ENCODER_OBJECT_ID_HDMI_INTERNAL 0x12
+/* Kaleidoscope (KLDSCP) Class Display Hardware (internal) */
+#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 0x13
+#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1 0x14
+#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1 0x15
+#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2 0x16 /* Shared with CV/TV and CRT */
+#define ENCODER_OBJECT_ID_SI178 0X17 /* External TMDS (dual link, no HDCP.) */
+#define ENCODER_OBJECT_ID_MVPU_FPGA 0x18 /* MVPU FPGA chip */
+#define ENCODER_OBJECT_ID_INTERNAL_DDI 0x19
+#define ENCODER_OBJECT_ID_VT1625 0x1A
+#define ENCODER_OBJECT_ID_HDMI_SI1932 0x1B
+#define ENCODER_OBJECT_ID_DP_AN9801 0x1C
+#define ENCODER_OBJECT_ID_DP_DP501 0x1D
+
+/****************************************************/
+/* Connector Object ID Definition */
+/****************************************************/
+#define CONNECTOR_OBJECT_ID_NONE 0x00
+#define CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I 0x01
+#define CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I 0x02
+#define CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D 0x03
+#define CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D 0x04
+#define CONNECTOR_OBJECT_ID_VGA 0x05
+#define CONNECTOR_OBJECT_ID_COMPOSITE 0x06
+#define CONNECTOR_OBJECT_ID_SVIDEO 0x07
+#define CONNECTOR_OBJECT_ID_YPbPr 0x08
+#define CONNECTOR_OBJECT_ID_D_CONNECTOR 0x09
+#define CONNECTOR_OBJECT_ID_9PIN_DIN 0x0A /* Supports both CV & TV */
+#define CONNECTOR_OBJECT_ID_SCART 0x0B
+#define CONNECTOR_OBJECT_ID_HDMI_TYPE_A 0x0C
+#define CONNECTOR_OBJECT_ID_HDMI_TYPE_B 0x0D
+#define CONNECTOR_OBJECT_ID_LVDS 0x0E
+#define CONNECTOR_OBJECT_ID_7PIN_DIN 0x0F
+#define CONNECTOR_OBJECT_ID_PCIE_CONNECTOR 0x10
+#define CONNECTOR_OBJECT_ID_CROSSFIRE 0x11
+#define CONNECTOR_OBJECT_ID_HARDCODE_DVI 0x12
+#define CONNECTOR_OBJECT_ID_DISPLAYPORT 0x13
+
+/* deleted */
+
+/****************************************************/
+/* Router Object ID Definition */
+/****************************************************/
+#define ROUTER_OBJECT_ID_NONE 0x00
+#define ROUTER_OBJECT_ID_I2C_EXTENDER_CNTL 0x01
+
+/****************************************************/
+// Graphics Object ENUM ID Definition */
+/****************************************************/
+#define GRAPH_OBJECT_ENUM_ID1 0x01
+#define GRAPH_OBJECT_ENUM_ID2 0x02
+#define GRAPH_OBJECT_ENUM_ID3 0x03
+#define GRAPH_OBJECT_ENUM_ID4 0x04
+
+/****************************************************/
+/* Graphics Object ID Bit definition */
+/****************************************************/
+#define OBJECT_ID_MASK 0x00FF
+#define ENUM_ID_MASK 0x0700
+#define RESERVED1_ID_MASK 0x0800
+#define OBJECT_TYPE_MASK 0x7000
+#define RESERVED2_ID_MASK 0x8000
+
+#define OBJECT_ID_SHIFT 0x00
+#define ENUM_ID_SHIFT 0x08
+#define OBJECT_TYPE_SHIFT 0x0C
+
+
+/****************************************************/
+/* Graphics Object family definition */
+/****************************************************/
+#define CONSTRUCTOBJECTFAMILYID(GRAPHICS_OBJECT_TYPE, GRAPHICS_OBJECT_ID) (GRAPHICS_OBJECT_TYPE << OBJECT_TYPE_SHIFT | \
+ GRAPHICS_OBJECT_ID << OBJECT_ID_SHIFT)
+/****************************************************/
+/* GPU Object ID definition - Shared with BIOS */
+/****************************************************/
+#define GPU_ENUM_ID1 ( GRAPH_OBJECT_TYPE_GPU << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT)
+
+/****************************************************/
+/* Encoder Object ID definition - Shared with BIOS */
+/****************************************************/
+/*
+#define ENCODER_INTERNAL_LVDS_ENUM_ID1 0x2101
+#define ENCODER_INTERNAL_TMDS1_ENUM_ID1 0x2102
+#define ENCODER_INTERNAL_TMDS2_ENUM_ID1 0x2103
+#define ENCODER_INTERNAL_DAC1_ENUM_ID1 0x2104
+#define ENCODER_INTERNAL_DAC2_ENUM_ID1 0x2105
+#define ENCODER_INTERNAL_SDVOA_ENUM_ID1 0x2106
+#define ENCODER_INTERNAL_SDVOB_ENUM_ID1 0x2107
+#define ENCODER_SIL170B_ENUM_ID1 0x2108
+#define ENCODER_CH7303_ENUM_ID1 0x2109
+#define ENCODER_CH7301_ENUM_ID1 0x210A
+#define ENCODER_INTERNAL_DVO1_ENUM_ID1 0x210B
+#define ENCODER_EXTERNAL_SDVOA_ENUM_ID1 0x210C
+#define ENCODER_EXTERNAL_SDVOB_ENUM_ID1 0x210D
+#define ENCODER_TITFP513_ENUM_ID1 0x210E
+#define ENCODER_INTERNAL_LVTM1_ENUM_ID1 0x210F
+#define ENCODER_VT1623_ENUM_ID1 0x2110
+#define ENCODER_HDMI_SI1930_ENUM_ID1 0x2111
+#define ENCODER_HDMI_INTERNAL_ENUM_ID1 0x2112
+#define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1 0x2113
+#define ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1 0x2114
+#define ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1 0x2115
+#define ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1 0x2116
+#define ENCODER_SI178_ENUM_ID1 0x2117
+#define ENCODER_MVPU_FPGA_ENUM_ID1 0x2118
+#define ENCODER_INTERNAL_DDI_ENUM_ID1 0x2119
+#define ENCODER_VT1625_ENUM_ID1 0x211A
+*/
+#define ENCODER_INTERNAL_LVDS_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_INTERNAL_LVDS << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_TMDS1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_INTERNAL_TMDS1 << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_TMDS2_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_INTERNAL_TMDS2 << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_DAC1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_INTERNAL_DAC1 << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_DAC2_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_INTERNAL_DAC2 << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_SDVOA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_INTERNAL_SDVOA << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_SDVOA_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_INTERNAL_SDVOA << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_SDVOB_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_INTERNAL_SDVOB << OBJECT_ID_SHIFT)
+
+#define ENCODER_SIL170B_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_SI170B << OBJECT_ID_SHIFT)
+
+#define ENCODER_CH7303_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_CH7303 << OBJECT_ID_SHIFT)
+
+#define ENCODER_CH7301_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_CH7301 << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_DVO1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_INTERNAL_DVO1 << OBJECT_ID_SHIFT)
+
+#define ENCODER_EXTERNAL_SDVOA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_EXTERNAL_SDVOA << OBJECT_ID_SHIFT)
+
+#define ENCODER_EXTERNAL_SDVOA_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_EXTERNAL_SDVOA << OBJECT_ID_SHIFT)
+
+
+#define ENCODER_EXTERNAL_SDVOB_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_EXTERNAL_SDVOB << OBJECT_ID_SHIFT)
+
+
+#define ENCODER_TITFP513_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_TITFP513 << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_LVTM1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_INTERNAL_LVTM1 << OBJECT_ID_SHIFT)
+
+#define ENCODER_VT1623_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_VT1623 << OBJECT_ID_SHIFT)
+
+#define ENCODER_HDMI_SI1930_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_HDMI_SI1930 << OBJECT_ID_SHIFT)
+
+#define ENCODER_HDMI_INTERNAL_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_HDMI_INTERNAL << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 << OBJECT_ID_SHIFT)
+
+
+#define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 << OBJECT_ID_SHIFT)
+
+
+#define ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1 << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1 << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2 << OBJECT_ID_SHIFT) // Shared with CV/TV and CRT
+
+#define ENCODER_SI178_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_SI178 << OBJECT_ID_SHIFT)
+
+#define ENCODER_MVPU_FPGA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_MVPU_FPGA << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_DDI_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_INTERNAL_DDI << OBJECT_ID_SHIFT)
+
+#define ENCODER_VT1625_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_VT1625 << OBJECT_ID_SHIFT)
+
+#define ENCODER_HDMI_SI1932_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_HDMI_SI1932 << OBJECT_ID_SHIFT)
+
+#define ENCODER_DP_DP501_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_DP_DP501 << OBJECT_ID_SHIFT)
+
+#define ENCODER_DP_AN9801_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ ENCODER_OBJECT_ID_DP_AN9801 << OBJECT_ID_SHIFT)
+/****************************************************/
+/* Connector Object ID definition - Shared with BIOS */
+/****************************************************/
+/*
+#define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID1 0x3101
+#define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID1 0x3102
+#define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID1 0x3103
+#define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID1 0x3104
+#define CONNECTOR_VGA_ENUM_ID1 0x3105
+#define CONNECTOR_COMPOSITE_ENUM_ID1 0x3106
+#define CONNECTOR_SVIDEO_ENUM_ID1 0x3107
+#define CONNECTOR_YPbPr_ENUM_ID1 0x3108
+#define CONNECTOR_D_CONNECTORE_ENUM_ID1 0x3109
+#define CONNECTOR_9PIN_DIN_ENUM_ID1 0x310A
+#define CONNECTOR_SCART_ENUM_ID1 0x310B
+#define CONNECTOR_HDMI_TYPE_A_ENUM_ID1 0x310C
+#define CONNECTOR_HDMI_TYPE_B_ENUM_ID1 0x310D
+#define CONNECTOR_LVDS_ENUM_ID1 0x310E
+#define CONNECTOR_7PIN_DIN_ENUM_ID1 0x310F
+#define CONNECTOR_PCIE_CONNECTOR_ENUM_ID1 0x3110
+*/
+#define CONNECTOR_LVDS_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ CONNECTOR_OBJECT_ID_LVDS << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+ CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+ CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_VGA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ CONNECTOR_OBJECT_ID_VGA << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_COMPOSITE_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ CONNECTOR_OBJECT_ID_COMPOSITE << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_SVIDEO_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ CONNECTOR_OBJECT_ID_SVIDEO << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_YPbPr_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ CONNECTOR_OBJECT_ID_YPbPr << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_D_CONNECTOR_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ CONNECTOR_OBJECT_ID_D_CONNECTOR << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_9PIN_DIN_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ CONNECTOR_OBJECT_ID_9PIN_DIN << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_SCART_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ CONNECTOR_OBJECT_ID_SCART << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_HDMI_TYPE_A_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ CONNECTOR_OBJECT_ID_HDMI_TYPE_A << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_HDMI_TYPE_B_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ CONNECTOR_OBJECT_ID_HDMI_TYPE_B << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_7PIN_DIN_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ CONNECTOR_OBJECT_ID_7PIN_DIN << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_PCIE_CONNECTOR_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ CONNECTOR_OBJECT_ID_PCIE_CONNECTOR << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_CROSSFIRE_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ CONNECTOR_OBJECT_ID_CROSSFIRE << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_CROSSFIRE_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+ CONNECTOR_OBJECT_ID_CROSSFIRE << OBJECT_ID_SHIFT)
+
+
+#define CONNECTOR_HARDCODE_DVI_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ CONNECTOR_OBJECT_ID_HARDCODE_DVI << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_HARDCODE_DVI_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+ CONNECTOR_OBJECT_ID_HARDCODE_DVI << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_DISPLAYPORT_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
+/****************************************************/
+/* Router Object ID definition - Shared with BIOS */
+/****************************************************/
+#define ROUTER_I2C_EXTENDER_CNTL_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ROUTER << OBJECT_TYPE_SHIFT |\
+ GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+ ROUTER_OBJECT_ID_I2C_EXTENDER_CNTL << OBJECT_ID_SHIFT)
+
+/* deleted */
+
+/****************************************************/
+/* Object Cap definition - Shared with BIOS */
+/****************************************************/
+#define GRAPHICS_OBJECT_CAP_I2C 0x00000001L
+#define GRAPHICS_OBJECT_CAP_TABLE_ID 0x00000002L
+
+
+#define GRAPHICS_OBJECT_I2CCOMMAND_TABLE_ID 0x01
+#define GRAPHICS_OBJECT_HOTPLUGDETECTIONINTERUPT_TABLE_ID 0x02
+#define GRAPHICS_OBJECT_ENCODER_OUTPUT_PROTECTION_TABLE_ID 0x03
+
+#if defined(_X86_)
+#pragma pack()
+#endif
+
+#endif /*GRAPHICTYPE */
+
+
+
+
diff --git a/src/radeon.h b/src/radeon.h
index 7c326935..fc3509aa 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -543,7 +543,7 @@ typedef enum {
CARD_PCIE
} RADEONCardType;
-typedef struct _atomBIOSHandle *atomBIOSHandlePtr;
+typedef struct _atomBiosHandle *atomBiosHandlePtr;
typedef struct {
EntityInfoPtr pEnt;
@@ -919,8 +919,9 @@ typedef struct {
RADEONMacModel MacModel;
#endif
- atomBIOSHandlePtr atomBIOS;
+ atomBiosHandlePtr atomBIOS;
unsigned long FbFreeStart, FbFreeSize;
+ unsigned char* BIOSCopy;
int cursor_width;
int cursor_height;
diff --git a/src/radeon_atombios.c b/src/radeon_atombios.c
index 009df2ff..a16c1f23 100644
--- a/src/radeon_atombios.c
+++ b/src/radeon_atombios.c
@@ -28,6 +28,11 @@
#endif
#include "xf86.h"
#include "xf86_OSproc.h"
+#include "xf86_ansic.h"
+#include "xf86Pci.h"
+
+#include "xf86.h"
+#include "xf86_OSproc.h"
#include "radeon.h"
#include "radeon_atombios.h"
#include "radeon_macros.h"
@@ -37,38 +42,149 @@
#warning pciaccess defined
#endif
-char *AtomBIOSQueryStr[] = {
- "Default Engine Clock",
- "Default Memory Clock",
- "Maximum Pixel ClockPLL Frequency Output",
- "Minimum Pixel ClockPLL Frequency Output",
- "Maximum Pixel ClockPLL Frequency Input",
- "Minimum Pixel ClockPLL Frequency Input",
- "Minimum Pixel Clock",
- "Reference Clock",
- "Start of VRAM area used by Firmware",
- "Framebuffer space used by Firmware (kb)",
- "TDMS Frequency",
- "PLL ChargePump",
- "PLL DutyCycle",
- "PLL VCO Gain",
- "PLL VoltageSwing"
+/* only for testing now */
+#include "xf86DDC.h"
+
+typedef AtomBiosResult (*AtomBiosRequestFunc)(atomBiosHandlePtr handle,
+ AtomBiosRequestID unused, AtomBiosArgPtr data);
+typedef struct rhdConnectorInfo *rhdConnectorInfoPtr;
+
+static AtomBiosResult rhdAtomInit(atomBiosHandlePtr unused1,
+ AtomBiosRequestID unused2, AtomBiosArgPtr data);
+static AtomBiosResult rhdAtomTearDown(atomBiosHandlePtr handle,
+ AtomBiosRequestID unused1, AtomBiosArgPtr unused2);
+static AtomBiosResult rhdAtomVramInfoQuery(atomBiosHandlePtr handle,
+ AtomBiosRequestID func, AtomBiosArgPtr data);
+static AtomBiosResult rhdAtomTmdsInfoQuery(atomBiosHandlePtr handle,
+ AtomBiosRequestID func, AtomBiosArgPtr data);
+static AtomBiosResult rhdAtomAllocateFbScratch(atomBiosHandlePtr handle,
+ AtomBiosRequestID func, AtomBiosArgPtr data);
+static AtomBiosResult rhdAtomLvdsGetTimings(atomBiosHandlePtr handle,
+ AtomBiosRequestID unused, AtomBiosArgPtr data);
+static AtomBiosResult rhdAtomLvdsInfoQuery(atomBiosHandlePtr handle,
+ AtomBiosRequestID func, AtomBiosArgPtr data);
+static AtomBiosResult rhdAtomGPIOI2CInfoQuery(atomBiosHandlePtr handle,
+ AtomBiosRequestID func, AtomBiosArgPtr data);
+static AtomBiosResult rhdAtomFirmwareInfoQuery(atomBiosHandlePtr handle,
+ AtomBiosRequestID func, AtomBiosArgPtr data);
+static AtomBiosResult rhdAtomConnectorInfo(atomBiosHandlePtr handle,
+ AtomBiosRequestID unused, AtomBiosArgPtr data);
+# ifdef ATOM_BIOS_PARSER
+static AtomBiosResult rhdAtomExec(atomBiosHandlePtr handle,
+ AtomBiosRequestID unused, AtomBiosArgPtr data);
+# endif
+static AtomBiosResult
+rhdAtomCompassionateDataQuery(atomBiosHandlePtr handle,
+ AtomBiosRequestID func, AtomBiosArgPtr data);
+
+
+enum msgDataFormat {
+ MSG_FORMAT_NONE,
+ MSG_FORMAT_HEX,
+ MSG_FORMAT_DEC
};
-char *AtomBIOSFuncStr[] = {
- "AtomBIOS Init",
- "AtomBIOS Teardown",
- "AtomBIOS Exec",
- "AtomBIOS Set FB Space"
+struct atomBIOSRequests {
+ AtomBiosRequestID id;
+ AtomBiosRequestFunc request;
+ char *message;
+ enum msgDataFormat message_format;
+} AtomBiosRequestList [] = {
+ {ATOMBIOS_INIT, rhdAtomInit,
+ "AtomBIOS Init", MSG_FORMAT_NONE},
+ {ATOMBIOS_TEARDOWN, rhdAtomTearDown,
+ "AtomBIOS Teardown", MSG_FORMAT_NONE},
+# ifdef ATOM_BIOS_PARSER
+ {ATOMBIOS_EXEC, rhdAtomExec,
+ "AtomBIOS Exec", MSG_FORMAT_NONE},
+#endif
+ {ATOMBIOS_ALLOCATE_FB_SCRATCH, rhdAtomAllocateFbScratch,
+ "AtomBIOS Set FB Space", MSG_FORMAT_NONE},
+ {ATOMBIOS_GET_CONNECTORS, rhdAtomConnectorInfo,
+ "AtomBIOS Get Connectors", MSG_FORMAT_NONE},
+ {ATOMBIOS_GET_PANEL_MODE, rhdAtomLvdsGetTimings,
+ "AtomBIOS Get Panel Mode", MSG_FORMAT_NONE},
+ {ATOMBIOS_GET_PANEL_EDID, rhdAtomLvdsGetTimings,
+ "AtomBIOS Get Panel EDID", MSG_FORMAT_NONE},
+ {GET_DEFAULT_ENGINE_CLOCK, rhdAtomFirmwareInfoQuery,
+ "Default Engine Clock", MSG_FORMAT_DEC},
+ {GET_DEFAULT_MEMORY_CLOCK, rhdAtomFirmwareInfoQuery,
+ "Default Memory Clock", MSG_FORMAT_DEC},
+ {GET_MAX_PIXEL_CLOCK_PLL_OUTPUT, rhdAtomFirmwareInfoQuery,
+ "Maximum Pixel ClockPLL Frequency Output", MSG_FORMAT_DEC},
+ {GET_MIN_PIXEL_CLOCK_PLL_OUTPUT, rhdAtomFirmwareInfoQuery,
+ "Minimum Pixel ClockPLL Frequency Output", MSG_FORMAT_DEC},
+ {GET_MAX_PIXEL_CLOCK_PLL_INPUT, rhdAtomFirmwareInfoQuery,
+ "Maximum Pixel ClockPLL Frequency Input", MSG_FORMAT_DEC},
+ {GET_MIN_PIXEL_CLOCK_PLL_INPUT, rhdAtomFirmwareInfoQuery,
+ "Minimum Pixel ClockPLL Frequency Input", MSG_FORMAT_DEC},
+ {GET_MAX_PIXEL_CLK, rhdAtomFirmwareInfoQuery,
+ "Maximum Pixel Clock", MSG_FORMAT_DEC},
+ {GET_REF_CLOCK, rhdAtomFirmwareInfoQuery,
+ "Reference Clock", MSG_FORMAT_DEC},
+ {GET_FW_FB_START, rhdAtomVramInfoQuery,
+ "Start of VRAM area used by Firmware", MSG_FORMAT_HEX},
+ {GET_FW_FB_SIZE, rhdAtomVramInfoQuery,
+ "Framebuffer space used by Firmware (kb)", MSG_FORMAT_DEC},
+ {ATOM_TMDS_FREQUENCY, rhdAtomTmdsInfoQuery,
+ "TMDS Frequency", MSG_FORMAT_DEC},
+ {ATOM_TMDS_PLL_CHARGE_PUMP, rhdAtomTmdsInfoQuery,
+ "TMDS PLL ChargePump", MSG_FORMAT_DEC},
+ {ATOM_TMDS_PLL_DUTY_CYCLE, rhdAtomTmdsInfoQuery,
+ "TMDS PLL DutyCycle", MSG_FORMAT_DEC},
+ {ATOM_TMDS_PLL_VCO_GAIN, rhdAtomTmdsInfoQuery,
+ "TMDS PLL VCO Gain", MSG_FORMAT_DEC},
+ {ATOM_TMDS_PLL_VOLTAGE_SWING, rhdAtomTmdsInfoQuery,
+ "TMDS PLL VoltageSwing", MSG_FORMAT_DEC},
+ {ATOM_LVDS_SUPPORTED_REFRESH_RATE, rhdAtomLvdsInfoQuery,
+ "LVDS Supported Refresh Rate", MSG_FORMAT_DEC},
+ {ATOM_LVDS_OFF_DELAY, rhdAtomLvdsInfoQuery,
+ "LVDS Off Delay", MSG_FORMAT_DEC},
+ {ATOM_LVDS_SEQ_DIG_ONTO_DE, rhdAtomLvdsInfoQuery,
+ "LVDS SEQ Dig onto DE", MSG_FORMAT_DEC},
+ {ATOM_LVDS_SEQ_DE_TO_BL, rhdAtomLvdsInfoQuery,
+ "LVDS SEQ DE to BL", MSG_FORMAT_DEC},
+ {ATOM_LVDS_DITHER, rhdAtomLvdsInfoQuery,
+ "LVDS Ditherc", MSG_FORMAT_HEX},
+ {ATOM_LVDS_DUALLINK, rhdAtomLvdsInfoQuery,
+ "LVDS Duallink", MSG_FORMAT_HEX},
+ {ATOM_LVDS_GREYLVL, rhdAtomLvdsInfoQuery,
+ "LVDS Grey Level", MSG_FORMAT_HEX},
+ {ATOM_LVDS_FPDI, rhdAtomLvdsInfoQuery,
+ "LVDS FPDI", MSG_FORMAT_HEX},
+ {ATOM_LVDS_24BIT, rhdAtomLvdsInfoQuery,
+ "LVDS 24Bit", MSG_FORMAT_HEX},
+ {ATOM_GPIO_I2C_CLK_MASK, rhdAtomGPIOI2CInfoQuery,
+ "GPIO_I2C_Clk_Mask", MSG_FORMAT_HEX},
+ {ATOM_DAC1_BG_ADJ, rhdAtomCompassionateDataQuery,
+ "DAC1 BG Adjustment", MSG_FORMAT_HEX},
+ {ATOM_DAC1_DAC_ADJ, rhdAtomCompassionateDataQuery,
+ "DAC1 DAC Adjustment", MSG_FORMAT_HEX},
+ {ATOM_DAC1_FORCE, rhdAtomCompassionateDataQuery,
+ "DAC1 Force Data", MSG_FORMAT_HEX},
+ {ATOM_DAC2_CRTC2_BG_ADJ, rhdAtomCompassionateDataQuery,
+ "DAC2_CRTC2 BG Adjustment", MSG_FORMAT_HEX},
+ {ATOM_DAC2_CRTC2_DAC_ADJ, rhdAtomCompassionateDataQuery,
+ "DAC2_CRTC2 DAC Adjustment", MSG_FORMAT_HEX},
+ {ATOM_DAC2_CRTC2_FORCE, rhdAtomCompassionateDataQuery,
+ "DAC2_CRTC2 Force", MSG_FORMAT_HEX},
+ {ATOM_DAC2_CRTC2_MUX_REG_IND,rhdAtomCompassionateDataQuery,
+ "DAC2_CRTC2 Mux Register Index", MSG_FORMAT_HEX},
+ {ATOM_DAC2_CRTC2_MUX_REG_INFO,rhdAtomCompassionateDataQuery,
+ "DAC2_CRTC2 Mux Register Info", MSG_FORMAT_HEX},
+ {FUNC_END, NULL,
+ NULL, MSG_FORMAT_NONE}
};
-#define DEBUGP(x) {x;}
-#define LOG_DEBUG 7
+enum {
+ legacyBIOSLocation = 0xC0000,
+ legacyBIOSMax = 0x10000
+};
-#ifdef ATOM_BIOS
-# define LOG_CAIL LOG_DEBUG + 1
+# ifdef ATOM_BIOS_PARSER
+
+# define LOG_CAIL LOG_DEBUG + 1
-#ifdef ATOM_BIOS_PARSER
static void
CailDebug(int scrnIndex, const char *format, ...)
{
@@ -78,19 +194,13 @@ CailDebug(int scrnIndex, const char *format, ...)
xf86VDrvMsgVerb(scrnIndex, X_INFO, LOG_CAIL, format, ap);
va_end(ap);
}
-#endif
+# define CAILFUNC(ptr) \
+ CailDebug(((atomBiosHandlePtr)(ptr))->scrnIndex, "CAIL: %s\n", __func__)
-# define CAILFUNC(ptr) \
- CailDebug(((atomBIOSHandlePtr)(ptr))->scrnIndex, "CAIL: %s\n", __func__)
-
-
-enum {
- legacyBIOSLocation = 0xC0000,
- legacyBIOSMax = 0x10000
-};
+# endif
static int
-rhdAnalyzeCommonHdr(ATOM_COMMON_TABLE_HEADER *hdr)
+rhdAtomAnalyzeCommonHdr(ATOM_COMMON_TABLE_HEADER *hdr)
{
if (hdr->usStructureSize == 0xaa55)
return FALSE;
@@ -99,34 +209,33 @@ rhdAnalyzeCommonHdr(ATOM_COMMON_TABLE_HEADER *hdr)
}
static int
-rhdAnalyzeRomHdr(unsigned char *rombase,
+rhdAtomAnalyzeRomHdr(unsigned char *rombase,
ATOM_ROM_HEADER *hdr,
- int *data_offset, int *command_offset)
+ unsigned int *data_offset)
{
- if (rhdAnalyzeCommonHdr(&hdr->sHeader) == -1) {
+ if (!rhdAtomAnalyzeCommonHdr(&hdr->sHeader)) {
return FALSE;
}
- xf86ErrorF("\tSubsysemVendorID: 0x%4.4x SubsystemID: 0x%4.4x\n",
+ xf86DrvMsg(-1,X_NONE,"\tSubsystemVendorID: 0x%4.4x SubsystemID: 0x%4.4x\n",
hdr->usSubsystemVendorID,hdr->usSubsystemID);
- xf86ErrorF("\tIOBaseAddress: 0x%4.4x\n",hdr->usIoBaseAddress);
- xf86ErrorFVerb(3,"\tFilename: %s\n",rombase + hdr->usConfigFilenameOffset);
- xf86ErrorFVerb(3,"\tBIOS Bootup Message: %s\n",
+ xf86DrvMsg(-1,X_NONE,"\tIOBaseAddress: 0x%4.4x\n",hdr->usIoBaseAddress);
+ xf86DrvMsgVerb(-1,X_NONE,3,"\tFilename: %s\n",rombase + hdr->usConfigFilenameOffset);
+ xf86DrvMsgVerb(-1,X_NONE,3,"\tBIOS Bootup Message: %s\n",
rombase + hdr->usBIOS_BootupMessageOffset);
*data_offset = hdr->usMasterDataTableOffset;
- *command_offset = hdr->usMasterCommandTableOffset;
return TRUE;
}
static int
-rhdAnalyzeRomDataTable(unsigned char *base, int offset,
- void *ptr,short *size)
+rhdAtomAnalyzeRomDataTable(unsigned char *base, int offset,
+ void *ptr,unsigned short *size)
{
ATOM_COMMON_TABLE_HEADER *table = (ATOM_COMMON_TABLE_HEADER *)
(base + offset);
- if (!*size || rhdAnalyzeCommonHdr(table) == -1) {
+ if (!*size || !rhdAtomAnalyzeCommonHdr(table)) {
if (*size) *size -= 2;
*(void **)ptr = NULL;
return FALSE;
@@ -137,10 +246,10 @@ rhdAnalyzeRomDataTable(unsigned char *base, int offset,
}
static Bool
-rhdGetAtomBiosTableRevisionAndSize(ATOM_COMMON_TABLE_HEADER *hdr,
- CARD8 *contentRev,
- CARD8 *formatRev,
- short *size)
+rhdAtomGetTableRevisionAndSize(ATOM_COMMON_TABLE_HEADER *hdr,
+ CARD8 *contentRev,
+ CARD8 *formatRev,
+ unsigned short *size)
{
if (!hdr)
return FALSE;
@@ -153,24 +262,25 @@ rhdGetAtomBiosTableRevisionAndSize(ATOM_COMMON_TABLE_HEADER *hdr,
}
static Bool
-rhdAnalyzeMasterDataTable(unsigned char *base,
- ATOM_MASTER_DATA_TABLE *table,
- atomDataTablesPtr data)
+rhdAtomAnalyzeMasterDataTable(unsigned char *base,
+ ATOM_MASTER_DATA_TABLE *table,
+ atomDataTablesPtr data)
{
ATOM_MASTER_LIST_OF_DATA_TABLES *data_table =
&table->ListOfDataTables;
- short size;
+ unsigned short size;
- if (!rhdAnalyzeCommonHdr(&table->sHeader))
+ if (!rhdAtomAnalyzeCommonHdr(&table->sHeader))
return FALSE;
- if (!rhdGetAtomBiosTableRevisionAndSize(&table->sHeader,NULL,NULL,&size))
+ if (!rhdAtomGetTableRevisionAndSize(&table->sHeader,NULL,NULL,
+ &size))
return FALSE;
# define SET_DATA_TABLE(x) {\
- rhdAnalyzeRomDataTable(base,data_table->x,(void *)(&(data->x)),&size); \
+ rhdAtomAnalyzeRomDataTable(base,data_table->x,(void *)(&(data->x)),&size); \
}
# define SET_DATA_TABLE_VERS(x) {\
- rhdAnalyzeRomDataTable(base,data_table->x,&(data->x.base),&size); \
+ rhdAtomAnalyzeRomDataTable(base,data_table->x,&(data->x.base),&size); \
}
SET_DATA_TABLE(UtilityPipeLine);
@@ -212,55 +322,72 @@ rhdAnalyzeMasterDataTable(unsigned char *base,
return TRUE;
}
-Bool
-rhdGetAtombiosDataTable(int scrnIndex, unsigned char *base, int *cmd_offset,
- atomDataTables *atomDataPtr)
+static Bool
+rhdAtomGetDataTable(int scrnIndex, unsigned char *base,
+ atomDataTables *atomDataPtr, unsigned int BIOSImageSize)
{
- int data_offset;
- unsigned short atom_romhdr_off = *(unsigned short*)
+ unsigned int data_offset;
+ unsigned int atom_romhdr_off = *(unsigned short*)
(base + OFFSET_TO_POINTER_TO_ATOM_ROM_HEADER);
ATOM_ROM_HEADER *atom_rom_hdr =
(ATOM_ROM_HEADER *)(base + atom_romhdr_off);
- // RHDFUNCI(scrnIndex)
+ //RHDFUNCI(scrnIndex);
+
+ if (atom_romhdr_off + sizeof(ATOM_ROM_HEADER) > BIOSImageSize) {
+ xf86DrvMsg(scrnIndex,X_ERROR,
+ "%s: AtomROM header extends beyond BIOS image\n",__func__);
+ return FALSE;
+ }
if (memcmp("ATOM",&atom_rom_hdr->uaFirmWareSignature,4)) {
- xf86DrvMsg(scrnIndex,X_ERROR,"No AtomBios signature found\n");
+ xf86DrvMsg(scrnIndex,X_ERROR,"%s: No AtomBios signature found\n",
+ __func__);
return FALSE;
}
xf86DrvMsg(scrnIndex, X_INFO, "ATOM BIOS Rom: \n");
- if (!rhdAnalyzeRomHdr(base, atom_rom_hdr, &data_offset, cmd_offset)) {
+ if (!rhdAtomAnalyzeRomHdr(base, atom_rom_hdr, &data_offset)) {
xf86DrvMsg(scrnIndex, X_ERROR, "RomHeader invalid\n");
return FALSE;
}
- if (!rhdAnalyzeMasterDataTable(base, (ATOM_MASTER_DATA_TABLE *)
- (base + data_offset),
- atomDataPtr)) {
- xf86DrvMsg(scrnIndex, X_ERROR, "ROM Master Table invalid\n");
+
+ if (data_offset + sizeof (ATOM_MASTER_DATA_TABLE) > BIOSImageSize) {
+ xf86DrvMsg(scrnIndex,X_ERROR,"%s: Atom data table outside of BIOS\n",
+ __func__);
+ }
+
+ if (!rhdAtomAnalyzeMasterDataTable(base, (ATOM_MASTER_DATA_TABLE *)
+ (base + data_offset),
+ atomDataPtr)) {
+ xf86DrvMsg(scrnIndex, X_ERROR, "%s: ROM Master Table invalid\n",
+ __func__);
return FALSE;
}
return TRUE;
}
static Bool
-rhdBIOSGetFbBaseAndSize(int scrnIndex, atomBIOSHandlePtr handle, unsigned int *base, unsigned int *size)
+rhdAtomGetFbBaseAndSize(atomBiosHandlePtr handle, unsigned int *base,
+ unsigned int *size)
{
- AtomBIOSArg data;
- if (RHDAtomBIOSFunc(scrnIndex, handle, GET_FW_FB_SIZE, &data)
+ AtomBiosArgRec data;
+ if (RHDAtomBiosFunc(handle->scrnIndex, handle, GET_FW_FB_SIZE, &data)
== ATOM_SUCCESS) {
if (data.val == 0) {
- xf86DrvMsg(scrnIndex, X_WARNING, "%s: AtomBIOS specified VRAM "
+ xf86DrvMsg(handle->scrnIndex, X_WARNING, "%s: AtomBIOS specified VRAM "
"scratch space size invalid\n", __func__);
return FALSE;
}
- *size = (int)data.val;
+ if (size)
+ *size = (int)data.val;
} else
return FALSE;
- if (RHDAtomBIOSFunc(scrnIndex, handle, GET_FW_FB_START, &data)
+ if (RHDAtomBiosFunc(handle->scrnIndex, handle, GET_FW_FB_START, &data)
== ATOM_SUCCESS) {
if (data.val == 0)
return FALSE;
- *base = (int)data.val;
+ if (base)
+ *base = (int)data.val;
}
return TRUE;
}
@@ -268,82 +395,84 @@ rhdBIOSGetFbBaseAndSize(int scrnIndex, atomBIOSHandlePtr handle, unsigned int *b
/*
* Uses videoRam form ScrnInfoRec.
*/
-static Bool
-rhdAtomBIOSAllocateFbScratch(int scrnIndex, atomBIOSHandlePtr handle,
- unsigned *start, unsigned int *size)
+static AtomBiosResult
+rhdAtomAllocateFbScratch(atomBiosHandlePtr handle,
+ AtomBiosRequestID func, AtomBiosArgPtr data)
{
unsigned int fb_base = 0;
unsigned int fb_size = 0;
+ unsigned int start = data->fb.start;
+ unsigned int size = data->fb.size;
handle->scratchBase = NULL;
handle->fbBase = 0;
- if (rhdBIOSGetFbBaseAndSize(scrnIndex, handle, &fb_base, &fb_size)) {
- xf86DrvMsg(scrnIndex, X_INFO, "AtomBIOS requests %ikB"
+ if (rhdAtomGetFbBaseAndSize(handle, &fb_base, &fb_size)) {
+ xf86DrvMsg(handle->scrnIndex, X_INFO, "AtomBIOS requests %ikB"
" of VRAM scratch space\n",fb_size);
fb_size *= 1024; /* convert to bytes */
- xf86DrvMsg(scrnIndex, X_INFO, "AtomBIOS VRAM scratch base: 0x%x\n",
+ xf86DrvMsg(handle->scrnIndex, X_INFO, "AtomBIOS VRAM scratch base: 0x%x\n",
fb_base);
} else {
fb_size = 20 * 1024;
- xf86DrvMsg(scrnIndex, X_INFO, " default to: %i\n",fb_size);
+ xf86DrvMsg(handle->scrnIndex, X_INFO, " default to: %i\n",fb_size);
}
- if (fb_base && fb_size && *size) {
+ if (fb_base && fb_size && size) {
/* 4k align */
fb_size = (fb_size & ~(CARD32)0xfff) + ((fb_size & 0xfff) ? 1 : 0);
- if ((fb_base + fb_size) > (*start + *size)) {
- xf86DrvMsg(scrnIndex, X_WARNING,
+ if ((fb_base + fb_size) > (start + size)) {
+ xf86DrvMsg(handle->scrnIndex, X_WARNING,
"%s: FW FB scratch area %i (size: %i)"
" extends beyond available framebuffer size %i\n",
- __func__, fb_base, fb_size, *size);
- } else if ((fb_base + fb_size) < (*start + *size)) {
- xf86DrvMsg(scrnIndex, X_WARNING,
+ __func__, fb_base, fb_size, size);
+ } else if ((fb_base + fb_size) < (start + size)) {
+ xf86DrvMsg(handle->scrnIndex, X_WARNING,
"%s: FW FB scratch area not located "
"at the end of VRAM. Scratch End: "
"0x%x VRAM End: 0x%x\n", __func__,
(unsigned int)(fb_base + fb_size),
- *size);
- } else if (fb_base < *start) {
- xf86DrvMsg(scrnIndex, X_WARNING,
+ size);
+ } else if (fb_base < start) {
+ xf86DrvMsg(handle->scrnIndex, X_WARNING,
"%s: FW FB scratch area extends below "
"the base of the free VRAM: 0x%x Base: 0x%x\n",
- __func__, (unsigned int)(fb_base), *start);
+ __func__, (unsigned int)(fb_base), start);
} else {
- *size -= fb_size;
+ size -= fb_size;
handle->fbBase = fb_base;
- return TRUE;
+ return ATOM_SUCCESS;
}
}
if (!handle->fbBase) {
- xf86DrvMsg(scrnIndex, X_INFO,
+ xf86DrvMsg(handle->scrnIndex, X_INFO,
"Cannot get VRAM scratch space. "
"Allocating in main memory instead\n");
handle->scratchBase = xcalloc(fb_size,1);
- return TRUE;
+ return ATOM_SUCCESS;
}
- return FALSE;
+ return ATOM_FAILED;
}
# ifdef ATOM_BIOS_PARSER
static Bool
-rhdASICInit(atomBIOSHandlePtr handle)
+rhdAtomASICInit(atomBiosHandlePtr handle)
{
ASIC_INIT_PS_ALLOCATION asicInit;
- AtomBIOSArg data;
+ AtomBiosArgRec data;
- RHDAtomBIOSFunc(handle->scrnIndex, handle,
+ RHDAtomBiosFunc(handle->scrnIndex, handle,
GET_DEFAULT_ENGINE_CLOCK,
&data);
- asicInit.sASICInitClocks.ulDefaultEngineClock = data.val; /* in 10 Khz */
- RHDAtomBIOSFunc(handle->scrnIndex, handle,
+ asicInit.sASICInitClocks.ulDefaultEngineClock = data.val / 10;/*in 10 Khz*/
+ RHDAtomBiosFunc(handle->scrnIndex, handle,
GET_DEFAULT_MEMORY_CLOCK,
&data);
- asicInit.sASICInitClocks.ulDefaultMemoryClock = data.val; /* in 10 Khz */
+ asicInit.sASICInitClocks.ulDefaultMemoryClock = data.val / 10;/*in 10 Khz*/
data.exec.dataSpace = NULL;
data.exec.index = 0x0;
data.exec.pspace = &asicInit;
xf86DrvMsg(handle->scrnIndex, X_INFO, "Calling ASIC Init\n");
- if (RHDAtomBIOSFunc(handle->scrnIndex, handle,
+ if (RHDAtomBiosFunc(handle->scrnIndex, handle,
ATOMBIOS_EXEC, &data) == ATOM_SUCCESS) {
xf86DrvMsg(handle->scrnIndex, X_INFO, "ASIC_INIT Successful\n");
return TRUE;
@@ -351,30 +480,97 @@ rhdASICInit(atomBIOSHandlePtr handle)
xf86DrvMsg(handle->scrnIndex, X_INFO, "ASIC_INIT Failed\n");
return FALSE;
}
+
+Bool
+rhdAtomSetScaler(atomBiosHandlePtr handle, unsigned char scalerID, int setting)
+{
+ ENABLE_SCALER_PARAMETERS scaler;
+ AtomBiosArgRec data;
+
+ scaler.ucScaler = scalerID;
+ scaler.ucEnable = setting;
+ data.exec.dataSpace = NULL;
+ data.exec.index = 0x21;
+ data.exec.pspace = &scaler;
+ xf86DrvMsg(handle->scrnIndex, X_INFO, "Calling EnableScaler\n");
+ if (RHDAtomBiosFunc(handle->scrnIndex, handle,
+ ATOMBIOS_EXEC, &data) == ATOM_SUCCESS) {
+ xf86DrvMsg(handle->scrnIndex, X_INFO, "EnableScaler Successful\n");
+ return TRUE;
+ }
+ xf86DrvMsg(handle->scrnIndex, X_INFO, "EableScaler Failed\n");
+ return FALSE;
+}
+
# endif
-static atomBIOSHandlePtr
-rhdInitAtomBIOS(int scrnIndex)
+static AtomBiosResult
+rhdAtomInit(atomBiosHandlePtr unused1, AtomBiosRequestID unused2,
+ AtomBiosArgPtr data)
{
+ int scrnIndex = data->val;
RADEONInfoPtr info = RADEONPTR(xf86Screens[scrnIndex]);
- unsigned char *ptr = info->VBIOS;
+ unsigned char *ptr;
atomDataTablesPtr atomDataPtr;
- atomBIOSHandlePtr handle = NULL;
- unsigned int dummy;
- int cmd_offset;
+ atomBiosHandlePtr handle = NULL;
+ unsigned int BIOSImageSize = 0;
+ data->atomhandle = NULL;
- if (!(atomDataPtr = xcalloc(sizeof(atomDataTables),1))) {
+ //RHDFUNCI(scrnIndex);
+
+ /*if (info->BIOSCopy) {
+ xf86DrvMsg(scrnIndex,X_INFO,"Getting BIOS copy from INT10\n");
+ ptr = info->BIOSCopy;
+ info->BIOSCopy = NULL;
+
+ BIOSImageSize = ptr[2] * 512;
+ if (BIOSImageSize > legacyBIOSMax) {
+ xf86DrvMsg(scrnIndex,X_ERROR,"Invalid BIOS length field\n");
+ return ATOM_FAILED;
+ }
+ } else*/ {
+ /*if (!xf86IsEntityPrimary(info->entityIndex)) {
+ if (!(BIOSImageSize = RHDReadPCIBios(info, &ptr)))
+ return ATOM_FAILED;
+ } else*/ {
+ int read_len;
+ unsigned char tmp[32];
+ xf86DrvMsg(scrnIndex,X_INFO,"Getting BIOS copy from legacy VBIOS location\n");
+ if (xf86ReadBIOS(legacyBIOSLocation, 0, tmp, 32) < 0) {
+ xf86DrvMsg(scrnIndex,X_ERROR,
+ "Cannot obtain POSTed BIOS header\n");
+ return ATOM_FAILED;
+ }
+ BIOSImageSize = tmp[2] * 512;
+ if (BIOSImageSize > legacyBIOSMax) {
+ xf86DrvMsg(scrnIndex,X_ERROR,"Invalid BIOS length field\n");
+ return ATOM_FAILED;
+ }
+ if (!(ptr = xcalloc(1,BIOSImageSize))) {
+ xf86DrvMsg(scrnIndex,X_ERROR,
+ "Cannot allocate %i bytes of memory "
+ "for BIOS image\n",BIOSImageSize);
+ return ATOM_FAILED;
+ }
+ if ((read_len = xf86ReadBIOS(legacyBIOSLocation, 0, ptr, BIOSImageSize)
+ < 0)) {
+ xf86DrvMsg(scrnIndex,X_ERROR,"Cannot read POSTed BIOS\n");
+ goto error;
+ }
+ }
+ }
+
+ if (!(atomDataPtr = xcalloc(1, sizeof(atomDataTables)))) {
xf86DrvMsg(scrnIndex,X_ERROR,"Cannot allocate memory for "
"ATOM BIOS data tabes\n");
goto error;
}
- if (!rhdGetAtombiosDataTable(scrnIndex, ptr, &cmd_offset, atomDataPtr))
+ if (!rhdAtomGetDataTable(scrnIndex, ptr, atomDataPtr,BIOSImageSize))
goto error1;
- if (!(handle = xcalloc(sizeof(atomBIOSHandle),1))) {
+ if (!(handle = xcalloc(1, sizeof(atomBiosHandleRec)))) {
xf86DrvMsg(scrnIndex,X_ERROR,"Cannot allocate memory\n");
goto error1;
}
- handle->cmd_offset = cmd_offset;
handle->BIOSBase = ptr;
handle->atomDataPtr = atomDataPtr;
handle->scrnIndex = scrnIndex;
@@ -383,42 +579,49 @@ rhdInitAtomBIOS(int scrnIndex)
#else
handle->PciTag = info->PciTag;
#endif
+ handle->BIOSImageSize = BIOSImageSize;
-#if ATOM_BIOS_PARSER
+# if ATOM_BIOS_PARSER
/* Try to find out if BIOS has been posted (either by system or int10 */
- if (!rhdBIOSGetFbBaseAndSize(scrnIndex, handle, &dummy, &dummy)) {
+ if (!rhdAtomGetFbBaseAndSize(handle, NULL, NULL)) {
/* run AsicInit */
- if (!rhdASICInit(handle))
+ if (!rhdAtomASICInit(handle))
xf86DrvMsg(scrnIndex, X_WARNING,
"%s: AsicInit failed. Won't be able to obtain in VRAM "
"FB scratch space\n",__func__);
}
-#endif
- return handle;
+# endif
+
+ data->atomhandle = handle;
+ return ATOM_SUCCESS;
error1:
xfree(atomDataPtr);
error:
xfree(ptr);
- return NULL;
+ return ATOM_FAILED;
}
-void
-rhdTearDownAtomBIOS(int scrnIndex, atomBIOSHandlePtr handle)
+static AtomBiosResult
+rhdAtomTearDown(atomBiosHandlePtr handle,
+ AtomBiosRequestID unused1, AtomBiosArgPtr unused2)
{
- // RHDFUNCI(scrnIndex);
+ //RHDFUNC(handle);
xfree(handle->BIOSBase);
xfree(handle->atomDataPtr);
+ if (handle->scratchBase) xfree(handle->scratchBase);
xfree(handle);
+ return ATOM_SUCCESS;
}
-AtomBiosResult
-rhdAtomBIOSVramInfoQuery(int scrnIndex, atomBIOSHandlePtr handle, AtomBiosFunc func,
- CARD32 *val)
+
+static AtomBiosResult
+rhdAtomVramInfoQuery(atomBiosHandlePtr handle, AtomBiosRequestID func,
+ AtomBiosArgPtr data)
{
atomDataTablesPtr atomDataPtr;
-
- // RHDFUNCI(scrnIndex);
+ CARD32 *val = &data->val;
+ //RHDFUNC(handle);
atomDataPtr = handle->atomDataPtr;
@@ -437,36 +640,38 @@ rhdAtomBIOSVramInfoQuery(int scrnIndex, atomBIOSHandlePtr handle, AtomBiosFunc f
return ATOM_SUCCESS;
}
-AtomBiosResult
-rhdAtomBIOSTmdsInfoQuery(int scrnIndex, atomBIOSHandlePtr handle,
- AtomBiosFunc func, int index, CARD32 *val)
+static AtomBiosResult
+rhdAtomTmdsInfoQuery(atomBiosHandlePtr handle,
+ AtomBiosRequestID func, AtomBiosArgPtr data)
{
atomDataTablesPtr atomDataPtr;
+ CARD32 *val = &data->val;
+ int idx = *val;
atomDataPtr = handle->atomDataPtr;
- if (!rhdGetAtomBiosTableRevisionAndSize(
- (ATOM_COMMON_TABLE_HEADER *)(atomDataPtr->FirmwareInfo.base),
+ if (!rhdAtomGetTableRevisionAndSize(
+ (ATOM_COMMON_TABLE_HEADER *)(atomDataPtr->TMDS_Info),
NULL,NULL,NULL)) {
return ATOM_FAILED;
}
- // RHDFUNCI(scrnIndex);
+ //RHDFUNC(handle);
switch (func) {
case ATOM_TMDS_FREQUENCY:
- *val = atomDataPtr->TMDS_Info->asMiscInfo[index].usFrequency;
+ *val = atomDataPtr->TMDS_Info->asMiscInfo[idx].usFrequency;
break;
case ATOM_TMDS_PLL_CHARGE_PUMP:
- *val = atomDataPtr->TMDS_Info->asMiscInfo[index].ucPLL_ChargePump;
+ *val = atomDataPtr->TMDS_Info->asMiscInfo[idx].ucPLL_ChargePump;
break;
case ATOM_TMDS_PLL_DUTY_CYCLE:
- *val = atomDataPtr->TMDS_Info->asMiscInfo[index].ucPLL_DutyCycle;
+ *val = atomDataPtr->TMDS_Info->asMiscInfo[idx].ucPLL_DutyCycle;
break;
case ATOM_TMDS_PLL_VCO_GAIN:
- *val = atomDataPtr->TMDS_Info->asMiscInfo[index].ucPLL_VCO_Gain;
+ *val = atomDataPtr->TMDS_Info->asMiscInfo[idx].ucPLL_VCO_Gain;
break;
case ATOM_TMDS_PLL_VOLTAGE_SWING:
- *val = atomDataPtr->TMDS_Info->asMiscInfo[index].ucPLL_VoltageSwing;
+ *val = atomDataPtr->TMDS_Info->asMiscInfo[idx].ucPLL_VoltageSwing;
break;
default:
return ATOM_NOT_IMPLEMENTED;
@@ -474,54 +679,440 @@ rhdAtomBIOSTmdsInfoQuery(int scrnIndex, atomBIOSHandlePtr handle,
return ATOM_SUCCESS;
}
-AtomBiosResult
-rhdAtomBIOSFirmwareInfoQuery(int scrnIndex, atomBIOSHandlePtr handle,
- AtomBiosFunc func, CARD32 *val)
+static DisplayModePtr
+rhdAtomLvdsTimings(atomBiosHandlePtr handle, ATOM_DTD_FORMAT *dtd)
+{
+ DisplayModePtr mode;
+#define NAME_LEN 16
+ char name[NAME_LEN];
+
+ //RHDFUNC(handle);
+
+ if (!(mode = (DisplayModePtr)xcalloc(1,sizeof(DisplayModeRec))))
+ return NULL;
+
+ mode->CrtcHDisplay = mode->HDisplay = dtd->usHActive;
+ mode->CrtcVDisplay = mode->VDisplay = dtd->usVActive;
+ mode->CrtcHBlankStart = dtd->usHActive + dtd->ucHBorder;
+ mode->CrtcHBlankEnd = mode->CrtcHBlankStart + dtd->usHBlanking_Time;
+ mode->CrtcHTotal = mode->HTotal = mode->CrtcHBlankEnd + dtd->ucHBorder;
+ mode->CrtcVBlankStart = dtd->usVActive + dtd->ucVBorder;
+ mode->CrtcVBlankEnd = mode->CrtcVBlankStart + dtd->usVBlanking_Time;
+ mode->CrtcVTotal = mode->VTotal = mode->CrtcVBlankEnd + dtd->ucVBorder;
+ mode->CrtcHSyncStart = mode->HSyncStart = dtd->usHActive + dtd->usHSyncOffset;
+ mode->CrtcHSyncEnd = mode->HSyncEnd = mode->HSyncStart + dtd->usHSyncWidth;
+ mode->CrtcVSyncStart = mode->VSyncStart = dtd->usVActive + dtd->usVSyncOffset;
+ mode->CrtcVSyncEnd = mode->VSyncEnd = mode->VSyncStart + dtd->usVSyncWidth;
+
+ mode->SynthClock = mode->Clock = dtd->usPixClk * 10;
+
+ mode->HSync = ((float) mode->Clock) / ((float)mode->HTotal);
+ mode->VRefresh = (1000.0 * ((float) mode->Clock))
+ / ((float)(((float)mode->HTotal) * ((float)mode->VTotal)));
+
+ xf86snprintf(name, NAME_LEN, "%dx%d",
+ mode->HDisplay, mode->VDisplay);
+ mode->name = xstrdup(name);
+
+ RHDDebug(handle->scrnIndex,"%s: LVDS Modeline: %s "
+ "%2.d %i (%i) %i %i (%i) %i %i (%i) %i %i (%i) %i\n",
+ __func__, mode->name, mode->Clock,
+ mode->HDisplay, mode->CrtcHBlankStart, mode->HSyncStart, mode->CrtcHSyncEnd,
+ mode->CrtcHBlankEnd, mode->HTotal,
+ mode->VDisplay, mode->CrtcVBlankStart, mode->VSyncStart, mode->VSyncEnd,
+ mode->CrtcVBlankEnd, mode->VTotal);
+
+ return mode;
+}
+
+static unsigned char*
+rhdAtomLvdsDDC(atomBiosHandlePtr handle, CARD32 offset, unsigned char *record)
+{
+ unsigned char *EDIDBlock;
+
+ //RHDFUNC(handle);
+
+ while (*record != ATOM_RECORD_END_TYPE) {
+
+ switch (*record) {
+ case LCD_MODE_PATCH_RECORD_MODE_TYPE:
+ offset += sizeof(ATOM_PATCH_RECORD_MODE);
+ if (offset > handle->BIOSImageSize) break;
+ record += sizeof(ATOM_PATCH_RECORD_MODE);
+ break;
+
+ case LCD_RTS_RECORD_TYPE:
+ offset += sizeof(ATOM_LCD_RTS_RECORD);
+ if (offset > handle->BIOSImageSize) break;
+ record += sizeof(ATOM_LCD_RTS_RECORD);
+ break;
+
+ case LCD_CAP_RECORD_TYPE:
+ offset += sizeof(ATOM_LCD_MODE_CONTROL_CAP);
+ if (offset > handle->BIOSImageSize) break;
+ record += sizeof(ATOM_LCD_MODE_CONTROL_CAP);
+ break;
+
+ case LCD_FAKE_EDID_PATCH_RECORD_TYPE:
+ offset += sizeof(ATOM_FAKE_EDID_PATCH_RECORD);
+ /* check if the structure still fully lives in the BIOS image */
+ if (offset > handle->BIOSImageSize) break;
+ offset += ((ATOM_FAKE_EDID_PATCH_RECORD*)record)->ucFakeEDIDLength
+ - sizeof(UCHAR);
+ if (offset > handle->BIOSImageSize) break;
+ /* dup string as we free it later */
+ if (!(EDIDBlock = (unsigned char *)xalloc(
+ ((ATOM_FAKE_EDID_PATCH_RECORD*)record)->ucFakeEDIDLength)))
+ return NULL;
+ memcpy(EDIDBlock,&((ATOM_FAKE_EDID_PATCH_RECORD*)record)->ucFakeEDIDString,
+ ((ATOM_FAKE_EDID_PATCH_RECORD*)record)->ucFakeEDIDLength);
+
+ /* for testing */
+ {
+ xf86MonPtr mon = xf86InterpretEDID(handle->scrnIndex,EDIDBlock);
+ xf86PrintEDID(mon);
+ xfree(mon);
+ }
+ return EDIDBlock;
+
+ case LCD_PANEL_RESOLUTION_RECORD_TYPE:
+ offset += sizeof(ATOM_PANEL_RESOLUTION_PATCH_RECORD);
+ if (offset > handle->BIOSImageSize) break;
+ record += sizeof(ATOM_PANEL_RESOLUTION_PATCH_RECORD);
+ break;
+
+ default:
+ xf86DrvMsg(handle->scrnIndex, X_ERROR,
+ "%s: unknown record type: %x\n",__func__,*record);
+ return NULL;
+ }
+ }
+
+ return NULL;
+}
+
+static AtomBiosResult
+rhdAtomLvdsGetTimings(atomBiosHandlePtr handle, AtomBiosRequestID func,
+ AtomBiosArgPtr data)
+{
+ atomDataTablesPtr atomDataPtr;
+ CARD8 crev, frev;
+ unsigned long offset;
+
+ //RHDFUNC(handle);
+
+ atomDataPtr = handle->atomDataPtr;
+
+ if (!rhdAtomGetTableRevisionAndSize(
+ (ATOM_COMMON_TABLE_HEADER *)(atomDataPtr->LVDS_Info.base),
+ &frev,&crev,NULL)) {
+ return ATOM_FAILED;
+ }
+
+ switch (crev) {
+
+ case 1:
+ switch (func) {
+ case ATOMBIOS_GET_PANEL_MODE:
+ data->mode = rhdAtomLvdsTimings(handle,
+ &atomDataPtr->LVDS_Info
+ .LVDS_Info->sLCDTiming);
+ if (data->mode)
+ return ATOM_SUCCESS;
+ default:
+ return ATOM_FAILED;
+ }
+ case 2:
+ switch (func) {
+ case ATOMBIOS_GET_PANEL_MODE:
+ data->mode = rhdAtomLvdsTimings(handle,
+ &atomDataPtr->LVDS_Info
+ .LVDS_Info_v12->sLCDTiming);
+ if (data->mode)
+ return ATOM_SUCCESS;
+ return ATOM_FAILED;
+
+ case ATOMBIOS_GET_PANEL_EDID:
+ offset = (unsigned long)&atomDataPtr->LVDS_Info.base
+ - (unsigned long)handle->BIOSBase
+ + atomDataPtr->LVDS_Info
+ .LVDS_Info_v12->usExtInfoTableOffset;
+
+ data->EDIDBlock
+ = rhdAtomLvdsDDC(handle, offset,
+ (unsigned char *)
+ &atomDataPtr->LVDS_Info.base
+ + atomDataPtr->LVDS_Info
+ .LVDS_Info_v12->usExtInfoTableOffset);
+ if (data->EDIDBlock)
+ return ATOM_SUCCESS;
+ default:
+ return ATOM_FAILED;
+ }
+ default:
+ return ATOM_NOT_IMPLEMENTED;
+ }
+/*NOTREACHED*/
+}
+
+static AtomBiosResult
+rhdAtomLvdsInfoQuery(atomBiosHandlePtr handle,
+ AtomBiosRequestID func, AtomBiosArgPtr data)
+{
+ atomDataTablesPtr atomDataPtr;
+ CARD8 crev, frev;
+ CARD32 *val = &data->val;
+
+ //RHDFUNC(handle);
+
+ atomDataPtr = handle->atomDataPtr;
+
+ if (!rhdAtomGetTableRevisionAndSize(
+ (ATOM_COMMON_TABLE_HEADER *)(atomDataPtr->LVDS_Info.base),
+ &frev,&crev,NULL)) {
+ return ATOM_FAILED;
+ }
+
+ switch (crev) {
+ case 1:
+ switch (func) {
+ case ATOM_LVDS_SUPPORTED_REFRESH_RATE:
+ *val = atomDataPtr->LVDS_Info
+ .LVDS_Info->usSupportedRefreshRate;
+ break;
+ case ATOM_LVDS_OFF_DELAY:
+ *val = atomDataPtr->LVDS_Info
+ .LVDS_Info->usOffDelayInMs;
+ break;
+ case ATOM_LVDS_SEQ_DIG_ONTO_DE:
+ *val = atomDataPtr->LVDS_Info
+ .LVDS_Info->ucPowerSequenceDigOntoDEin10Ms * 10;
+ break;
+ case ATOM_LVDS_SEQ_DE_TO_BL:
+ *val = atomDataPtr->LVDS_Info
+ .LVDS_Info->ucPowerSequenceDEtoBLOnin10Ms * 10;
+ break;
+ case ATOM_LVDS_DITHER:
+ *val = atomDataPtr->LVDS_Info
+ .LVDS_Info->ucLVDS_Misc & 0x40;
+ break;
+ case ATOM_LVDS_DUALLINK:
+ *val = atomDataPtr->LVDS_Info
+ .LVDS_Info->ucLVDS_Misc & 0x01;
+ break;
+ case ATOM_LVDS_24BIT:
+ *val = atomDataPtr->LVDS_Info
+ .LVDS_Info->ucLVDS_Misc & 0x02;
+ break;
+ case ATOM_LVDS_GREYLVL:
+ *val = atomDataPtr->LVDS_Info
+ .LVDS_Info->ucLVDS_Misc & 0x0C;
+ break;
+ case ATOM_LVDS_FPDI:
+ *val = atomDataPtr->LVDS_Info
+ .LVDS_Info->ucLVDS_Misc * 0x10;
+ break;
+ default:
+ return ATOM_NOT_IMPLEMENTED;
+ }
+ break;
+ case 2:
+ switch (func) {
+ case ATOM_LVDS_SUPPORTED_REFRESH_RATE:
+ *val = atomDataPtr->LVDS_Info
+ .LVDS_Info_v12->usSupportedRefreshRate;
+ break;
+ case ATOM_LVDS_OFF_DELAY:
+ *val = atomDataPtr->LVDS_Info
+ .LVDS_Info_v12->usOffDelayInMs;
+ break;
+ case ATOM_LVDS_SEQ_DIG_ONTO_DE:
+ *val = atomDataPtr->LVDS_Info
+ .LVDS_Info_v12->ucPowerSequenceDigOntoDEin10Ms * 10;
+ break;
+ case ATOM_LVDS_SEQ_DE_TO_BL:
+ *val = atomDataPtr->LVDS_Info
+ .LVDS_Info_v12->ucPowerSequenceDEtoBLOnin10Ms * 10;
+ break;
+ case ATOM_LVDS_DITHER:
+ *val = atomDataPtr->LVDS_Info
+ .LVDS_Info_v12->ucLVDS_Misc & 0x40;
+ break;
+ case ATOM_LVDS_DUALLINK:
+ *val = atomDataPtr->LVDS_Info
+ .LVDS_Info_v12->ucLVDS_Misc & 0x01;
+ break;
+ case ATOM_LVDS_24BIT:
+ *val = atomDataPtr->LVDS_Info
+ .LVDS_Info_v12->ucLVDS_Misc & 0x02;
+ break;
+ case ATOM_LVDS_GREYLVL:
+ *val = atomDataPtr->LVDS_Info
+ .LVDS_Info_v12->ucLVDS_Misc & 0x0C;
+ break;
+ case ATOM_LVDS_FPDI:
+ *val = atomDataPtr->LVDS_Info
+ .LVDS_Info_v12->ucLVDS_Misc * 0x10;
+ break;
+ default:
+ return ATOM_NOT_IMPLEMENTED;
+ }
+ break;
+ default:
+ return ATOM_NOT_IMPLEMENTED;
+ }
+
+ return ATOM_SUCCESS;
+}
+
+static AtomBiosResult
+rhdAtomCompassionateDataQuery(atomBiosHandlePtr handle,
+ AtomBiosRequestID func, AtomBiosArgPtr data)
+{
+ atomDataTablesPtr atomDataPtr;
+ CARD8 crev, frev;
+ CARD32 *val = &data->val;
+
+ //RHDFUNC(handle);
+
+ atomDataPtr = handle->atomDataPtr;
+
+ if (!rhdAtomGetTableRevisionAndSize(
+ (ATOM_COMMON_TABLE_HEADER *)(atomDataPtr->CompassionateData),
+ &frev,&crev,NULL)) {
+ return ATOM_FAILED;
+ }
+
+ switch (func) {
+ case ATOM_DAC1_BG_ADJ:
+ *val = atomDataPtr->CompassionateData->
+ ucDAC1_BG_Adjustment;
+ break;
+ case ATOM_DAC1_DAC_ADJ:
+ *val = atomDataPtr->CompassionateData->
+ ucDAC1_DAC_Adjustment;
+ break;
+ case ATOM_DAC1_FORCE:
+ *val = atomDataPtr->CompassionateData->
+ usDAC1_FORCE_Data;
+ break;
+ case ATOM_DAC2_CRTC2_BG_ADJ:
+ *val = atomDataPtr->CompassionateData->
+ ucDAC2_CRT2_BG_Adjustment;
+ break;
+ case ATOM_DAC2_CRTC2_DAC_ADJ:
+ *val = atomDataPtr->CompassionateData->
+ ucDAC2_CRT2_DAC_Adjustment;
+ break;
+ case ATOM_DAC2_CRTC2_FORCE:
+ *val = atomDataPtr->CompassionateData->
+ usDAC2_CRT2_FORCE_Data;
+ break;
+ case ATOM_DAC2_CRTC2_MUX_REG_IND:
+ *val = atomDataPtr->CompassionateData->
+ usDAC2_CRT2_MUX_RegisterIndex;
+ break;
+ case ATOM_DAC2_CRTC2_MUX_REG_INFO:
+ *val = atomDataPtr->CompassionateData->
+ ucDAC2_CRT2_MUX_RegisterInfo;
+ break;
+ default:
+ return ATOM_NOT_IMPLEMENTED;
+ }
+ return ATOM_SUCCESS;
+}
+
+static AtomBiosResult
+rhdAtomGPIOI2CInfoQuery(atomBiosHandlePtr handle,
+ AtomBiosRequestID func, AtomBiosArgPtr data)
+{
+ atomDataTablesPtr atomDataPtr;
+ CARD8 crev, frev;
+ CARD32 *val = &data->val;
+ unsigned short size;
+
+ //RHDFUNC(handle);
+
+ atomDataPtr = handle->atomDataPtr;
+
+ if (!rhdAtomGetTableRevisionAndSize(
+ (ATOM_COMMON_TABLE_HEADER *)(atomDataPtr->GPIO_I2C_Info),
+ &frev,&crev,&size)) {
+ return ATOM_FAILED;
+ }
+
+ switch (func) {
+ case ATOM_GPIO_I2C_CLK_MASK:
+ if ((sizeof(ATOM_COMMON_TABLE_HEADER)
+ + (*val * sizeof(ATOM_GPIO_I2C_ASSIGMENT))) > size) {
+ xf86DrvMsg(handle->scrnIndex, X_ERROR, "%s: GPIO_I2C Device "
+ "num %lu exeeds table size %u\n",__func__,
+ (unsigned long)val,
+ size);
+ return ATOM_FAILED;
+ }
+
+ *val = atomDataPtr->GPIO_I2C_Info->asGPIO_Info[*val]
+ .usClkMaskRegisterIndex;
+ break;
+
+ default:
+ return ATOM_NOT_IMPLEMENTED;
+ }
+ return ATOM_SUCCESS;
+}
+
+static AtomBiosResult
+rhdAtomFirmwareInfoQuery(atomBiosHandlePtr handle,
+ AtomBiosRequestID func, AtomBiosArgPtr data)
{
atomDataTablesPtr atomDataPtr;
CARD8 crev, frev;
+ CARD32 *val = &data->val;
- // RHDFUNCI(scrnIndex);
+ //RHDFUNC(handle);
atomDataPtr = handle->atomDataPtr;
- if (!rhdGetAtomBiosTableRevisionAndSize(
+
+ if (!rhdAtomGetTableRevisionAndSize(
(ATOM_COMMON_TABLE_HEADER *)(atomDataPtr->FirmwareInfo.base),
&crev,&frev,NULL)) {
return ATOM_FAILED;
}
+
switch (crev) {
case 1:
switch (func) {
case GET_DEFAULT_ENGINE_CLOCK:
*val = atomDataPtr->FirmwareInfo
- .FirmwareInfo->ulDefaultEngineClock;
+ .FirmwareInfo->ulDefaultEngineClock * 10;
break;
case GET_DEFAULT_MEMORY_CLOCK:
*val = atomDataPtr->FirmwareInfo
- .FirmwareInfo->ulDefaultMemoryClock;
+ .FirmwareInfo->ulDefaultMemoryClock * 10;
break;
case GET_MAX_PIXEL_CLOCK_PLL_OUTPUT:
*val = atomDataPtr->FirmwareInfo
- .FirmwareInfo->ulMaxPixelClockPLL_Output;
+ .FirmwareInfo->ulMaxPixelClockPLL_Output * 10;
break;
case GET_MIN_PIXEL_CLOCK_PLL_OUTPUT:
*val = atomDataPtr->FirmwareInfo
- .FirmwareInfo->usMinPixelClockPLL_Output;
+ .FirmwareInfo->usMinPixelClockPLL_Output * 10;
case GET_MAX_PIXEL_CLOCK_PLL_INPUT:
*val = atomDataPtr->FirmwareInfo
- .FirmwareInfo->usMaxPixelClockPLL_Input;
+ .FirmwareInfo->usMaxPixelClockPLL_Input * 10;
break;
case GET_MIN_PIXEL_CLOCK_PLL_INPUT:
*val = atomDataPtr->FirmwareInfo
- .FirmwareInfo->usMinPixelClockPLL_Input;
+ .FirmwareInfo->usMinPixelClockPLL_Input * 10;
break;
case GET_MAX_PIXEL_CLK:
*val = atomDataPtr->FirmwareInfo
- .FirmwareInfo->usMaxPixelClock;
+ .FirmwareInfo->usMaxPixelClock * 10;
break;
case GET_REF_CLOCK:
*val = atomDataPtr->FirmwareInfo
- .FirmwareInfo->usReferenceClock;
+ .FirmwareInfo->usReferenceClock * 10;
break;
default:
return ATOM_NOT_IMPLEMENTED;
@@ -530,35 +1121,35 @@ rhdAtomBIOSFirmwareInfoQuery(int scrnIndex, atomBIOSHandlePtr handle,
switch (func) {
case GET_DEFAULT_ENGINE_CLOCK:
*val = atomDataPtr->FirmwareInfo
- .FirmwareInfo_V_1_2->ulDefaultEngineClock;
+ .FirmwareInfo_V_1_2->ulDefaultEngineClock * 10;
break;
case GET_DEFAULT_MEMORY_CLOCK:
*val = atomDataPtr->FirmwareInfo
- .FirmwareInfo_V_1_2->ulDefaultMemoryClock;
+ .FirmwareInfo_V_1_2->ulDefaultMemoryClock * 10;
break;
case GET_MAX_PIXEL_CLOCK_PLL_OUTPUT:
*val = atomDataPtr->FirmwareInfo
- .FirmwareInfo_V_1_2->ulMaxPixelClockPLL_Output;
+ .FirmwareInfo_V_1_2->ulMaxPixelClockPLL_Output * 10;
break;
case GET_MIN_PIXEL_CLOCK_PLL_OUTPUT:
*val = atomDataPtr->FirmwareInfo
- .FirmwareInfo_V_1_2->usMinPixelClockPLL_Output;
+ .FirmwareInfo_V_1_2->usMinPixelClockPLL_Output * 10;
break;
case GET_MAX_PIXEL_CLOCK_PLL_INPUT:
*val = atomDataPtr->FirmwareInfo
- .FirmwareInfo_V_1_2->usMaxPixelClockPLL_Input;
+ .FirmwareInfo_V_1_2->usMaxPixelClockPLL_Input * 10;
break;
case GET_MIN_PIXEL_CLOCK_PLL_INPUT:
*val = atomDataPtr->FirmwareInfo
- .FirmwareInfo_V_1_2->usMinPixelClockPLL_Input;
+ .FirmwareInfo_V_1_2->usMinPixelClockPLL_Input * 10;
break;
case GET_MAX_PIXEL_CLK:
*val = atomDataPtr->FirmwareInfo
- .FirmwareInfo_V_1_2->usMaxPixelClock;
+ .FirmwareInfo_V_1_2->usMaxPixelClock * 10;
break;
case GET_REF_CLOCK:
*val = atomDataPtr->FirmwareInfo
- .FirmwareInfo_V_1_2->usReferenceClock;
+ .FirmwareInfo_V_1_2->usReferenceClock * 10;
break;
default:
return ATOM_NOT_IMPLEMENTED;
@@ -568,35 +1159,35 @@ rhdAtomBIOSFirmwareInfoQuery(int scrnIndex, atomBIOSHandlePtr handle,
switch (func) {
case GET_DEFAULT_ENGINE_CLOCK:
*val = atomDataPtr->FirmwareInfo
- .FirmwareInfo_V_1_3->ulDefaultEngineClock;
+ .FirmwareInfo_V_1_3->ulDefaultEngineClock * 10;
break;
case GET_DEFAULT_MEMORY_CLOCK:
*val = atomDataPtr->FirmwareInfo
- .FirmwareInfo_V_1_3->ulDefaultMemoryClock;
+ .FirmwareInfo_V_1_3->ulDefaultMemoryClock * 10;
break;
case GET_MAX_PIXEL_CLOCK_PLL_OUTPUT:
*val = atomDataPtr->FirmwareInfo
- .FirmwareInfo_V_1_3->ulMaxPixelClockPLL_Output;
+ .FirmwareInfo_V_1_3->ulMaxPixelClockPLL_Output * 10;
break;
case GET_MIN_PIXEL_CLOCK_PLL_OUTPUT:
*val = atomDataPtr->FirmwareInfo
- .FirmwareInfo_V_1_3->usMinPixelClockPLL_Output;
+ .FirmwareInfo_V_1_3->usMinPixelClockPLL_Output * 10;
break;
case GET_MAX_PIXEL_CLOCK_PLL_INPUT:
*val = atomDataPtr->FirmwareInfo
- .FirmwareInfo_V_1_3->usMaxPixelClockPLL_Input;
+ .FirmwareInfo_V_1_3->usMaxPixelClockPLL_Input * 10;
break;
case GET_MIN_PIXEL_CLOCK_PLL_INPUT:
*val = atomDataPtr->FirmwareInfo
- .FirmwareInfo_V_1_3->usMinPixelClockPLL_Input;
+ .FirmwareInfo_V_1_3->usMinPixelClockPLL_Input * 10;
break;
case GET_MAX_PIXEL_CLK:
*val = atomDataPtr->FirmwareInfo
- .FirmwareInfo_V_1_3->usMaxPixelClock;
+ .FirmwareInfo_V_1_3->usMaxPixelClock * 10;
break;
case GET_REF_CLOCK:
*val = atomDataPtr->FirmwareInfo
- .FirmwareInfo_V_1_3->usReferenceClock;
+ .FirmwareInfo_V_1_3->usReferenceClock * 10;
break;
default:
return ATOM_NOT_IMPLEMENTED;
@@ -606,35 +1197,35 @@ rhdAtomBIOSFirmwareInfoQuery(int scrnIndex, atomBIOSHandlePtr handle,
switch (func) {
case GET_DEFAULT_ENGINE_CLOCK:
*val = atomDataPtr->FirmwareInfo
- .FirmwareInfo_V_1_4->ulDefaultEngineClock;
+ .FirmwareInfo_V_1_4->ulDefaultEngineClock * 10;
break;
case GET_DEFAULT_MEMORY_CLOCK:
*val = atomDataPtr->FirmwareInfo
- .FirmwareInfo_V_1_4->ulDefaultMemoryClock;
+ .FirmwareInfo_V_1_4->ulDefaultMemoryClock * 10;
break;
case GET_MAX_PIXEL_CLOCK_PLL_INPUT:
*val = atomDataPtr->FirmwareInfo
- .FirmwareInfo_V_1_4->usMaxPixelClockPLL_Input;
+ .FirmwareInfo_V_1_4->usMaxPixelClockPLL_Input * 10;
break;
case GET_MIN_PIXEL_CLOCK_PLL_INPUT:
*val = atomDataPtr->FirmwareInfo
- .FirmwareInfo_V_1_4->usMinPixelClockPLL_Input;
+ .FirmwareInfo_V_1_4->usMinPixelClockPLL_Input * 10;
break;
case GET_MAX_PIXEL_CLOCK_PLL_OUTPUT:
*val = atomDataPtr->FirmwareInfo
- .FirmwareInfo_V_1_4->ulMaxPixelClockPLL_Output;
+ .FirmwareInfo_V_1_4->ulMaxPixelClockPLL_Output * 10;
break;
case GET_MIN_PIXEL_CLOCK_PLL_OUTPUT:
*val = atomDataPtr->FirmwareInfo
- .FirmwareInfo_V_1_4->usMinPixelClockPLL_Output;
+ .FirmwareInfo_V_1_4->usMinPixelClockPLL_Output * 10;
break;
case GET_MAX_PIXEL_CLK:
*val = atomDataPtr->FirmwareInfo
- .FirmwareInfo_V_1_4->usMaxPixelClock;
+ .FirmwareInfo_V_1_4->usMaxPixelClock * 10;
break;
case GET_REF_CLOCK:
*val = atomDataPtr->FirmwareInfo
- .FirmwareInfo_V_1_4->usReferenceClock;
+ .FirmwareInfo_V_1_4->usReferenceClock * 10;
break;
default:
return ATOM_NOT_IMPLEMENTED;
@@ -646,30 +1237,711 @@ rhdAtomBIOSFirmwareInfoQuery(int scrnIndex, atomBIOSHandlePtr handle,
return ATOM_SUCCESS;
}
-# ifdef ATOM_BIOS_PARSER
+#define Limit(n,max,name) ((n >= max) ? ( \
+ xf86DrvMsg(handle->scrnIndex,X_ERROR,"%s: %s %i exceeds maximum %i\n", \
+ __func__,name,n,max), TRUE) : FALSE)
+
+static const struct _rhd_connector_objs
+{
+ char *name;
+ rhdConnectorType con;
+} rhd_connector_objs[] = {
+ { "NONE", RHD_CONNECTOR_NONE },
+ { "SINGLE_LINK_DVI_I", RHD_CONNECTOR_DVI },
+ { "DUAL_LINK_DVI_I", RHD_CONNECTOR_DVI_DUAL },
+ { "SINGLE_LINK_DVI_D", RHD_CONNECTOR_DVI },
+ { "DUAL_LINK_DVI_D", RHD_CONNECTOR_DVI_DUAL },
+ { "VGA", RHD_CONNECTOR_VGA },
+ { "COMPOSITE", RHD_CONNECTOR_TV },
+ { "SVIDEO", RHD_CONNECTOR_TV, },
+ { "D_CONNECTOR", RHD_CONNECTOR_NONE, },
+ { "9PIN_DIN", RHD_CONNECTOR_NONE },
+ { "SCART", RHD_CONNECTOR_TV },
+ { "HDMI_TYPE_A", RHD_CONNECTOR_NONE },
+ { "HDMI_TYPE_B", RHD_CONNECTOR_NONE },
+ { "HDMI_TYPE_B", RHD_CONNECTOR_NONE },
+ { "LVDS", RHD_CONNECTOR_PANEL },
+ { "7PIN_DIN", RHD_CONNECTOR_TV },
+ { "PCIE_CONNECTOR", RHD_CONNECTOR_NONE },
+ { "CROSSFIRE", RHD_CONNECTOR_NONE },
+ { "HARDCODE_DVI", RHD_CONNECTOR_NONE },
+ { "DISPLAYPORT", RHD_CONNECTOR_NONE}
+};
+static const int n_rhd_connector_objs = sizeof (rhd_connector_objs) / sizeof(struct _rhd_connector_objs);
+
+static const struct _rhd_encoders
+{
+ char *name;
+ rhdOutputType ot;
+} rhd_encoders[] = {
+ { "NONE", RHD_OUTPUT_NONE },
+ { "INTERNAL_LVDS", RHD_OUTPUT_LVDS },
+ { "INTERNAL_TMDS1", RHD_OUTPUT_TMDSA },
+ { "INTERNAL_TMDS2", RHD_OUTPUT_TMDSB },
+ { "INTERNAL_DAC1", RHD_OUTPUT_DACA },
+ { "INTERNAL_DAC2", RHD_OUTPUT_DACB },
+ { "INTERNAL_SDVOA", RHD_OUTPUT_NONE },
+ { "INTERNAL_SDVOB", RHD_OUTPUT_NONE },
+ { "SI170B", RHD_OUTPUT_NONE },
+ { "CH7303", RHD_OUTPUT_NONE },
+ { "CH7301", RHD_OUTPUT_NONE },
+ { "INTERNAL_DVO1", RHD_OUTPUT_NONE },
+ { "EXTERNAL_SDVOA", RHD_OUTPUT_NONE },
+ { "EXTERNAL_SDVOB", RHD_OUTPUT_NONE },
+ { "TITFP513", RHD_OUTPUT_NONE },
+ { "INTERNAL_LVTM1", RHD_OUTPUT_LVTMA },
+ { "VT1623", RHD_OUTPUT_NONE },
+ { "HDMI_SI1930", RHD_OUTPUT_NONE },
+ { "HDMI_INTERNAL", RHD_OUTPUT_NONE },
+ { "INTERNAL_KLDSCP_TMDS1", RHD_OUTPUT_TMDSA },
+ { "INTERNAL_KLSCP_DVO1", RHD_OUTPUT_NONE },
+ { "INTERNAL_KLDSCP_DAC1", RHD_OUTPUT_DACA },
+ { "INTERNAL_KLDSCP_DAC2", RHD_OUTPUT_DACB },
+ { "SI178", RHD_OUTPUT_NONE },
+ { "MVPU_FPGA", RHD_OUTPUT_NONE },
+ { "INTERNAL_DDI", RHD_OUTPUT_NONE },
+ { "VT1625", RHD_OUTPUT_NONE },
+ { "HDMI_SI1932", RHD_OUTPUT_NONE },
+ { "AN9801", RHD_OUTPUT_NONE },
+ { "DP501", RHD_OUTPUT_NONE },
+};
+static const int n_rhd_encoders = sizeof (rhd_encoders) / sizeof(struct _rhd_encoders);
+
+static const struct _rhd_connectors
+{
+ char *name;
+ rhdConnectorType con;
+ Bool dual;
+} rhd_connectors[] = {
+ {"NONE", RHD_CONNECTOR_NONE, FALSE },
+ {"VGA", RHD_CONNECTOR_VGA, FALSE },
+ {"DVI-I", RHD_CONNECTOR_DVI, TRUE },
+ {"DVI-D", RHD_CONNECTOR_DVI, FALSE },
+ {"DVI-A", RHD_CONNECTOR_DVI, FALSE },
+ {"SVIDEO", RHD_CONNECTOR_TV, FALSE },
+ {"COMPOSITE", RHD_CONNECTOR_TV, FALSE },
+ {"PANEL", RHD_CONNECTOR_PANEL, FALSE },
+ {"DIGITAL_LINK", RHD_CONNECTOR_NONE, FALSE },
+ {"SCART", RHD_CONNECTOR_TV, FALSE },
+ {"HDMI Type A", RHD_CONNECTOR_NONE, FALSE },
+ {"HDMI Type B", RHD_CONNECTOR_NONE, FALSE },
+ {"UNKNOWN", RHD_CONNECTOR_NONE, FALSE },
+ {"UNKNOWN", RHD_CONNECTOR_NONE, FALSE },
+ {"DVI+DIN", RHD_CONNECTOR_NONE, FALSE }
+};
+static const int n_rhd_connectors = sizeof(rhd_connectors) / sizeof(struct _rhd_connectors);
+
+static const struct _rhd_devices
+{
+ char *name;
+ rhdOutputType ot;
+} rhd_devices[] = {
+ {" CRT1", RHD_OUTPUT_NONE },
+ {" LCD1", RHD_OUTPUT_LVTMA },
+ {" TV1", RHD_OUTPUT_NONE },
+ {" DFP1", RHD_OUTPUT_TMDSA },
+ {" CRT2", RHD_OUTPUT_NONE },
+ {" LCD2", RHD_OUTPUT_LVTMA },
+ {" TV2", RHD_OUTPUT_NONE },
+ {" DFP2", RHD_OUTPUT_LVTMA },
+ {" CV", RHD_OUTPUT_NONE },
+ {" DFP3", RHD_OUTPUT_LVTMA }
+};
+static const int n_rhd_devices = sizeof(rhd_devices) / sizeof(struct _rhd_devices);
+
+static const rhdDDC hwddc[] = { RHD_DDC_0, RHD_DDC_1, RHD_DDC_2, RHD_DDC_3 };
+static const int n_hwddc = sizeof(hwddc) / sizeof(rhdDDC);
+
+static const rhdOutputType acc_dac[] = { RHD_OUTPUT_NONE, RHD_OUTPUT_DACA,
+ RHD_OUTPUT_DACB, RHD_OUTPUT_DAC_EXTERNAL };
+static const int n_acc_dac = sizeof(acc_dac) / sizeof (rhdOutputType);
+
+/*
+ *
+ */
static Bool
-rhdAtomExec (atomBIOSHandlePtr handle, int index, void *pspace, pointer *dataSpace)
+rhdAtomInterpretObjectID(atomBiosHandlePtr handle,
+ CARD16 id, CARD8 *obj_type, CARD8 *obj_id,
+ CARD8 *num, char **name)
+{
+ *obj_id = (id & OBJECT_ID_MASK) >> OBJECT_ID_SHIFT;
+ *num = (id & ENUM_ID_MASK) >> ENUM_ID_SHIFT;
+ *obj_type = (id & OBJECT_TYPE_MASK) >> OBJECT_TYPE_SHIFT;
+
+ *name = NULL;
+
+ switch (*obj_type) {
+ case GRAPH_OBJECT_TYPE_CONNECTOR:
+ if (!Limit(*obj_id, n_rhd_connector_objs, "obj_id"))
+ *name = rhd_connector_objs[*obj_id].name;
+ break;
+ case GRAPH_OBJECT_TYPE_ENCODER:
+ if (!Limit(*obj_id, n_rhd_encoders, "obj_id"))
+ *name = rhd_encoders[*obj_id].name;
+ break;
+ default:
+ break;
+ }
+ return TRUE;
+}
+
+/*
+ *
+ */
+static void
+rhdAtomDDCFromI2CRecord(atomBiosHandlePtr handle,
+ ATOM_I2C_RECORD *Record, rhdDDC *DDC)
+{
+ RHDDebug(handle->scrnIndex,
+ " %s: I2C Record: %s[%x] EngineID: %x I2CAddr: %x\n",
+ __func__,
+ Record->sucI2cId.bfHW_Capable ? "HW_Line" : "GPIO_ID",
+ Record->sucI2cId.bfI2C_LineMux,
+ Record->sucI2cId.bfHW_EngineID,
+ Record->ucI2CAddr);
+
+ if (!*(unsigned char *)&(Record->sucI2cId))
+ *DDC = RHD_DDC_NONE;
+ else {
+
+ if (Record->ucI2CAddr != 0)
+ return;
+
+ if (Record->sucI2cId.bfHW_Capable) {
+
+ *DDC = (rhdDDC)Record->sucI2cId.bfI2C_LineMux;
+ if (*DDC >= RHD_DDC_MAX)
+ *DDC = RHD_DDC_NONE;
+
+ } else {
+ *DDC = RHD_DDC_GPIO;
+ /* add GPIO pin parsing */
+ }
+ }
+}
+
+/*
+ *
+ */
+static void
+rhdAtomParseGPIOLutForHPD(atomBiosHandlePtr handle,
+ CARD8 pinID, rhdHPD *HPD)
+{
+ atomDataTablesPtr atomDataPtr;
+ ATOM_GPIO_PIN_LUT *gpio_pin_lut;
+ unsigned short size;
+ int i = 0;
+
+ //RHDFUNC(handle);
+
+ atomDataPtr = handle->atomDataPtr;
+
+ *HPD = RHD_HPD_NONE;
+
+ if (!rhdAtomGetTableRevisionAndSize(
+ &atomDataPtr->GPIO_Pin_LUT->sHeader, NULL, NULL, &size)) {
+ xf86DrvMsg(handle->scrnIndex, X_ERROR,
+ "%s: No valid GPIO pin LUT in AtomBIOS\n",__func__);
+ return;
+ }
+ gpio_pin_lut = atomDataPtr->GPIO_Pin_LUT;
+
+ while (1) {
+ if (gpio_pin_lut->asGPIO_Pin[i].ucGPIO_ID == pinID) {
+
+ if ((sizeof(ATOM_COMMON_TABLE_HEADER)
+ + (i * sizeof(ATOM_GPIO_PIN_ASSIGNMENT))) > size)
+ return;
+
+ RHDDebug(handle->scrnIndex,
+ " %s: GPIO PinID: %i Index: %x Shift: %i\n",
+ __func__,
+ pinID,
+ gpio_pin_lut->asGPIO_Pin[i].usGpioPin_AIndex,
+ gpio_pin_lut->asGPIO_Pin[i].ucGpioPinBitShift);
+
+ /* grr... map backwards: register indices -> line numbers */
+ if (gpio_pin_lut->asGPIO_Pin[i].usGpioPin_AIndex
+ == (DC_GPIO_HPD_A >> 2)) {
+ switch (gpio_pin_lut->asGPIO_Pin[i].ucGpioPinBitShift) {
+ case 0:
+ *HPD = RHD_HPD_0;
+ return;
+ case 8:
+ *HPD = RHD_HPD_1;
+ return;
+ case 16:
+ *HPD = RHD_HPD_2;
+ return;
+ }
+ }
+ }
+ i++;
+ }
+}
+
+/*
+ *
+ */
+static void
+rhdAtomHPDFromRecord(atomBiosHandlePtr handle,
+ ATOM_HPD_INT_RECORD *Record, rhdHPD *HPD)
+{
+ RHDDebug(handle->scrnIndex,
+ " %s: HPD Record: GPIO ID: %x Plugged_PinState: %x\n",
+ __func__,
+ Record->ucHPDIntGPIOID,
+ Record->ucPluggged_PinState);
+ rhdAtomParseGPIOLutForHPD(handle, Record->ucHPDIntGPIOID, HPD);
+}
+
+/*
+ *
+ */
+static char *
+rhdAtomDeviceTagsFromRecord(atomBiosHandlePtr handle,
+ ATOM_CONNECTOR_DEVICE_TAG_RECORD *Record)
+{
+ int i, j, k;
+ char *devices;
+
+ //RHDFUNC(handle);
+
+ RHDDebug(handle->scrnIndex," NumberOfDevice: %i\n",
+ Record->ucNumberOfDevice);
+
+ if (!Record->ucNumberOfDevice) return NULL;
+
+ devices = (char *)xcalloc(Record->ucNumberOfDevice * 4 + 1,1);
+
+ for (i = 0; i < Record->ucNumberOfDevice; i++) {
+ k = 0;
+ j = Record->asDeviceTag[i].usDeviceID;
+
+ while (!(j & 0x1)) { j >>= 1; k++; };
+
+ if (!Limit(k,n_rhd_devices,"usDeviceID"))
+ strcat(devices, rhd_devices[k].name);
+ }
+
+ RHDDebug(handle->scrnIndex," Devices:%s\n",devices);
+
+ return devices;
+}
+
+/*
+ *
+ */
+static AtomBiosResult
+rhdAtomConnectorInfoFromObjectHeader(atomBiosHandlePtr handle,
+ rhdConnectorInfoPtr *ptr)
+{
+ atomDataTablesPtr atomDataPtr;
+ CARD8 crev, frev;
+ ATOM_CONNECTOR_OBJECT_TABLE *con_obj;
+ rhdConnectorInfoPtr cp;
+ unsigned long object_header_end;
+ int ncon = 0;
+ int i,j;
+ unsigned short object_header_size;
+
+ //RHDFUNC(handle);
+
+ atomDataPtr = handle->atomDataPtr;
+
+ if (!rhdAtomGetTableRevisionAndSize(
+ &atomDataPtr->Object_Header->sHeader,
+ &crev,&frev,&object_header_size)) {
+ return ATOM_NOT_IMPLEMENTED;
+ }
+
+ if (crev < 2) /* don't bother with anything below rev 2 */
+ return ATOM_NOT_IMPLEMENTED;
+
+ if (!(cp = (rhdConnectorInfoPtr)xcalloc(sizeof(struct rhdConnectorInfo),
+ RHD_CONNECTORS_MAX)))
+ return ATOM_FAILED;
+
+ object_header_end =
+ atomDataPtr->Object_Header->usConnectorObjectTableOffset
+ + object_header_size;
+
+ RHDDebug(handle->scrnIndex,"ObjectTable - size: %u, BIOS - size: %u "
+ "TableOffset: %u object_header_end: %u\n",
+ object_header_size, handle->BIOSImageSize,
+ atomDataPtr->Object_Header->usConnectorObjectTableOffset,
+ object_header_end);
+
+ if ((object_header_size > handle->BIOSImageSize)
+ || (atomDataPtr->Object_Header->usConnectorObjectTableOffset
+ > handle->BIOSImageSize)
+ || object_header_end > handle->BIOSImageSize) {
+ xf86DrvMsg(handle->scrnIndex, X_ERROR,
+ "%s: Object table information is bogus\n",__func__);
+ return ATOM_FAILED;
+ }
+
+ if (((unsigned long)&atomDataPtr->Object_Header->sHeader
+ + object_header_end) > ((unsigned long)handle->BIOSBase
+ + handle->BIOSImageSize)) {
+ xf86DrvMsg(handle->scrnIndex, X_ERROR,
+ "%s: Object table extends beyond BIOS Image\n",__func__);
+ return ATOM_FAILED;
+ }
+
+ con_obj = (ATOM_CONNECTOR_OBJECT_TABLE *)
+ ((char *)&atomDataPtr->Object_Header->sHeader +
+ atomDataPtr->Object_Header->usConnectorObjectTableOffset);
+
+ for (i = 0; i < con_obj->ucNumberOfObjects; i++) {
+ ATOM_SRC_DST_TABLE_FOR_ONE_OBJECT *SrcDstTable;
+ ATOM_COMMON_RECORD_HEADER *Record;
+ int record_base;
+ CARD8 obj_type, obj_id, num;
+ char *name;
+ int nout = 0;
+
+ rhdAtomInterpretObjectID(handle, con_obj->asObjects[i].usObjectID,
+ &obj_type, &obj_id, &num, &name);
+
+ RHDDebug(handle->scrnIndex, "Object: ID: %x name: %s type: %x id: %x\n",
+ con_obj->asObjects[i].usObjectID, name ? name : "",
+ obj_type, obj_id);
+
+
+ if (obj_type != GRAPH_OBJECT_TYPE_CONNECTOR)
+ continue;
+
+ SrcDstTable = (ATOM_SRC_DST_TABLE_FOR_ONE_OBJECT *)
+ ((char *)&atomDataPtr->Object_Header->sHeader
+ + con_obj->asObjects[i].usSrcDstTableOffset);
+
+ if (con_obj->asObjects[i].usSrcDstTableOffset
+ + (SrcDstTable->ucNumberOfSrc
+ * sizeof(ATOM_SRC_DST_TABLE_FOR_ONE_OBJECT))
+ > handle->BIOSImageSize) {
+ xf86DrvMsg(handle->scrnIndex, X_ERROR, "%s: SrcDstTable[%i] extends "
+ "beyond Object_Header table\n",__func__,i);
+ continue;
+ }
+
+ cp[ncon].Type = rhd_connector_objs[obj_id].con;
+ cp[ncon].Name = RhdAppendString(cp[ncon].Name,name);
+
+ for (j = 0; j < SrcDstTable->ucNumberOfSrc; j++) {
+ CARD8 stype, sobj_id, snum;
+ char *sname;
+
+ rhdAtomInterpretObjectID(handle, SrcDstTable->usSrcObjectID[j],
+ &stype, &sobj_id, &snum, &sname);
+
+ RHDDebug(handle->scrnIndex, " * SrcObject: ID: %x name: %s\n",
+ SrcDstTable->usSrcObjectID[j], sname);
+
+ cp[ncon].Output[nout] = rhd_encoders[sobj_id].ot;
+ if (++nout >= MAX_OUTPUTS_PER_CONNECTOR)
+ break;
+ }
+
+ Record = (ATOM_COMMON_RECORD_HEADER *)
+ ((char *)&atomDataPtr->Object_Header->sHeader
+ + con_obj->asObjects[i].usRecordOffset);
+
+ record_base = con_obj->asObjects[i].usRecordOffset;
+
+ while (Record->ucRecordType > 0
+ && Record->ucRecordType <= ATOM_MAX_OBJECT_RECORD_NUMBER ) {
+ char *taglist;
+
+ if ((record_base += Record->ucRecordSize)
+ > object_header_size) {
+ xf86DrvMsg(handle->scrnIndex, X_ERROR,
+ "%s: Object Records extend beyond Object Table\n",
+ __func__);
+ break;
+ }
+
+ RHDDebug(handle->scrnIndex, " - Record Type: %x\n",
+ Record->ucRecordType);
+
+ switch (Record->ucRecordType) {
+
+ case ATOM_I2C_RECORD_TYPE:
+ rhdAtomDDCFromI2CRecord(handle,
+ (ATOM_I2C_RECORD *)Record,
+ &cp[ncon].DDC);
+ break;
+
+ case ATOM_HPD_INT_RECORD_TYPE:
+ rhdAtomHPDFromRecord(handle,
+ (ATOM_HPD_INT_RECORD *)Record,
+ &cp[ncon].HPD);
+ break;
+
+ case ATOM_CONNECTOR_DEVICE_TAG_RECORD_TYPE:
+ taglist = rhdAtomDeviceTagsFromRecord(handle,
+ (ATOM_CONNECTOR_DEVICE_TAG_RECORD *)Record);
+ if (taglist) {
+ cp[ncon].Name = RhdAppendString(cp[ncon].Name,taglist);
+ xfree(taglist);
+ }
+ break;
+
+ default:
+ break;
+ }
+
+ Record = (ATOM_COMMON_RECORD_HEADER*)
+ ((char *)Record + Record->ucRecordSize);
+
+ }
+
+ if ((++ncon) == RHD_CONNECTORS_MAX)
+ break;
+ }
+ *ptr = cp;
+
+ RhdPrintConnectorInfo(handle->scrnIndex, cp);
+
+ return ATOM_SUCCESS;
+}
+
+/*
+ *
+ */
+static AtomBiosResult
+rhdAtomConnectorInfoFromSupportedDevices(atomBiosHandlePtr handle,
+ rhdConnectorInfoPtr *ptr)
+{
+ atomDataTablesPtr atomDataPtr;
+ CARD8 crev, frev;
+ rhdConnectorInfoPtr cp;
+ struct {
+ rhdOutputType ot;
+ rhdConnectorType con;
+ rhdDDC ddc;
+ rhdHPD hpd;
+ Bool dual;
+ char *name;
+ char *outputName;
+ } devices[ATOM_MAX_SUPPORTED_DEVICE];
+ int ncon = 0;
+ int n;
+
+ //RHDFUNC(handle);
+
+ atomDataPtr = handle->atomDataPtr;
+
+ if (!rhdAtomGetTableRevisionAndSize(
+ &(atomDataPtr->SupportedDevicesInfo.SupportedDevicesInfo->sHeader),
+ &crev,&frev,NULL)) {
+ return ATOM_NOT_IMPLEMENTED;
+ }
+
+ if (!(cp = (rhdConnectorInfoPtr)xcalloc(RHD_CONNECTORS_MAX,
+ sizeof(struct rhdConnectorInfo))))
+ return ATOM_FAILED;
+
+ for (n = 0; n < ATOM_MAX_SUPPORTED_DEVICE; n++) {
+ ATOM_CONNECTOR_INFO_I2C ci
+ = atomDataPtr->SupportedDevicesInfo.SupportedDevicesInfo->asConnInfo[n];
+
+ devices[n].ot = RHD_OUTPUT_NONE;
+
+ if (!(atomDataPtr->SupportedDevicesInfo
+ .SupportedDevicesInfo->usDeviceSupport & (1 << n)))
+ continue;
+
+ if (Limit(ci.sucConnectorInfo.sbfAccess.bfConnectorType,
+ n_rhd_connectors, "bfConnectorType"))
+ continue;
+
+ devices[n].con
+ = rhd_connectors[ci.sucConnectorInfo.sbfAccess.bfConnectorType].con;
+ if (devices[n].con == RHD_CONNECTOR_NONE)
+ continue;
+
+ devices[n].dual
+ = rhd_connectors[ci.sucConnectorInfo.sbfAccess.bfConnectorType].dual;
+ devices[n].name
+ = rhd_connectors[ci.sucConnectorInfo.sbfAccess.bfConnectorType].name;
+
+ RHDDebug(handle->scrnIndex,"AtomBIOS Connector[%i]: %s Device:%s ",n,
+ rhd_connectors[ci.sucConnectorInfo
+ .sbfAccess.bfConnectorType].name,
+ rhd_devices[n].name);
+
+ devices[n].outputName = rhd_devices[n].name;
+
+ if (!Limit(ci.sucConnectorInfo.sbfAccess.bfAssociatedDAC,
+ n_acc_dac, "bfAssociatedDAC")) {
+ if ((devices[n].ot
+ = acc_dac[ci.sucConnectorInfo.sbfAccess.bfAssociatedDAC])
+ == RHD_OUTPUT_NONE) {
+ devices[n].ot = rhd_devices[n].ot;
+ }
+ } else
+ devices[n].ot = RHD_OUTPUT_NONE;
+
+ RHDDebugCont("Output: %x ",devices[n].ot);
+
+ if (ci.sucI2cId.sbfAccess.bfHW_Capable) {
+
+ RHDDebugCont("HW DDC %i ",
+ ci.sucI2cId.sbfAccess.bfI2C_LineMux);
+
+ if (Limit(ci.sucI2cId.sbfAccess.bfI2C_LineMux,
+ n_hwddc, "bfI2C_LineMux"))
+ devices[n].ddc = RHD_DDC_NONE;
+ else
+ devices[n].ddc = hwddc[ci.sucI2cId.sbfAccess.bfI2C_LineMux];
+
+ } else if (ci.sucI2cId.sbfAccess.bfI2C_LineMux) {
+
+ RHDDebugCont("GPIO DDC ");
+ devices[n].ddc = RHD_DDC_GPIO;
+
+ /* add support for GPIO line */
+ } else {
+
+ RHDDebugCont("NO DDC ");
+ devices[n].ddc = RHD_DDC_NONE;
+
+ }
+
+ if (crev > 1) {
+ ATOM_CONNECTOR_INC_SRC_BITMAP isb
+ = atomDataPtr->SupportedDevicesInfo
+ .SupportedDevicesInfo_HD->asIntSrcInfo[n];
+
+ switch (isb.ucIntSrcBitmap) {
+ case 0x4:
+ RHDDebugCont("HPD 0\n");
+ devices[n].hpd = RHD_HPD_0;
+ break;
+ case 0xa:
+ RHDDebugCont("HPD 1\n");
+ devices[n].hpd = RHD_HPD_1;
+ break;
+ default:
+ RHDDebugCont("NO HPD\n");
+ devices[n].hpd = RHD_HPD_NONE;
+ break;
+ }
+ } else {
+ RHDDebugCont("NO HPD\n");
+ devices[n].hpd = RHD_HPD_NONE;
+ }
+ }
+ /* sort devices for connectors */
+ for (n = 0; n < ATOM_MAX_SUPPORTED_DEVICE; n++) {
+ int i;
+
+ if (devices[n].ot == RHD_OUTPUT_NONE)
+ continue;
+ if (devices[n].con == RHD_CONNECTOR_NONE)
+ continue;
+
+ cp[ncon].DDC = devices[n].ddc;
+ cp[ncon].HPD = devices[n].hpd;
+ cp[ncon].Output[0] = devices[n].ot;
+ cp[ncon].Output[1] = RHD_OUTPUT_NONE;
+ cp[ncon].Type = devices[n].con;
+ cp[ncon].Name = xf86strdup(devices[n].name);
+ cp[ncon].Name = RhdAppendString(cp[ncon].Name, devices[n].outputName);
+
+ if (devices[n].dual) {
+ if (devices[n].ddc == RHD_DDC_NONE)
+ xf86DrvMsg(handle->scrnIndex, X_ERROR,
+ "No DDC channel for device %s found."
+ " Cannot find matching device.\n",devices[n].name);
+ else {
+ for (i = n + 1; i < ATOM_MAX_SUPPORTED_DEVICE; i++) {
+
+ if (!devices[i].dual)
+ continue;
+
+ if (devices[n].ddc != devices[i].ddc)
+ continue;
+
+ if (((devices[n].ot == RHD_OUTPUT_DACA
+ || devices[n].ot == RHD_OUTPUT_DACB)
+ && (devices[i].ot == RHD_OUTPUT_LVTMA
+ || devices[i].ot == RHD_OUTPUT_TMDSA))
+ || ((devices[i].ot == RHD_OUTPUT_DACA
+ || devices[i].ot == RHD_OUTPUT_DACB)
+ && (devices[n].ot == RHD_OUTPUT_LVTMA
+ || devices[n].ot == RHD_OUTPUT_TMDSA))) {
+
+ cp[ncon].Output[1] = devices[i].ot;
+
+ if (cp[ncon].HPD == RHD_HPD_NONE)
+ cp[ncon].HPD = devices[i].hpd;
+
+ cp[ncon].Name = RhdAppendString(cp[ncon].Name,
+ devices[i].outputName);
+ devices[i].ot = RHD_OUTPUT_NONE; /* zero the device */
+ }
+ }
+ }
+ }
+
+ if ((++ncon) == RHD_CONNECTORS_MAX)
+ break;
+ }
+ *ptr = cp;
+
+ RhdPrintConnectorInfo(handle->scrnIndex, cp);
+
+ return ATOM_SUCCESS;
+}
+
+/*
+ *
+ */
+static AtomBiosResult
+rhdAtomConnectorInfo(atomBiosHandlePtr handle,
+ AtomBiosRequestID unused, AtomBiosArgPtr data)
+{
+ data->connectorInfo = NULL;
+
+ if (rhdAtomConnectorInfoFromObjectHeader(handle,&data->connectorInfo)
+ == ATOM_SUCCESS)
+ return ATOM_SUCCESS;
+ else
+ return rhdAtomConnectorInfoFromSupportedDevices(handle,
+ &data->connectorInfo);
+}
+
+# ifdef ATOM_BIOS_PARSER
+static AtomBiosResult
+rhdAtomExec (atomBiosHandlePtr handle,
+ AtomBiosRequestID unused, AtomBiosArgPtr data)
{
RADEONInfoPtr info = RADEONPTR (xf86Screens[handle->scrnIndex]);
Bool ret = FALSE;
char *msg;
+ int idx = data->exec.index;
+ void *pspace = data->exec.pspace;
+ pointer *dataSpace = data->exec.dataSpace;
+
+ //RHDFUNCI(handle->scrnIndex);
- // RHDFUNCI(handle->scrnIndex);
if (dataSpace) {
if (!handle->fbBase && !handle->scratchBase)
- return FALSE;
+ return ATOM_FAILED;
if (handle->fbBase) {
if (!info->FB) {
xf86DrvMsg(handle->scrnIndex, X_ERROR, "%s: "
"Cannot exec AtomBIOS: framebuffer not mapped\n",
__func__);
- return FALSE;
+ return ATOM_FAILED;
}
*dataSpace = (CARD8*)info->FB + handle->fbBase;
} else
*dataSpace = (CARD8*)handle->scratchBase;
}
- ret = ParseTableWrapper(pspace, index, handle,
+ ret = ParseTableWrapper(pspace, idx, handle,
handle->BIOSBase,
&msg);
if (!ret)
@@ -677,74 +1949,75 @@ rhdAtomExec (atomBIOSHandlePtr handle, int index, void *pspace, pointer *dataSp
else
xf86DrvMsgVerb(handle->scrnIndex, X_INFO, 5, "%s\n",msg);
- return (ret) ? TRUE : FALSE;
+ return (ret) ? ATOM_SUCCESS : ATOM_FAILED;
}
# endif
AtomBiosResult
-RHDAtomBIOSFunc(int scrnIndex, atomBIOSHandlePtr handle, AtomBiosFunc func,
- AtomBIOSArgPtr data)
+RHDAtomBiosFunc(int scrnIndex, atomBiosHandlePtr handle,
+ AtomBiosRequestID id, AtomBiosArgPtr data)
{
- AtomBiosResult ret = ATOM_NOT_IMPLEMENTED;
- CARD32 val;
-
-# define do_return(x) { \
- if (func < sizeof(AtomBIOSFuncStr)) \
- xf86DrvMsgVerb(scrnIndex, (x == ATOM_SUCCESS) ? 7 : 1, \
- (x == ATOM_SUCCESS) ? X_INFO : X_WARNING, \
- "Call to %s %s\n", AtomBIOSFuncStr[func], \
- (x == ATOM_SUCCESS) ? "succeeded" : "FAILED"); \
- return (x); \
- }
- assert (sizeof(AtomBIOSQueryStr) == (FUNC_END - ATOM_QUERY_FUNCS + 1));
+ AtomBiosResult ret = ATOM_FAILED;
+ int i;
+ char *msg = NULL;
+ enum msgDataFormat msg_f = MSG_FORMAT_NONE;
+ AtomBiosRequestFunc req_func = NULL;
- if (func == ATOMBIOS_INIT) {
- if (!(data->atomp = rhdInitAtomBIOS(scrnIndex)))
- do_return(ATOM_FAILED);
- do_return(ATOM_SUCCESS);
- }
- if (!handle)
- do_return(ATOM_FAILED);
- if (func == ATOMBIOS_ALLOCATE_FB_SCRATCH) {
- if (rhdAtomBIOSAllocateFbScratch( scrnIndex, handle, &data->fb.start, &data->fb.size)) {
- do_return(ATOM_SUCCESS);
- } else {
- do_return(ATOM_FAILED);
+ //RHDFUNCI(scrnIndex);
+
+ for (i = 0; AtomBiosRequestList[i].id != FUNC_END; i++) {
+ if (id == AtomBiosRequestList[i].id) {
+ req_func = AtomBiosRequestList[i].request;
+ msg = AtomBiosRequestList[i].message;
+ msg_f = AtomBiosRequestList[i].message_format;
+ break;
}
}
- if (func <= ATOMBIOS_TEARDOWN) {
- rhdTearDownAtomBIOS(scrnIndex, handle);
- do_return(ATOM_SUCCESS);
+
+ if (req_func == NULL) {
+ xf86DrvMsg(scrnIndex, X_ERROR, "Unknown AtomBIOS request: %i\n",id);
+ return ATOM_NOT_IMPLEMENTED;
}
-# ifdef ATOM_BIOS_PARSER
- if (func == ATOMBIOS_EXEC) {
- if (!rhdAtomExec(handle, data->exec.index,
- data->exec.pspace, data->exec.dataSpace)) {
- do_return(ATOM_FAILED);
- } else {
- do_return(ATOM_SUCCESS);
+ /* Hack for now */
+ if (id == ATOMBIOS_INIT)
+ data->val = scrnIndex;
+
+ if (id == ATOMBIOS_INIT || handle)
+ ret = req_func(handle, id, data);
+
+ if (ret == ATOM_SUCCESS) {
+
+ switch (msg_f) {
+ case MSG_FORMAT_DEC:
+ xf86DrvMsg(scrnIndex,X_INFO,"%s: %li\n", msg,
+ (unsigned long) data->val);
+ break;
+ case MSG_FORMAT_HEX:
+ xf86DrvMsg(scrnIndex,X_INFO,"%s: 0x%lx\n",msg ,
+ (unsigned long) data->val);
+ break;
+ case MSG_FORMAT_NONE:
+ xf86DrvMsgVerb(scrnIndex, 7, X_INFO,
+ "Call to %s succeeded\n", msg);
+ break;
}
- } else
-# endif
- if (func >= ATOM_QUERY_FUNCS && func < ATOM_VRAM_QUERIES) {
- ret = rhdAtomBIOSFirmwareInfoQuery(scrnIndex, handle, func, &val);
- data->val = val;
- } else if (func >= ATOM_VRAM_QUERIES && func < FUNC_END) {
- ret = rhdAtomBIOSVramInfoQuery(scrnIndex, handle, func, &val);
- data->val = val;
+
} else {
- xf86DrvMsg(scrnIndex,X_INFO,"%s: Received unknown query\n",__func__);
- return ATOM_NOT_IMPLEMENTED;
+
+ char *result = (ret == ATOM_FAILED) ? "failed"
+ : "not implemented";
+ switch (msg_f) {
+ case MSG_FORMAT_DEC:
+ case MSG_FORMAT_HEX:
+ xf86DrvMsgVerb(scrnIndex, 1, X_WARNING,
+ "Call to %s %s\n", msg, result);
+ break;
+ case MSG_FORMAT_NONE:
+ xf86DrvMsg(scrnIndex,X_INFO,"Query for %s: %s\n", msg, result);
+ break;
+ }
}
- if (ret == ATOM_SUCCESS)
- xf86DrvMsg(scrnIndex,X_INFO,"%s: %i 0x%08x\n",
- AtomBIOSQueryStr[func - ATOM_QUERY_FUNCS], (unsigned int)val, (unsigned int)val);
- else
- xf86DrvMsg(scrnIndex,X_INFO,"Query for %s: %s\n",
- AtomBIOSQueryStr[func - ATOM_QUERY_FUNCS],
- ret == ATOM_FAILED ? "failed" : "not implemented");
return ret;
-
}
# ifdef ATOM_BIOS_PARSER
@@ -771,54 +2044,50 @@ CailDelayMicroSeconds(VOID *CAIL, UINT32 delay)
usleep(delay);
- // DEBUGP(xf86DrvMsg(((atomBIOSHandlePtr)CAIL)->scrnIndex,X_INFO,"Delay %i usec\n",delay));
+ DEBUGP(xf86DrvMsg(((atomBiosHandlePtr)CAIL)->scrnIndex,X_INFO,"Delay %i usec\n",delay));
}
UINT32
-CailReadATIRegister(VOID* CAIL, UINT32 index)
+CailReadATIRegister(VOID* CAIL, UINT32 idx)
{
UINT32 ret;
- ScrnInfoPtr pScrn = xf86Screens[((atomBIOSHandlePtr)CAIL)->scrnIndex];
- RADEONInfoPtr info = RADEONPTR(pScrn);
- unsigned char *RADEONMMIO = info->MMIO;
CAILFUNC(CAIL);
- ret = INREG(index << 2);
- DEBUGP(ErrorF("%s(%x) = %x\n",__func__,index << 2,ret));
+ ret = INREG(idx << 2);
+ DEBUGP(ErrorF("%s(%x) = %x\n",__func__,idx << 2,ret));
return ret;
}
VOID
-CailWriteATIRegister(VOID *CAIL, UINT32 index, UINT32 data)
+CailWriteATIRegister(VOID *CAIL, UINT32 idx, UINT32 data)
{
- CAILFUNC(CAIL);
ScrnInfoPtr pScrn = xf86Screens[((atomBIOSHandlePtr)CAIL)->scrnIndex];
RADEONInfoPtr info = RADEONPTR(pScrn);
unsigned char *RADEONMMIO = info->MMIO;
+ CAILFUNC(CAIL);
- OUTREG(index << 2,data);
- DEBUGP(ErrorF("%s(%x,%x)\n",__func__,index << 2,data));
+ OUTREG(idx << 2,data);
+ DEBUGP(ErrorF("%s(%x,%x)\n",__func__,idx << 2,data));
}
UINT32
-CailReadFBData(VOID* CAIL, UINT32 index)
+CailReadFBData(VOID* CAIL, UINT32 idx)
{
- UINT32 ret;
ScrnInfoPtr pScrn = xf86Screens[((atomBIOSHandlePtr)CAIL)->scrnIndex];
RADEONInfoPtr info = RADEONPTR(pScrn);
- unsigned char *RADEONMMIO = info->MMIO;
+ UINT32 ret;
CAILFUNC(CAIL);
- if (((atomBIOSHandlePtr)CAIL)->fbBase) {
+ if (((atomBiosHandlePtr)CAIL)->fbBase) {
CARD8 *FBBase = (CARD8*)info->FB;
- ret = *((CARD32*)(FBBase + (((atomBIOSHandlePtr)CAIL)->fbBase) + index));
- DEBUGP(ErrorF("%s(%x) = %x\n",__func__,index,ret));
- } else if (((atomBIOSHandlePtr)CAIL)->scratchBase) {
- ret = *(CARD32*)((CARD8*)(((atomBIOSHandlePtr)CAIL)->scratchBase) + index);
- DEBUGP(ErrorF("%s(%x) = %x\n",__func__,index,ret));
+ ret = *((CARD32*)(FBBase + (((atomBIOSHandlePtr)CAIL)->fbBase) + idx));
+ DEBUGP(ErrorF("%s(%x) = %x\n",__func__,idx,ret));
+ } else if (((atomBiosHandlePtr)CAIL)->scratchBase) {
+ ret = *(CARD32*)((CARD8*)(((atomBiosHandlePtr)CAIL)->scratchBase) + idx);
+ DEBUGP(ErrorF("%s(%x) = %x\n",__func__,idx,ret));
} else {
- xf86DrvMsg(((atomBIOSHandlePtr)CAIL)->scrnIndex,X_ERROR,
+ xf86DrvMsg(((atomBiosHandlePtr)CAIL)->scrnIndex,X_ERROR,
"%s: no fbbase set\n",__func__);
return 0;
}
@@ -826,27 +2095,30 @@ CailReadFBData(VOID* CAIL, UINT32 index)
}
VOID
-CailWriteFBData(VOID *CAIL, UINT32 index, UINT32 data)
+CailWriteFBData(VOID *CAIL, UINT32 idx, UINT32 data)
{
+ ScrnInfoPtr pScrn = xf86Screens[((atomBIOSHandlePtr)CAIL)->scrnIndex];
+ RADEONInfoPtr info = RADEONPTR(pScrn);
CAILFUNC(CAIL);
- DEBUGP(ErrorF("%s(%x,%x)\n",__func__,index,data));
- if (((atomBIOSHandlePtr)CAIL)->fbBase) {
+ DEBUGP(ErrorF("%s(%x,%x)\n",__func__,idx,data));
+ if (((atomBiosHandlePtr)CAIL)->fbBase) {
CARD8 *FBBase = (CARD8*)
RADEONPTR(xf86Screens[((atomBIOSHandlePtr)CAIL)->scrnIndex])->FB;
- *((CARD32*)(FBBase + (((atomBIOSHandlePtr)CAIL)->fbBase) + index)) = data;
- } else if (((atomBIOSHandlePtr)CAIL)->scratchBase) {
- *(CARD32*)((CARD8*)(((atomBIOSHandlePtr)CAIL)->scratchBase) + index) = data;
+ *((CARD32*)(FBBase + (((atomBIOSHandlePtr)CAIL)->fbBase) + idx)) = data;
+ } else if (((atomBiosHandlePtr)CAIL)->scratchBase) {
+ *(CARD32*)((CARD8*)(((atomBiosHandlePtr)CAIL)->scratchBase) + idx) = data;
} else
- xf86DrvMsg(((atomBIOSHandlePtr)CAIL)->scrnIndex,X_ERROR,
+ xf86DrvMsg(((atomBiosHandlePtr)CAIL)->scrnIndex,X_ERROR,
"%s: no fbbase set\n",__func__);
}
ULONG
CailReadMC(VOID *CAIL, ULONG Address)
{
- ULONG ret;
ScrnInfoPtr pScrn = xf86Screens[((atomBIOSHandlePtr)CAIL)->scrnIndex];
+ ULONG ret;
+
CAILFUNC(CAIL);
ret = INMC(pScrn, Address);
@@ -857,116 +2129,88 @@ CailReadMC(VOID *CAIL, ULONG Address)
VOID
CailWriteMC(VOID *CAIL, ULONG Address, ULONG data)
{
- CAILFUNC(CAIL);
ScrnInfoPtr pScrn = xf86Screens[((atomBIOSHandlePtr)CAIL)->scrnIndex];
+
+ CAILFUNC(CAIL);
DEBUGP(ErrorF("%s(%x,%x)\n",__func__,Address,data));
OUTMC(pScrn, Address, data);
}
+#ifdef XSERVER_LIBPCIACCESS
+
VOID
-CailReadPCIConfigData(VOID*CAIL, VOID* ret, UINT32 index,UINT16 size)
+CailReadPCIConfigData(VOID*CAIL, VOID* ret, UINT32 idx,UINT16 size)
{
-#if !XSERVER_LIBPCIACCESS
- PCITAG tag = ((atomBIOSHandlePtr)CAIL)->PciTag;
+ pci_device_cfg_read(RADEONPTR(xf86Screens[((atomBIOSHandlePtr)CAIL)->scrnIndex])->PciInfo,
+ ret,idx << 2 , size >> 3, NULL);
+}
- CAILFUNC(CAIL);
+VOID
+CailWritePCIConfigData(VOID*CAIL,VOID*src,UINT32 idx,UINT16 size)
+{
+ pci_device_cfg_write(RADEONPTR(xf86Screens[((atomBIOSHandlePtr)CAIL)->scrnIndex])->PciInfo,
+ src, idx << 2, size >> 3, NULL);
+}
- switch (size) {
- case 8:
- *(CARD8*)ret = pciReadByte(tag,index << 2);
- break;
- case 16:
- *(CARD16*)ret = pciReadWord(tag,index << 2);
- break;
- case 32:
- *(CARD32*)ret = pciReadLong(tag,index << 2);
- break;
- default:
- xf86DrvMsg(((atomBIOSHandlePtr)CAIL)->scrnIndex,
- X_ERROR,"%s: Unsupported size: %i\n",
- __func__,(int)size);
- return;
- break;
- }
#else
- struct pci_device *device = ((atomBIOSHandlePtr)CAIL)->device;
+
+VOID
+CailReadPCIConfigData(VOID*CAIL, VOID* ret, UINT32 idx,UINT16 size)
+{
+ PCITAG tag = ((atomBiosHandlePtr)CAIL)->PciTag;
CAILFUNC(CAIL);
switch (size) {
case 8:
- pci_device_cfg_read_u8(device, (CARD8*)ret, index << 2);
+ *(CARD8*)ret = pciReadByte(tag,idx << 2);
break;
case 16:
- pci_device_cfg_read_u16(device, (CARD16*)ret, index << 2);
+ *(CARD16*)ret = pciReadWord(tag,idx << 2);
break;
case 32:
- pci_device_cfg_read_u32(device, (uint32_t*)ret, index << 2);
+ *(CARD32*)ret = pciReadLong(tag,idx << 2);
break;
default:
- xf86DrvMsg(((atomBIOSHandlePtr)CAIL)->scrnIndex,
+ xf86DrvMsg(((atomBiosHandlePtr)CAIL)->scrnIndex,
X_ERROR,"%s: Unsupported size: %i\n",
__func__,(int)size);
return;
break;
}
- DEBUGP(ErrorF("%s(%x) = %x\n",__func__,index,*(unsigned int*)ret));
-#endif
+ DEBUGP(ErrorF("%s(%x) = %x\n",__func__,idx,*(unsigned int*)ret));
+
}
VOID
-CailWritePCIConfigData(VOID*CAIL,VOID*src,UINT32 index,UINT16 size)
+CailWritePCIConfigData(VOID*CAIL,VOID*src,UINT32 idx,UINT16 size)
{
-#if !XSERVER_LIBPCIACCESS
- PCITAG tag = ((atomBIOSHandlePtr)CAIL)->PciTag;
-
- CAILFUNC(CAIL);
- DEBUGP(ErrorF("%s(%x,%x)\n",__func__,index,(*(unsigned int*)src)));
- switch (size) {
- case 8:
- pciWriteByte(tag,index << 2,*(CARD8*)src);
- break;
- case 16:
- pciWriteWord(tag,index << 2,*(CARD16*)src);
- break;
- case 32:
- pciWriteLong(tag,index << 2,*(CARD32*)src);
- break;
- default:
- xf86DrvMsg(((atomBIOSHandlePtr)CAIL)->scrnIndex,X_ERROR,
- "%s: Unsupported size: %i\n",__func__,(int)size);
- break;
- }
-#else
- struct pci_device *device = ((atomBIOSHandlePtr)CAIL)->device;
+ PCITAG tag = ((atomBiosHandlePtr)CAIL)->PciTag;
CAILFUNC(CAIL);
- DEBUGP(ErrorF("%s(%x,%x)\n",__func__,index,(*(unsigned int*)src)));
+ DEBUGP(ErrorF("%s(%x,%x)\n",__func__,idx,(*(unsigned int*)src)));
switch (size) {
case 8:
- pci_device_cfg_write_u8(device,index << 2,*(CARD8*)src);
+ pciWriteByte(tag,idx << 2,*(CARD8*)src);
break;
case 16:
- pci_device_cfg_write_u16(device,index << 2,*(uint16_t *)src);
+ pciWriteWord(tag,idx << 2,*(CARD16*)src);
break;
case 32:
- pci_device_cfg_write_u32(device,index << 2,*(uint32_t *)src);
+ pciWriteLong(tag,idx << 2,*(CARD32*)src);
break;
default:
- xf86DrvMsg(((atomBIOSHandlePtr)CAIL)->scrnIndex,X_ERROR,
+ xf86DrvMsg(((atomBiosHandlePtr)CAIL)->scrnIndex,X_ERROR,
"%s: Unsupported size: %i\n",__func__,(int)size);
break;
}
-#endif
}
+#endif
ULONG
CailReadPLL(VOID *CAIL, ULONG Address)
{
ScrnInfoPtr pScrn = xf86Screens[((atomBIOSHandlePtr)CAIL)->scrnIndex];
- RADEONInfoPtr info = RADEONPTR(pScrn);
- unsigned char *RADEONMMIO = info->MMIO;
-
ULONG ret;
CAILFUNC(CAIL);
@@ -988,117 +2232,6 @@ CailWritePLL(VOID *CAIL, ULONG Address,ULONG Data)
RADEONOUTPLL(pScrn, Address, Data);
}
-void
-rhdTestAtomBIOS(atomBIOSHandlePtr atomBIOS)
-{
- READ_EDID_FROM_HW_I2C_DATA_PARAMETERS i2cData;
- AtomBIOSArg data;
- int i;
- unsigned char *space;
-
- i2cData.usPrescale = 0x7fff;
- i2cData.usVRAMAddress = 0;
- i2cData.usStatus = 128;
- i2cData.ucSlaveAddr = 0xA0;
-
- data.exec.dataSpace = (void*)&space;
- data.exec.index = GetIndexIntoMasterTable(COMMAND, ReadEDIDFromHWAssistedI2C);
- data.exec.pspace = &i2cData;
-
- for (i = 0; i < 4; i++) {
- i2cData.ucLineNumber = i;
- if (RHDAtomBIOSFunc(atomBIOS->scrnIndex, atomBIOS, ATOMBIOS_EXEC, &data) == ATOM_SUCCESS) {
- int j;
- CARD8 chksum = 0;
- xf86DrvMsg(atomBIOS->scrnIndex, X_INFO,"%s: I2C channel %i STATUS: %x\n",
- __func__,i,i2cData.usStatus);
- /* read good ? */
- if ((i2cData.usStatus >> 8) == HW_ASSISTED_I2C_STATUS_SUCCESS) {
- /* checksum good? */
- ErrorF("i2c data ustatus good %04X\n", i2cData.usStatus);
- if (!(i2cData.usStatus & 0xff)) {
-#if 0
- RhdDebugDump(atomBIOS->scrnIndex, space, 128);
-#endif
- for (j = 0; j < 128; j++)
- chksum += space[i];
- xf86DrvMsg(atomBIOS->scrnIndex, X_INFO, "DDC Checksum: %i\n",chksum);
- }
- }
- }
- }
-}
# endif
-#else /* ATOM_BIOS */
-
-AtomBiosResult
-RHDAtomBIOSFunc(int scrnIndex, atomBIOSHandlePtr handle, AtomBiosFunc func,
- AtomBIOSArgPtr data)
-{
- assert (sizeof(AtomBIOSQueryStr) == (FUNC_END - ATOM_QUERY_FUNCS + 1));
-
- if (func < ATOM_QUERY_FUNCS) {
- if (func >= 0 && func < sizeof(AtomBIOSFuncStr))
- xf86DrvMsgVerb(scrnIndex, 5, X_WARNING,
- "AtomBIOS support not available, cannot execute %s\n",
- AtomBIOSFuncStr[func]);
- else
- xf86DrvMsg(scrnIndex, X_ERROR,"Invalid AtomBIOS func %x\n",func);
- } else {
-
- if (func < FUNC_END)
- xf86DrvMsgVerb(scrnIndex, 5, X_WARNING,
- "AtomBIOS not available, cannot get %s\n",
- AtomBIOSQueryStr[func - ATOM_QUERY_FUNCS]);
- else
- xf86DrvMsg(scrnIndex, X_ERROR, "Invalid AtomBIOS query %x\n",func);
- }
- return ATOM_NOT_IMPLEMENTED;
-}
-
#endif /* ATOM_BIOS */
-
-
-AtomBiosResult
-RADEONAtomBIOSSetCrtcSource(atomBIOSHandlePtr atomBIOS, int crtc, int output_mask)
-{
- SELECT_CRTC_SOURCE_PARAMETERS crtc_data;
- AtomBIOSArg data;
- unsigned char *space;
-
- crtc_data.ucCRTC = crtc;
- crtc_data.ucDevice = ATOM_DEVICE_CRT1_SUPPORT;
-
- data.exec.index = GetIndexIntoMasterTable(COMMAND, EnableCRTC);
- data.exec.dataSpace = (void *)&space;
- data.exec.pspace = &crtc_data;
-
- if (RHDAtomBIOSFunc(atomBIOS->scrnIndex, atomBIOS, ATOMBIOS_EXEC, &data) == ATOM_SUCCESS) {
- ErrorF("Set CRTC source success\n");
- return ATOM_SUCCESS ;
- }
-
- ErrorF("Set CRTC source failed\n");
- return ATOM_NOT_IMPLEMENTED;
-}
-
-void
-atombios_get_command_table_version(atomBIOSHandlePtr atomBIOS, int index, int *major, int *minor)
-{
- ATOM_MASTER_COMMAND_TABLE *cmd_table = atomBIOS->BIOSBase + atomBIOS->cmd_offset;
- ATOM_MASTER_LIST_OF_COMMAND_TABLES *table_start;
- ATOM_COMMON_ROM_COMMAND_TABLE_HEADER *table_hdr;
-
- unsigned short *ptr;
- unsigned short offset;
-
- table_start = &cmd_table->ListOfCommandTables;
-
- offset = *(((unsigned short *)table_start) + index);
-
- table_hdr = atomBIOS->BIOSBase + offset;
-
- *major = table_hdr->CommonHeader.ucTableFormatRevision;
- *minor = table_hdr->CommonHeader.ucTableContentRevision;
-}
diff --git a/src/radeon_atombios.h b/src/radeon_atombios.h
index b9ce53a5..3cfa6733 100644
--- a/src/radeon_atombios.h
+++ b/src/radeon_atombios.h
@@ -29,13 +29,19 @@
#include "radeon.h"
-typedef enum {
+# ifdef ATOM_BIOS
+
+typedef enum _AtomBiosRequestID {
ATOMBIOS_INIT,
ATOMBIOS_TEARDOWN,
+# ifdef ATOM_BIOS_PARSER
ATOMBIOS_EXEC,
+#endif
ATOMBIOS_ALLOCATE_FB_SCRATCH,
- ATOM_QUERY_FUNCS = 0x1000,
- GET_DEFAULT_ENGINE_CLOCK = ATOM_QUERY_FUNCS,
+ ATOMBIOS_GET_CONNECTORS,
+ ATOMBIOS_GET_PANEL_MODE,
+ ATOMBIOS_GET_PANEL_EDID,
+ GET_DEFAULT_ENGINE_CLOCK,
GET_DEFAULT_MEMORY_CLOCK,
GET_MAX_PIXEL_CLOCK_PLL_OUTPUT,
GET_MIN_PIXEL_CLOCK_PLL_OUTPUT,
@@ -43,58 +49,67 @@ typedef enum {
GET_MIN_PIXEL_CLOCK_PLL_INPUT,
GET_MAX_PIXEL_CLK,
GET_REF_CLOCK,
- ATOM_VRAM_QUERIES,
- GET_FW_FB_START = ATOM_VRAM_QUERIES,
+ GET_FW_FB_START,
GET_FW_FB_SIZE,
- ATOM_TMDS_QUERIES,
- ATOM_TMDS_FREQUENCY = ATOM_TMDS_QUERIES,
+ ATOM_TMDS_FREQUENCY,
ATOM_TMDS_PLL_CHARGE_PUMP,
ATOM_TMDS_PLL_DUTY_CYCLE,
ATOM_TMDS_PLL_VCO_GAIN,
ATOM_TMDS_PLL_VOLTAGE_SWING,
+ ATOM_LVDS_SUPPORTED_REFRESH_RATE,
+ ATOM_LVDS_OFF_DELAY,
+ ATOM_LVDS_SEQ_DIG_ONTO_DE,
+ ATOM_LVDS_SEQ_DE_TO_BL,
+ ATOM_LVDS_DITHER,
+ ATOM_LVDS_DUALLINK,
+ ATOM_LVDS_24BIT,
+ ATOM_LVDS_GREYLVL,
+ ATOM_LVDS_FPDI,
+ ATOM_GPIO_QUERIES,
+ ATOM_GPIO_I2C_CLK_MASK,
+ ATOM_DAC1_BG_ADJ,
+ ATOM_DAC1_DAC_ADJ,
+ ATOM_DAC1_FORCE,
+ ATOM_DAC2_CRTC2_BG_ADJ,
+ ATOM_DAC2_CRTC2_DAC_ADJ,
+ ATOM_DAC2_CRTC2_FORCE,
+ ATOM_DAC2_CRTC2_MUX_REG_IND,
+ ATOM_DAC2_CRTC2_MUX_REG_INFO,
FUNC_END
-} AtomBiosFunc;
+} AtomBiosRequestID;
-typedef enum {
+typedef enum _AtomBiosResult {
ATOM_SUCCESS,
ATOM_FAILED,
ATOM_NOT_IMPLEMENTED
} AtomBiosResult;
-typedef struct {
+typedef struct AtomExec {
int index;
pointer pspace;
pointer *dataSpace;
-} AtomExec, *AtomExecPtr;
+} AtomExecRec, *AtomExecPtr;
-typedef struct {
+typedef struct AtomFb {
unsigned int start;
unsigned int size;
-} AtomFb, *AtomFbPtr;
+} AtomFbRec, *AtomFbPtr;
-typedef union
+typedef union AtomBiosArg
{
CARD32 val;
-
- pointer ptr;
- atomBIOSHandlePtr atomp;
- AtomExec exec;
- AtomFb fb;
-} AtomBIOSArg, *AtomBIOSArgPtr;
-
-
-extern void
-atombios_get_command_table_version(atomBIOSHandlePtr atomBIOS, int index, int *major, int *minor);
+ struct rhdConnectorInfo *connectorInfo;
+ unsigned char* EDIDBlock;
+ atomBiosHandlePtr atomhandle;
+ DisplayModePtr mode;
+ AtomExecRec exec;
+ AtomFbRec fb;
+} AtomBiosArgRec, *AtomBiosArgPtr;
extern AtomBiosResult
-RHDAtomBIOSFunc(int scrnIndex, atomBIOSHandlePtr handle, AtomBiosFunc func,
- AtomBIOSArgPtr data);
-
-/* only for testing */
-void rhdTestAtomBIOS(atomBIOSHandlePtr atomBIOS);
+RHDAtomBiosFunc(int scrnIndex, atomBiosHandlePtr handle,
+ AtomBiosRequestID id, AtomBiosArgPtr data);
-#ifdef ATOM_BIOS
-//# include "rhd_atomwrapper.h"
# include "xf86int10.h"
# ifdef ATOM_BIOS_PARSER
# define INT8 INT8
@@ -102,7 +117,7 @@ void rhdTestAtomBIOS(atomBIOSHandlePtr atomBIOS);
# define INT32 INT32
# include "CD_Common_Types.h"
# else
-# ifndef ULONG
+# ifndef ULONG
typedef unsigned int ULONG;
# define ULONG ULONG
# endif
@@ -110,14 +125,28 @@ typedef unsigned int ULONG;
typedef unsigned char UCHAR;
# define UCHAR UCHAR
# endif
-# ifndef USHORT
+# ifndef USHORT
typedef unsigned short USHORT;
# define USHORT USHORT
# endif
# endif
-#include "atombios.h"
+# include "atombios.h"
+# include "ObjectID.h"
+/*
+ * This works around a bug in atombios.h where
+ * ATOM_MAX_SUPPORTED_DEVICE_INFO is specified incorrectly.
+ */
+
+#define ATOM_MAX_SUPPORTED_DEVICE_INFO_HD (ATOM_DEVICE_RESERVEDF_INDEX+1)
+typedef struct _ATOM_SUPPORTED_DEVICES_INFO_HD
+{
+ ATOM_COMMON_TABLE_HEADER sHeader;
+ USHORT usDeviceSupport;
+ ATOM_CONNECTOR_INFO_I2C asConnInfo[ATOM_MAX_SUPPORTED_DEVICE_INFO_HD];
+ ATOM_CONNECTOR_INC_SRC_BITMAP asIntSrcInfo[ATOM_MAX_SUPPORTED_DEVICE_INFO_HD];
+} ATOM_SUPPORTED_DEVICES_INFO_HD;
typedef struct _atomDataTables
{
@@ -145,6 +174,7 @@ typedef struct _atomDataTables
ATOM_SUPPORTED_DEVICES_INFO *SupportedDevicesInfo;
ATOM_SUPPORTED_DEVICES_INFO_2 *SupportedDevicesInfo_2;
ATOM_SUPPORTED_DEVICES_INFO_2d1 *SupportedDevicesInfo_2d1;
+ ATOM_SUPPORTED_DEVICES_INFO_HD *SupportedDevicesInfo_HD;
} SupportedDevicesInfo;
ATOM_GPIO_I2C_INFO *GPIO_I2C_Info;
ATOM_VRAM_USAGE_BY_FIRMWARE *VRAM_UsageByFirmware;
@@ -184,19 +214,20 @@ typedef struct _atomDataTables
ATOM_POWER_SOURCE_INFO *PowerSourceInfo;
} atomDataTables, *atomDataTablesPtr;
-typedef struct _atomBIOSHandle {
+typedef struct _atomBiosHandle {
int scrnIndex;
unsigned char *BIOSBase;
atomDataTablesPtr atomDataPtr;
pointer *scratchBase;
CARD32 fbBase;
- int cmd_offset;
#if XSERVER_LIBPCIACCESS
struct pci_device *device;
#else
PCITAG PciTag;
#endif
-} atomBIOSHandle;
+ unsigned int BIOSImageSize;
+} atomBiosHandleRec;
+
+# endif
-#endif
#endif /* RHD_ATOMBIOS_H_ */
diff --git a/src/radeon_bios.c b/src/radeon_bios.c
index 52be98cc..061dc155 100644
--- a/src/radeon_bios.c
+++ b/src/radeon_bios.c
@@ -137,21 +137,20 @@ Bool RADEONGetBIOSInfo(ScrnInfoPtr pScrn, xf86Int10InfoPtr pInt10)
if (info->IsAtomBios) {
#if 1
- AtomBIOSArg atomBiosArg;
+ AtomBiosArgRec atomBiosArg;
- if (RHDAtomBIOSFunc(pScrn->scrnIndex, NULL, ATOMBIOS_INIT, &atomBiosArg) == ATOM_SUCCESS) {
+ if (RHDAtomBiosFunc(pScrn->scrnIndex, NULL, ATOMBIOS_INIT, &atomBiosArg) == ATOM_SUCCESS) {
info->atomBIOS = atomBiosArg.ptr;
}
atomBiosArg.fb.start = info->FbFreeStart;
atomBiosArg.fb.size = info->FbFreeSize;
- if (RHDAtomBIOSFunc(pScrn->scrnIndex, info->atomBIOS, ATOMBIOS_ALLOCATE_FB_SCRATCH,
+ if (RHDAtomBiosFunc(pScrn->scrnIndex, info->atomBIOS, ATOMBIOS_ALLOCATE_FB_SCRATCH,
&atomBiosArg) == ATOM_SUCCESS) {
info->FbFreeStart = atomBiosArg.fb.start;
info->FbFreeSize = atomBiosArg.fb.size;
}
- //rhdTestAtomBIOS(info->atomBIOS);
#endif
info->MasterDataStart = RADEON_BIOS16 (info->ROMHeaderStart + 32);
}
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-22 05:28:11 +0000