diff options
-rw-r--r-- | ChangeLog | 11 | ||||
-rw-r--r-- | src/radeon.h | 6 | ||||
-rw-r--r-- | src/radeon_chipset.h | 21 | ||||
-rw-r--r-- | src/radeon_driver.c | 18 | ||||
-rw-r--r-- | src/radeon_probe.c | 5 |
5 files changed, 46 insertions, 15 deletions
@@ -1,3 +1,14 @@ +2006-02-24 Roland Scheidegger <rscheidegger_lists@hispeed.ch> + * src/radeon.h: + * src/radeon_chipset.h: + * src/radeon_driver.c: + * src/radeon_probe.c: + Add pci ids known to exist (see #4284 for instance). There are still + entries which probably don't really exist (cancelled cards and such), + leave them as-is. Fix the name of some entries, mostly based on the + .inf file of the newest catalyst driver. Use own family id for rv410 + and rs400, though there is no different code (yet?). + 2006-02-17 Benjamin Herrenschmidt <benh@kernel.crashing.org> * src/radeon.h: diff --git a/src/radeon.h b/src/radeon.h index fb70444f..3c3ec63b 100644 --- a/src/radeon.h +++ b/src/radeon.h @@ -278,6 +278,8 @@ typedef enum { CHIP_FAMILY_RV350, CHIP_FAMILY_RV380, /* RV370/RV380/M22/M24 */ CHIP_FAMILY_R420, /* R420/R423/M18 */ + CHIP_FAMILY_RV410, /* RV410, M26 */ + CHIP_FAMILY_RS400, /* xpress 200, 200m (RS400/410/480) */ CHIP_FAMILY_LAST } RADEONChipFamily; @@ -294,7 +296,9 @@ typedef enum { (info->ChipFamily == CHIP_FAMILY_RV350) || \ (info->ChipFamily == CHIP_FAMILY_R350) || \ (info->ChipFamily == CHIP_FAMILY_RV380) || \ - (info->ChipFamily == CHIP_FAMILY_R420)) + (info->ChipFamily == CHIP_FAMILY_R420) || \ + (info->ChipFamily == CHIP_FAMILY_RV410) || \ + (info->ChipFamily == CHIP_FAMILY_RS400)) /* * Errata workarounds diff --git a/src/radeon_chipset.h b/src/radeon_chipset.h index e2dfcd78..0069196a 100644 --- a/src/radeon_chipset.h +++ b/src/radeon_chipset.h @@ -33,7 +33,7 @@ static SymTabRec RADEONChipsets[] = { { PCI_CHIP_RS300_5835, "ATI Radeon Mobility 9100 IGP (U3) 5835" }, { PCI_CHIP_RS350_7834, "ATI Radeon 9100 PRO IGP 7834" }, { PCI_CHIP_RS350_7835, "ATI Radeon Mobility 9200 IGP 7835" }, - { PCI_CHIP_RV280_5960, "ATI Radeon 9200PRO 5960 (AGP)" }, + { PCI_CHIP_RV280_5960, "ATI Radeon 9250 5960 (AGP)" }, { PCI_CHIP_RV280_5961, "ATI Radeon 9200 5961 (AGP)" }, { PCI_CHIP_RV280_5962, "ATI Radeon 9200 5962 (AGP)" }, { PCI_CHIP_RV280_5964, "ATI Radeon 9200SE 5964 (AGP)" }, @@ -46,7 +46,7 @@ static SymTabRec RADEONChipsets[] = { { PCI_CHIP_R300_AG, "ATI FireGL Z1 AG (AGP)" }, { PCI_CHIP_R300_ND, "ATI Radeon 9700 Pro ND (AGP)" }, { PCI_CHIP_R300_NE, "ATI Radeon 9700/9500Pro NE (AGP)" }, - { PCI_CHIP_R300_NF, "ATI Radeon 9700 NF (AGP)" }, + { PCI_CHIP_R300_NF, "ATI Radeon 9600TX NF (AGP)" }, { PCI_CHIP_R300_NG, "ATI FireGL X1 NG (AGP)" }, { PCI_CHIP_RV350_AP, "ATI Radeon 9600 AP (AGP)" }, { PCI_CHIP_RV350_AQ, "ATI Radeon 9600SE AQ (AGP)" }, @@ -72,12 +72,15 @@ static SymTabRec RADEONChipsets[] = { { PCI_CHIP_RV380_3E50, "ATI Radeon X600 (RV380) 3E50 (PCIE)" }, { PCI_CHIP_RV380_3E54, "ATI FireGL V3200 (RV380) 3E54 (PCIE)" }, { PCI_CHIP_RV380_3150, "ATI Radeon Mobility X600 (M24) 3150 (PCIE)" }, + { PCI_CHIP_RV380_3152, "ATI Radeon Mobility X300 (M24) 3152 (PCIE)" }, { PCI_CHIP_RV380_3154, "ATI FireGL M24 GL 3154 (PCIE)" }, { PCI_CHIP_RV370_5B60, "ATI Radeon X300 (RV370) 5B60 (PCIE)" }, { PCI_CHIP_RV370_5B62, "ATI Radeon X600 (RV370) 5B62 (PCIE)" }, + { PCI_CHIP_RV370_5B63, "ATI Radeon X550 (RV370) 5B63 (PCIE)" }, { PCI_CHIP_RV370_5B64, "ATI FireGL V3100 (RV370) 5B64 (PCIE)" }, - { PCI_CHIP_RV370_5B65, "ATI FireGL D1100 (RV370) 5B65 (PCIE)" }, - { PCI_CHIP_RV370_5460, "ATI Radeon Mobility M300 (M22) 5460 (PCIE)" }, + { PCI_CHIP_RV370_5B65, "ATI FireMV 2200 PCIE (RV370) 5B65 (PCIE)" }, + { PCI_CHIP_RV370_5460, "ATI Radeon Mobility X300 (M22) 5460 (PCIE)" }, + { PCI_CHIP_RV370_5462, "ATI Radeon Mobility X600 SE (M24C) 5462 (PCIE)" }, { PCI_CHIP_RV370_5464, "ATI FireGL M22 GL 5464 (PCIE)" }, { PCI_CHIP_RS400_5A41, "ATI Radeon XPRESS 200 5A41 (PCIE)" }, { PCI_CHIP_RS400_5A42, "ATI Radeon XPRESS 200M 5A42 (PCIE)" }, @@ -90,6 +93,7 @@ static SymTabRec RADEONChipsets[] = { { PCI_CHIP_RV410_5E48, "ATI FireGL V5000 (RV410) (PCIE)" }, { PCI_CHIP_RV410_564A, "ATI Mobility FireGL V5000 (M26) (PCIE)" }, { PCI_CHIP_RV410_564B, "ATI Mobility FireGL V5000 (M26) (PCIE)" }, + { PCI_CHIP_RV410_564F, "ATI Mobility Radeon X700 XL (M26) (PCIE)" }, { PCI_CHIP_RV410_5652, "ATI Mobility Radeon X700 (M26) (PCIE)" }, { PCI_CHIP_RV410_5653, "ATI Mobility Radeon X700 (M26) (PCIE)" }, { PCI_CHIP_RV410_5E4B, "ATI Radeon X700 PRO (RV410) (PCIE)" }, @@ -106,13 +110,14 @@ static SymTabRec RADEONChipsets[] = { { PCI_CHIP_R420_JN, "ATI Radeon Mobility 9800 (M18) JN (AGP)" }, { PCI_CHIP_R420_JP, "ATI Radeon X800XT (R420) JP (AGP)" }, { PCI_CHIP_R420_4A4F, "ATI Radeon X800 SE (R420) (AGP)" }, + { PCI_CHIP_R420_4A54, "ATI Radeon AIW X800 (R420) JT (AGP)" }, { PCI_CHIP_R423_UH, "ATI Radeon X800 (R423) UH (PCIE)" }, { PCI_CHIP_R423_UI, "ATI Radeon X800PRO (R423) UI (PCIE)" }, { PCI_CHIP_R423_UJ, "ATI Radeon X800LE (R423) UJ (PCIE)" }, { PCI_CHIP_R423_UK, "ATI Radeon X800SE (R423) UK (PCIE)" }, - { PCI_CHIP_R423_UQ, "ATI FireGL V7200 (R423) UQ (PCIE)" }, - { PCI_CHIP_R423_UR, "ATI FireGL V5100 (R423) UR (PCIE)" }, - { PCI_CHIP_R423_UT, "ATI FireGL V7100 (R423) UT (PCIE)" }, + { PCI_CHIP_R423_UQ, "ATI FireGL V5100 (R423) UQ (PCIE)" }, + { PCI_CHIP_R423_UR, "ATI FireGL unknown (R423) UR (PCIE)" }, + { PCI_CHIP_R423_UT, "ATI FireGL unknown (R423) UT (PCIE)" }, { PCI_CHIP_R423_5D57, "ATI Radeon X800XT (R423) 5D57 (PCIE)" }, { PCI_CHIP_R423_5550, "ATI FireGL V7100 (R423) (PCIE)" }, { PCI_CHIP_R430_5D49, "ATI Mobility FireGL V5100 (M28) (PCIE)" }, @@ -123,7 +128,7 @@ static SymTabRec RADEONChipsets[] = { { PCI_CHIP_R430_554E, "ATI Radeon X800 SE (R430) (PCIE)" }, { PCI_CHIP_R430_554C, "ATI Radeon X800 XTP (R430) (PCIE)" }, { PCI_CHIP_R480_5D4C, "ATI Radeon X850 5D4C (PCIE)" }, - { PCI_CHIP_R480_5D50, "ATI Radeon FireGL (R480) GL 5D50 (PCIE)" }, + { PCI_CHIP_R480_5D50, "ATI unknown Radeon / FireGL (R480) 5D50 (PCIE)" }, { PCI_CHIP_R480_5D4E, "ATI Radeon X850 SE (R480) (PCIE)" }, { PCI_CHIP_R480_5D4F, "ATI Radeon X850 PRO (R480) (PCIE)" }, { PCI_CHIP_R480_5D52, "ATI Radeon X850 XT (R480) (PCIE)" }, diff --git a/src/radeon_driver.c b/src/radeon_driver.c index d827c45b..1cbf3ac5 100644 --- a/src/radeon_driver.c +++ b/src/radeon_driver.c @@ -1,5 +1,5 @@ /* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c,v 1.117 2004/02/19 22:38:12 tsi Exp $ */ -/* $XdotOrg: driver/xf86-video-ati/src/radeon_driver.c,v 1.85 2006/01/19 14:20:37 daniels Exp $ */ +/* $XdotOrg: driver/xf86-video-ati/src/radeon_driver.c,v 1.86 2006/02/16 23:27:44 benh Exp $ */ /* * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and * VA Linux Systems Inc., Fremont, California. @@ -522,6 +522,8 @@ static const RADEONTMDSPll default_tmds_pll[CHIP_FAMILY_LAST][4] = {{15000, 0xb0155}, {0xffffffff, 0xb01cb}, {0, 0}, {0, 0}}, /*CHIP_FAMILY_RV350*/ {{15000, 0xb0155}, {0xffffffff, 0xb01cb}, {0, 0}, {0, 0}}, /*CHIP_FAMILY_RV380*/ {{0xffffffff, 0xb01cb}, {0, 0}, {0, 0}, {0, 0}}, /*CHIP_FAMILY_R420*/ + {{0xffffffff, 0xb01cb}, {0, 0}, {0, 0}, {0, 0}}, /*CHIP_FAMILY_RV410*/ /* FIXME: just values from r420 used... */ + {{15000, 0xb0155}, {0xffffffff, 0xb01cb}, {0, 0}, {0, 0}}, /*CHIP_FAMILY_RS400*/ /* FIXME: just values from rv380 used... */ }; #ifdef XFree86LOADER @@ -1701,7 +1703,7 @@ static void RADEONGetClockInfo(ScrnInfoPtr pScrn) "Video BIOS not detected, using default clock settings!\n"); /* Default min/max PLL values */ - if (info->ChipFamily == CHIP_FAMILY_R420) { + if (info->ChipFamily == CHIP_FAMILY_R420 || info->ChipFamily == CHIP_FAMILY_RV410) { pll->min_pll_freq = 20000; pll->max_pll_freq = 50000; } else { @@ -2589,6 +2591,7 @@ static Bool RADEONPreInitConfig(ScrnInfoPtr pScrn) break; case PCI_CHIP_RV380_3150: + case PCI_CHIP_RV380_3152: case PCI_CHIP_RV380_3154: info->IsMobility = TRUE; case PCI_CHIP_RV380_3E50: @@ -2597,10 +2600,12 @@ static Bool RADEONPreInitConfig(ScrnInfoPtr pScrn) break; case PCI_CHIP_RV370_5460: + case PCI_CHIP_RV370_5462: case PCI_CHIP_RV370_5464: info->IsMobility = TRUE; case PCI_CHIP_RV370_5B60: case PCI_CHIP_RV370_5B62: + case PCI_CHIP_RV370_5B63: case PCI_CHIP_RV370_5B64: case PCI_CHIP_RV370_5B65: info->ChipFamily = CHIP_FAMILY_RV380; @@ -2615,13 +2620,14 @@ static Bool RADEONPreInitConfig(ScrnInfoPtr pScrn) case PCI_CHIP_RC410_5A61: case PCI_CHIP_RS480_5954: case PCI_CHIP_RS482_5974: - info->ChipFamily = CHIP_FAMILY_RV380; /*CHIP_FAMILY_RS400*/ + info->ChipFamily = CHIP_FAMILY_RS400; info->IsIGP = TRUE; /*info->HasSingleDAC = TRUE;*/ /* ??? */ break; case PCI_CHIP_RV410_564A: case PCI_CHIP_RV410_564B: + case PCI_CHIP_RV410_564F: case PCI_CHIP_RV410_5652: case PCI_CHIP_RV410_5653: info->IsMobility = TRUE; @@ -2631,7 +2637,7 @@ static Bool RADEONPreInitConfig(ScrnInfoPtr pScrn) case PCI_CHIP_RV410_5E4D: case PCI_CHIP_RV410_5E4C: case PCI_CHIP_RV410_5E4F: - info->ChipFamily = CHIP_FAMILY_R420; /* CHIP_FAMILY_RV410*/ + info->ChipFamily = CHIP_FAMILY_RV410; break; case PCI_CHIP_R420_JN: @@ -7133,8 +7139,8 @@ static void RADEONInitDispBandwidth(ScrnInfoPtr pScrn) } - /* R420 family not supported yet */ - if (info->ChipFamily == CHIP_FAMILY_R420) return; + /* R420 and RV410 family not supported yet */ + if (info->ChipFamily == CHIP_FAMILY_R420 || info->ChipFamily == CHIP_FAMILY_RV410) return; if (pRADEONEnt->pSecondaryScrn) { if (info->IsSecondary) return; diff --git a/src/radeon_probe.c b/src/radeon_probe.c index aea4b737..5367acee 100644 --- a/src/radeon_probe.c +++ b/src/radeon_probe.c @@ -129,12 +129,15 @@ PciChipsets RADEONPciChipsets[] = { { PCI_CHIP_RV380_3E50, PCI_CHIP_RV380_3E50, RES_SHARED_VGA }, { PCI_CHIP_RV380_3E54, PCI_CHIP_RV380_3E54, RES_SHARED_VGA }, { PCI_CHIP_RV380_3150, PCI_CHIP_RV380_3150, RES_SHARED_VGA }, + { PCI_CHIP_RV380_3152, PCI_CHIP_RV380_3152, RES_SHARED_VGA }, { PCI_CHIP_RV380_3154, PCI_CHIP_RV380_3154, RES_SHARED_VGA }, { PCI_CHIP_RV370_5B60, PCI_CHIP_RV370_5B60, RES_SHARED_VGA }, { PCI_CHIP_RV370_5B62, PCI_CHIP_RV370_5B62, RES_SHARED_VGA }, + { PCI_CHIP_RV370_5B63, PCI_CHIP_RV370_5B63, RES_SHARED_VGA }, { PCI_CHIP_RV370_5B64, PCI_CHIP_RV370_5B64, RES_SHARED_VGA }, { PCI_CHIP_RV370_5B65, PCI_CHIP_RV370_5B65, RES_SHARED_VGA }, { PCI_CHIP_RV370_5460, PCI_CHIP_RV370_5460, RES_SHARED_VGA }, + { PCI_CHIP_RV370_5462, PCI_CHIP_RV370_5462, RES_SHARED_VGA }, { PCI_CHIP_RV370_5464, PCI_CHIP_RV370_5464, RES_SHARED_VGA }, { PCI_CHIP_RS400_5A41, PCI_CHIP_RS400_5A41, RES_SHARED_VGA }, { PCI_CHIP_RS400_5A42, PCI_CHIP_RS400_5A42, RES_SHARED_VGA }, @@ -147,6 +150,7 @@ PciChipsets RADEONPciChipsets[] = { { PCI_CHIP_RV410_5E48, PCI_CHIP_RV410_5E48, RES_SHARED_VGA }, { PCI_CHIP_RV410_564A, PCI_CHIP_RV410_564A, RES_SHARED_VGA }, { PCI_CHIP_RV410_564B, PCI_CHIP_RV410_564B, RES_SHARED_VGA }, + { PCI_CHIP_RV410_564F, PCI_CHIP_RV410_564F, RES_SHARED_VGA }, { PCI_CHIP_RV410_5652, PCI_CHIP_RV410_5652, RES_SHARED_VGA }, { PCI_CHIP_RV410_5653, PCI_CHIP_RV410_5653, RES_SHARED_VGA }, { PCI_CHIP_RV410_5E4B, PCI_CHIP_RV410_5E4B, RES_SHARED_VGA }, @@ -163,6 +167,7 @@ PciChipsets RADEONPciChipsets[] = { { PCI_CHIP_R420_JN, PCI_CHIP_R420_JN, RES_SHARED_VGA }, { PCI_CHIP_R420_JP, PCI_CHIP_R420_JP, RES_SHARED_VGA }, { PCI_CHIP_R420_4A4F, PCI_CHIP_R420_4A4F, RES_SHARED_VGA }, + { PCI_CHIP_R420_4A54, PCI_CHIP_R420_4A54, RES_SHARED_VGA }, { PCI_CHIP_R423_UH, PCI_CHIP_R423_UH, RES_SHARED_VGA }, { PCI_CHIP_R423_UI, PCI_CHIP_R423_UI, RES_SHARED_VGA }, { PCI_CHIP_R423_UJ, PCI_CHIP_R423_UJ, RES_SHARED_VGA }, |