diff options
| -rw-r--r-- | ChangeLog | 10 | ||||
| -rw-r--r-- | src/radeon_dri.c | 8 | ||||
| -rw-r--r-- | src/radeon_driver.c | 11 | ||||
| -rw-r--r-- | src/radeon_reg.h | 5 | ||||
| -rw-r--r-- | src/radeon_video.c | 8 |
5 files changed, 27 insertions, 15 deletions
@@ -1,3 +1,13 @@ +2006-03-18 Roland Scheidegger <rscheidegger_lists@hispeed.ch> + * src/radeon_dri.c: (RADEONDRIGetVersion): + * src/radeon_driver.c: (RADEONGetAccessibleVRAM): + * man/radeon_reg.h: + * src/radeon_video.c: + Fix various small cosmetic issues. Change a driver message, get the order + right for requesting drm versions, replace the use of some numbers with + the respective macro defines in radeon_video.c, and add some more macro + defines. None of that really matters. + 2006-03-17 Benjamin Herrenschmidt <benh@kernel.crashing.org> * src/radeon_driver.c: (RADEONGetAccessibleVRAM), diff --git a/src/radeon_dri.c b/src/radeon_dri.c index 868b735a..1b67e9d6 100644 --- a/src/radeon_dri.c +++ b/src/radeon_dri.c @@ -1288,12 +1288,12 @@ Bool RADEONDRIGetVersion(ScrnInfoPtr pScrn) } /* Now check if we qualify */ - if (info->IsIGP) { - req_minor = 10; - req_patch = 0; - } else if (info->ChipFamily >= CHIP_FAMILY_R300) { + if (info->ChipFamily >= CHIP_FAMILY_R300) { req_minor = 17; req_patch = 0; + } else if (info->IsIGP) { + req_minor = 10; + req_patch = 0; } else if (info->ChipFamily >= CHIP_FAMILY_R200) { req_minor = 5; req_patch = 0; diff --git a/src/radeon_driver.c b/src/radeon_driver.c index 34982893..ae40bb42 100644 --- a/src/radeon_driver.c +++ b/src/radeon_driver.c @@ -1,5 +1,5 @@ /* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c,v 1.117 2004/02/19 22:38:12 tsi Exp $ */ -/* $XdotOrg: driver/xf86-video-ati/src/radeon_driver.c,v 1.103 2006/03/16 04:32:22 benh Exp $ */ +/* $XdotOrg: driver/xf86-video-ati/src/radeon_driver.c,v 1.104 2006/03/16 21:53:58 benh Exp $ */ /* * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and * VA Linux Systems Inc., Fremont, California. @@ -2432,12 +2432,9 @@ static CARD32 RADEONGetAccessibleVRAM(ScrnInfoPtr pScrn) "[dri] limiting video memory to one aperture of %dK\n", aper_size); xf86DrvMsg(pScrn->scrnIndex, X_WARNING, - "[dri] use radeon.o kernel module version 1.23.0 for" - " full memory mapping.\n", - aper_size, - info->pKernelDRMVersion->version_major, - info->pKernelDRMVersion->version_minor, - info->pKernelDRMVersion->version_patchlevel); + "[dri] detected radeon kernel module version 1.%d but" + " 1.23 or newer is required for full memory mapping.\n", + info->pKernelDRMVersion->version_minor); info->newMemoryMap = FALSE; return aper_size; } diff --git a/src/radeon_reg.h b/src/radeon_reg.h index 71b10c02..48fccdf4 100644 --- a/src/radeon_reg.h +++ b/src/radeon_reg.h @@ -929,6 +929,10 @@ # define RADEON_EXCL_VERT_START_MASK 0x000003ff # define RADEON_EXCL_VERT_END_MASK 0x03ff0000 #define RADEON_OV0_FILTER_CNTL 0x04A0 +# define FILTER_PROGRAMMABLE_COEF 0x00000000 +# define FILTER_HARDCODED_COEF 0x0000000f +# define FILTER_COEF_MASK 0x0000000f + #define RADEON_OV0_FOUR_TAP_COEF_0 0x04B0 #define RADEON_OV0_FOUR_TAP_COEF_1 0x04B4 #define RADEON_OV0_FOUR_TAP_COEF_2 0x04B8 @@ -1023,7 +1027,6 @@ # define RADEON_SCALER_INT_EMU 0x20000000L # define RADEON_SCALER_ENABLE 0x40000000L # define RADEON_SCALER_SOFT_RESET 0x80000000L -# define RADEON_SCALER_ADAPTIVE_DEINT 0x00001000L #define RADEON_OV0_STEP_BY 0x0484 #define RADEON_OV0_TEST 0x04F8 #define RADEON_OV0_V_INC 0x0424 diff --git a/src/radeon_video.c b/src/radeon_video.c index 891defca..3f44e4b8 100644 --- a/src/radeon_video.c +++ b/src/radeon_video.c @@ -1115,9 +1115,11 @@ RADEONResetVideo(ScrnInfoPtr pScrn) sprintf(tmp, "INSTANCE:%d", pScrn->scrnIndex); pPriv->instance_id = MAKE_ATOM(tmp); - OUTREG(RADEON_OV0_SCALE_CNTL, 0x80000000); + OUTREG(RADEON_OV0_SCALE_CNTL, RADEON_SCALER_SOFT_RESET); OUTREG(RADEON_OV0_AUTO_FLIP_CNTL, 0); /* maybe */ OUTREG(RADEON_OV0_EXCLUSIVE_HORZ, 0); + /* FIXME: we are not actually using the tap coefficients we program (twice!)? */ + OUTREG(RADEON_OV0_FILTER_CNTL, FILTER_HARDCODED_COEF); OUTREG(RADEON_OV0_FILTER_CNTL, 0x0000000f); OUTREG(RADEON_OV0_KEY_CNTL, RADEON_GRAPHIC_KEY_FN_EQ | RADEON_VIDEO_KEY_FN_FALSE | @@ -2569,9 +2571,9 @@ RADEONDisplayVideo( left = (left >> 16) & 7; RADEONWaitForFifo(pScrn, 2); - OUTREG(RADEON_OV0_REG_LOAD_CNTL, 1); + OUTREG(RADEON_OV0_REG_LOAD_CNTL, RADEON_REG_LD_CTL_LOCK); if (info->accelOn) RADEON_SYNC(info, pScrn); - while(!(INREG(RADEON_OV0_REG_LOAD_CNTL) & (1 << 3))); + while(!(INREG(RADEON_OV0_REG_LOAD_CNTL) & RADEON_REG_LD_CTL_LOCK_READBACK)); dsr=(double)(1<<0xC)/h_inc; if(dsr<0.25)dsr=0.25; |