summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--src/radeon_driver.c16
-rw-r--r--src/radeon_mergedfb.c30
2 files changed, 34 insertions, 12 deletions
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index 1dd1d3ff..5ef7d15d 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -849,8 +849,6 @@ static int RADEONDiv(int n, int d)
return (n + (d / 2)) / d;
}
-
-
static Bool RADEONProbePLLParameters(ScrnInfoPtr pScrn)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
@@ -1109,9 +1107,9 @@ static void RADEONGetClockInfo(ScrnInfoPtr pScrn)
/* Avoid RN50 corruption due to memory bandwidth starvation.
* 18 is an empirical value based on the databook and Windows driver.
*
- * Empirical value changed to 24 to raise pixel clock limit and
- * allow higher resolution modes on capable monitors.
- */
+ * Empirical value changed to 24 to raise pixel clock limit and
+ * allow higher resolution modes on capable monitors
+ */
pll->max_pll_freq = min(pll->max_pll_freq,
24 * info->mclk * 100 / pScrn->bitsPerPixel *
info->RamWidth / 16);
@@ -1250,6 +1248,7 @@ static void RADEONInitMemoryMap(ScrnInfoPtr pScrn)
RADEONInfoPtr info = RADEONPTR(pScrn);
unsigned char *RADEONMMIO = info->MMIO;
unsigned long mem_size;
+ CARD32 aper_size;
/* Default to existing values */
info->mc_fb_location = INREG(RADEON_MC_FB_LOCATION);
@@ -1259,13 +1258,18 @@ static void RADEONInitMemoryMap(ScrnInfoPtr pScrn)
* but the real video RAM instead
*/
mem_size = INREG(RADEON_CONFIG_MEMSIZE);
+ aper_size = INREG(RADEON_CONFIG_APER_SIZE);
if (mem_size == 0)
mem_size = 0x800000;
+ /* Fix for RN50, M6, M7 with 8/16/32(??) MBs of VRAM -
+ Novell bug 204882 + along with lots of ubuntu ones */
+ if (aper_size > mem_size)
+ mem_size = aper_size;
+
#ifdef XF86DRI
/* Apply memory map limitation if using an old DRI */
if (info->directRenderingEnabled && !info->newMemoryMap) {
- CARD32 aper_size = INREG(RADEON_CONFIG_APER_SIZE);
if (aper_size < mem_size)
mem_size = aper_size;
}
diff --git a/src/radeon_mergedfb.c b/src/radeon_mergedfb.c
index 313dda24..7b01c82c 100644
--- a/src/radeon_mergedfb.c
+++ b/src/radeon_mergedfb.c
@@ -212,6 +212,12 @@ RADEONCopyModeNLink(ScrnInfoPtr pScrn, DisplayModePtr dest,
mode->VSyncEnd += dy;
mode->VTotal += dy;
+ /* This is needed for not generating negative refesh rates in xrandr with the
+ faked DotClock below
+ */
+ if (!(mode->VRefresh))
+ mode->VRefresh = mode->Clock * 1000.0 / mode->HTotal / mode->VTotal;
+
/* Provide a sophisticated fake DotClock in order to trick the vidmode
* extension to allow selecting among a number of modes whose merged result
* looks identical but consists of different modes for CRT1 and CRT2
@@ -531,15 +537,27 @@ RADEONGenerateModeList(ScrnInfoPtr pScrn, char* str,
if(str != NULL) {
return(RADEONGenerateModeListFromMetaModes(pScrn, str, i, j, srel));
} else {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "No MetaModes given, linking %s modes by default\n",
- (srel == radeonClone) ? "largest common" :
- (info->NonRect ?
+ if (srel == radeonClone ) {
+ DisplayModePtr p, q, result = NULL;
+
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Clone mode, list all common modes\n");
+ for (p = i; p->next != i; p = p->next)
+ for (q = j; q->next != j; q = q->next)
+ if ((p->HDisplay == q->HDisplay) &&
+ (p->VDisplay == q->VDisplay))
+ result = RADEONCopyModeNLink(pScrn, result, p, q, srel);
+ return result;
+ } else {
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "No MetaModes given, linking %s modes by default\n",
+ (info->NonRect ?
(((srel == radeonLeftOf) || (srel == radeonRightOf)) ? "widest" : "tallest")
:
(((srel == radeonLeftOf) || (srel == radeonRightOf)) ? "widest common" : "tallest common")) );
- return(RADEONGenerateModeListFromLargestModes(pScrn, i, j, srel));
- }
+ return(RADEONGenerateModeListFromLargestModes(pScrn, i, j, srel));
+ }
+ }
}
void