diff options
-rw-r--r-- | src/radeon_exa.c | 7 | ||||
-rw-r--r-- | src/radeon_exa_funcs.c | 64 | ||||
-rw-r--r-- | src/radeon_exa_render.c | 346 | ||||
-rw-r--r-- | src/radeon_textured_video.c | 2 | ||||
-rw-r--r-- | src/radeon_textured_videofuncs.c | 20 |
5 files changed, 215 insertions, 224 deletions
diff --git a/src/radeon_exa.c b/src/radeon_exa.c index 2cfecb33..2c36882c 100644 --- a/src/radeon_exa.c +++ b/src/radeon_exa.c @@ -532,20 +532,13 @@ Bool RADEONEXAPixmapIsOffscreen(PixmapPtr pPix) /***********************************************************************/ #define BEGIN_ACCEL(n) BEGIN_RING(2*(n)) -#define OUT_ACCEL_REG(reg, val) OUT_RING_REG(reg, val) -#define FINISH_ACCEL() ADVANCE_RING() #define OUT_RELOC(x, read, write) OUT_RING_RELOC(x, read, write) -#define OUT_RING_F(x) OUT_RING(F_TO_DW(x)) - #ifdef RENDER #include "radeon_exa_render.c" #endif #include "radeon_exa_funcs.c" #undef BEGIN_ACCEL -#undef OUT_ACCEL_REG -#undef FINISH_ACCEL -#undef OUT_RING_F diff --git a/src/radeon_exa_funcs.c b/src/radeon_exa_funcs.c index d1c7d1e1..759cac1a 100644 --- a/src/radeon_exa_funcs.c +++ b/src/radeon_exa_funcs.c @@ -70,23 +70,23 @@ static void Emit2DState(ScrnInfoPtr pScrn, int op) } else { BEGIN_ACCEL_RELOC(9, 1); } - OUT_ACCEL_REG(RADEON_DEFAULT_SC_BOTTOM_RIGHT, info->state_2d.default_sc_bottom_right); - OUT_ACCEL_REG(RADEON_DP_GUI_MASTER_CNTL, info->state_2d.dp_gui_master_cntl); - OUT_ACCEL_REG(RADEON_DP_BRUSH_FRGD_CLR, info->state_2d.dp_brush_frgd_clr); - OUT_ACCEL_REG(RADEON_DP_BRUSH_BKGD_CLR, info->state_2d.dp_brush_bkgd_clr); - OUT_ACCEL_REG(RADEON_DP_SRC_FRGD_CLR, info->state_2d.dp_src_frgd_clr); - OUT_ACCEL_REG(RADEON_DP_SRC_BKGD_CLR, info->state_2d.dp_src_bkgd_clr); - OUT_ACCEL_REG(RADEON_DP_WRITE_MASK, info->state_2d.dp_write_mask); - OUT_ACCEL_REG(RADEON_DP_CNTL, info->state_2d.dp_cntl); - - OUT_ACCEL_REG(RADEON_DST_PITCH_OFFSET, info->state_2d.dst_pitch_offset); + OUT_RING_REG(RADEON_DEFAULT_SC_BOTTOM_RIGHT, info->state_2d.default_sc_bottom_right); + OUT_RING_REG(RADEON_DP_GUI_MASTER_CNTL, info->state_2d.dp_gui_master_cntl); + OUT_RING_REG(RADEON_DP_BRUSH_FRGD_CLR, info->state_2d.dp_brush_frgd_clr); + OUT_RING_REG(RADEON_DP_BRUSH_BKGD_CLR, info->state_2d.dp_brush_bkgd_clr); + OUT_RING_REG(RADEON_DP_SRC_FRGD_CLR, info->state_2d.dp_src_frgd_clr); + OUT_RING_REG(RADEON_DP_SRC_BKGD_CLR, info->state_2d.dp_src_bkgd_clr); + OUT_RING_REG(RADEON_DP_WRITE_MASK, info->state_2d.dp_write_mask); + OUT_RING_REG(RADEON_DP_CNTL, info->state_2d.dp_cntl); + + OUT_RING_REG(RADEON_DST_PITCH_OFFSET, info->state_2d.dst_pitch_offset); OUT_RELOC(info->state_2d.dst_bo, 0, RADEON_GEM_DOMAIN_VRAM); if (has_src) { - OUT_ACCEL_REG(RADEON_SRC_PITCH_OFFSET, info->state_2d.src_pitch_offset); + OUT_RING_REG(RADEON_SRC_PITCH_OFFSET, info->state_2d.src_pitch_offset); OUT_RELOC(info->state_2d.src_bo, RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0); } - FINISH_ACCEL(); + ADVANCE_RING(); if (op) info->state_2d.op = op; @@ -101,10 +101,10 @@ RADEONFlush2D(PixmapPtr pPix) TRACE; BEGIN_ACCEL(2); - OUT_ACCEL_REG(RADEON_DSTCACHE_CTLSTAT, RADEON_RB2D_DC_FLUSH_ALL); - OUT_ACCEL_REG(RADEON_WAIT_UNTIL, + OUT_RING_REG(RADEON_DSTCACHE_CTLSTAT, RADEON_RB2D_DC_FLUSH_ALL); + OUT_RING_REG(RADEON_WAIT_UNTIL, RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_DMA_GUI_IDLE); - FINISH_ACCEL(); + ADVANCE_RING(); } static void @@ -192,9 +192,9 @@ RADEONSolid(PixmapPtr pPix, int x1, int y1, int x2, int y2) y1, y2); BEGIN_ACCEL(2); - OUT_ACCEL_REG(RADEON_DST_Y_X, (y1 << 16) | x1); - OUT_ACCEL_REG(RADEON_DST_HEIGHT_WIDTH, ((y2 - y1) << 16) | (x2 - x1)); - FINISH_ACCEL(); + OUT_RING_REG(RADEON_DST_Y_X, (y1 << 16) | x1); + OUT_RING_REG(RADEON_DST_HEIGHT_WIDTH, ((y2 - y1) << 16) | (x2 - x1)); + ADVANCE_RING(); } static void @@ -306,11 +306,11 @@ RADEONCopy(PixmapPtr pDst, BEGIN_ACCEL(3); - OUT_ACCEL_REG(RADEON_SRC_Y_X, (srcY << 16) | srcX); - OUT_ACCEL_REG(RADEON_DST_Y_X, (dstY << 16) | dstX); - OUT_ACCEL_REG(RADEON_DST_HEIGHT_WIDTH, (h << 16) | w); + OUT_RING_REG(RADEON_SRC_Y_X, (srcY << 16) | srcX); + OUT_RING_REG(RADEON_DST_Y_X, (dstY << 16) | dstX); + OUT_RING_REG(RADEON_DST_HEIGHT_WIDTH, (h << 16) | w); - FINISH_ACCEL(); + ADVANCE_RING(); } /* Emit blit with arbitrary source and destination offsets and pitches */ @@ -330,7 +330,7 @@ RADEONBlitChunk(ScrnInfoPtr pScrn, struct radeon_bo *src_bo, } else { BEGIN_ACCEL(6); } - OUT_ACCEL_REG(RADEON_DP_GUI_MASTER_CNTL, + OUT_RING_REG(RADEON_DP_GUI_MASTER_CNTL, RADEON_GMC_DST_PITCH_OFFSET_CNTL | RADEON_GMC_SRC_PITCH_OFFSET_CNTL | RADEON_GMC_BRUSH_NONE | @@ -340,23 +340,23 @@ RADEONBlitChunk(ScrnInfoPtr pScrn, struct radeon_bo *src_bo, RADEON_DP_SRC_SOURCE_MEMORY | RADEON_GMC_CLR_CMP_CNTL_DIS | RADEON_GMC_WR_MSK_DIS); - OUT_ACCEL_REG(RADEON_SRC_PITCH_OFFSET, src_pitch_offset); + OUT_RING_REG(RADEON_SRC_PITCH_OFFSET, src_pitch_offset); if (src_bo) { OUT_RELOC(src_bo, src_domain, 0); } - OUT_ACCEL_REG(RADEON_DST_PITCH_OFFSET, dst_pitch_offset); + OUT_RING_REG(RADEON_DST_PITCH_OFFSET, dst_pitch_offset); if (dst_bo) { OUT_RELOC(dst_bo, 0, dst_domain); } - OUT_ACCEL_REG(RADEON_SRC_Y_X, (srcY << 16) | srcX); - OUT_ACCEL_REG(RADEON_DST_Y_X, (dstY << 16) | dstX); - OUT_ACCEL_REG(RADEON_DST_HEIGHT_WIDTH, (h << 16) | w); - FINISH_ACCEL(); + OUT_RING_REG(RADEON_SRC_Y_X, (srcY << 16) | srcX); + OUT_RING_REG(RADEON_DST_Y_X, (dstY << 16) | dstX); + OUT_RING_REG(RADEON_DST_HEIGHT_WIDTH, (h << 16) | w); + ADVANCE_RING(); BEGIN_ACCEL(2); - OUT_ACCEL_REG(RADEON_DSTCACHE_CTLSTAT, RADEON_RB2D_DC_FLUSH_ALL); - OUT_ACCEL_REG(RADEON_WAIT_UNTIL, + OUT_RING_REG(RADEON_DSTCACHE_CTLSTAT, RADEON_RB2D_DC_FLUSH_ALL); + OUT_RING_REG(RADEON_WAIT_UNTIL, RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_DMA_GUI_IDLE); - FINISH_ACCEL(); + ADVANCE_RING(); } static Bool diff --git a/src/radeon_exa_render.c b/src/radeon_exa_render.c index fcc362c1..6d61a805 100644 --- a/src/radeon_exa_render.c +++ b/src/radeon_exa_render.c @@ -433,27 +433,27 @@ static Bool R100TextureSetup(PicturePtr pPict, PixmapPtr pPix, BEGIN_ACCEL_RELOC(5, 1); if (unit == 0) { - OUT_ACCEL_REG(RADEON_PP_TXFILTER_0, txfilter); - OUT_ACCEL_REG(RADEON_PP_TXFORMAT_0, txformat); - OUT_ACCEL_REG(RADEON_PP_TEX_SIZE_0, + OUT_RING_REG(RADEON_PP_TXFILTER_0, txfilter); + OUT_RING_REG(RADEON_PP_TXFORMAT_0, txformat); + OUT_RING_REG(RADEON_PP_TEX_SIZE_0, (pPix->drawable.width - 1) | ((pPix->drawable.height - 1) << RADEON_TEX_VSIZE_SHIFT)); - OUT_ACCEL_REG(RADEON_PP_TEX_PITCH_0, txpitch - 32); + OUT_RING_REG(RADEON_PP_TEX_PITCH_0, txpitch - 32); EMIT_READ_OFFSET(RADEON_PP_TXOFFSET_0, txoffset, pPix); /* emit a texture relocation */ } else { - OUT_ACCEL_REG(RADEON_PP_TXFILTER_1, txfilter); - OUT_ACCEL_REG(RADEON_PP_TXFORMAT_1, txformat); + OUT_RING_REG(RADEON_PP_TXFILTER_1, txfilter); + OUT_RING_REG(RADEON_PP_TXFORMAT_1, txformat); - OUT_ACCEL_REG(RADEON_PP_TEX_SIZE_1, + OUT_RING_REG(RADEON_PP_TEX_SIZE_1, (pPix->drawable.width - 1) | ((pPix->drawable.height - 1) << RADEON_TEX_VSIZE_SHIFT)); - OUT_ACCEL_REG(RADEON_PP_TEX_PITCH_1, txpitch - 32); + OUT_RING_REG(RADEON_PP_TEX_PITCH_1, txpitch - 32); EMIT_READ_OFFSET(RADEON_PP_TXOFFSET_1, txoffset, pPix); /* emit a texture relocation */ } - FINISH_ACCEL(); + ADVANCE_RING(); if (pPict->transform != 0) { info->accel_state->is_transform[unit] = TRUE; @@ -643,8 +643,8 @@ static Bool R100PrepareComposite(int op, } BEGIN_ACCEL_RELOC(10, 2); - OUT_ACCEL_REG(RADEON_PP_CNTL, pp_cntl); - OUT_ACCEL_REG(RADEON_RB3D_CNTL, dst_format | RADEON_ALPHA_BLEND_ENABLE); + OUT_RING_REG(RADEON_PP_CNTL, pp_cntl); + OUT_RING_REG(RADEON_RB3D_CNTL, dst_format | RADEON_ALPHA_BLEND_ENABLE); EMIT_WRITE_OFFSET(RADEON_RB3D_COLOROFFSET, 0, pDst); EMIT_COLORPITCH(RADEON_RB3D_COLORPITCH, colorpitch, pDst); @@ -681,24 +681,24 @@ static Bool R100PrepareComposite(int op, ablend |= RADEON_ALPHA_ARG_B_ZERO | RADEON_COMP_ARG_B; } - OUT_ACCEL_REG(RADEON_PP_TXCBLEND_0, cblend); - OUT_ACCEL_REG(RADEON_PP_TXABLEND_0, ablend); + OUT_RING_REG(RADEON_PP_TXCBLEND_0, cblend); + OUT_RING_REG(RADEON_PP_TXABLEND_0, ablend); if (pMask) - OUT_ACCEL_REG(RADEON_SE_VTX_FMT, (RADEON_SE_VTX_FMT_XY | + OUT_RING_REG(RADEON_SE_VTX_FMT, (RADEON_SE_VTX_FMT_XY | RADEON_SE_VTX_FMT_ST0 | RADEON_SE_VTX_FMT_ST1)); else - OUT_ACCEL_REG(RADEON_SE_VTX_FMT, (RADEON_SE_VTX_FMT_XY | + OUT_RING_REG(RADEON_SE_VTX_FMT, (RADEON_SE_VTX_FMT_XY | RADEON_SE_VTX_FMT_ST0)); /* Op operator. */ blendcntl = RADEONGetBlendCntl(op, pMaskPicture, pDstPicture->format); - OUT_ACCEL_REG(RADEON_RB3D_BLENDCNTL, blendcntl); + OUT_RING_REG(RADEON_RB3D_BLENDCNTL, blendcntl); - OUT_ACCEL_REG(RADEON_RE_TOP_LEFT, 0); - OUT_ACCEL_REG(RADEON_RE_WIDTH_HEIGHT, (((pDst->drawable.width) << RADEON_RE_WIDTH_SHIFT) | + OUT_RING_REG(RADEON_RE_TOP_LEFT, 0); + OUT_RING_REG(RADEON_RE_WIDTH_HEIGHT, (((pDst->drawable.width) << RADEON_RE_WIDTH_SHIFT) | ((pDst->drawable.height) << RADEON_RE_HEIGHT_SHIFT))); - FINISH_ACCEL(); + ADVANCE_RING(); return TRUE; } @@ -833,24 +833,24 @@ static Bool R200TextureSetup(PicturePtr pPict, PixmapPtr pPix, BEGIN_ACCEL_RELOC(6, 1); if (unit == 0) { - OUT_ACCEL_REG(R200_PP_TXFILTER_0, txfilter); - OUT_ACCEL_REG(R200_PP_TXFORMAT_0, txformat); - OUT_ACCEL_REG(R200_PP_TXFORMAT_X_0, 0); - OUT_ACCEL_REG(R200_PP_TXSIZE_0, (pPix->drawable.width - 1) | + OUT_RING_REG(R200_PP_TXFILTER_0, txfilter); + OUT_RING_REG(R200_PP_TXFORMAT_0, txformat); + OUT_RING_REG(R200_PP_TXFORMAT_X_0, 0); + OUT_RING_REG(R200_PP_TXSIZE_0, (pPix->drawable.width - 1) | ((pPix->drawable.height - 1) << RADEON_TEX_VSIZE_SHIFT)); - OUT_ACCEL_REG(R200_PP_TXPITCH_0, txpitch - 32); + OUT_RING_REG(R200_PP_TXPITCH_0, txpitch - 32); EMIT_READ_OFFSET(R200_PP_TXOFFSET_0, txoffset, pPix); } else { - OUT_ACCEL_REG(R200_PP_TXFILTER_1, txfilter); - OUT_ACCEL_REG(R200_PP_TXFORMAT_1, txformat); - OUT_ACCEL_REG(R200_PP_TXFORMAT_X_1, 0); - OUT_ACCEL_REG(R200_PP_TXSIZE_1, (pPix->drawable.width - 1) | + OUT_RING_REG(R200_PP_TXFILTER_1, txfilter); + OUT_RING_REG(R200_PP_TXFORMAT_1, txformat); + OUT_RING_REG(R200_PP_TXFORMAT_X_1, 0); + OUT_RING_REG(R200_PP_TXSIZE_1, (pPix->drawable.width - 1) | ((pPix->drawable.height - 1) << RADEON_TEX_VSIZE_SHIFT)); - OUT_ACCEL_REG(R200_PP_TXPITCH_1, txpitch - 32); + OUT_RING_REG(R200_PP_TXPITCH_1, txpitch - 32); EMIT_READ_OFFSET(R200_PP_TXOFFSET_1, txoffset, pPix); /* emit a texture relocation */ } - FINISH_ACCEL(); + ADVANCE_RING(); if (pPict->transform != 0) { info->accel_state->is_transform[unit] = TRUE; @@ -1006,19 +1006,19 @@ static Bool R200PrepareComposite(int op, PicturePtr pSrcPicture, BEGIN_ACCEL_RELOC(12, 2); - OUT_ACCEL_REG(RADEON_PP_CNTL, pp_cntl); - OUT_ACCEL_REG(RADEON_RB3D_CNTL, dst_format | RADEON_ALPHA_BLEND_ENABLE); + OUT_RING_REG(RADEON_PP_CNTL, pp_cntl); + OUT_RING_REG(RADEON_RB3D_CNTL, dst_format | RADEON_ALPHA_BLEND_ENABLE); EMIT_WRITE_OFFSET(RADEON_RB3D_COLOROFFSET, 0, pDst); EMIT_COLORPITCH(RADEON_RB3D_COLORPITCH, colorpitch, pDst); - OUT_ACCEL_REG(R200_SE_VTX_FMT_0, R200_VTX_XY); + OUT_RING_REG(R200_SE_VTX_FMT_0, R200_VTX_XY); if (pMask) - OUT_ACCEL_REG(R200_SE_VTX_FMT_1, + OUT_RING_REG(R200_SE_VTX_FMT_1, (2 << R200_VTX_TEX0_COMP_CNT_SHIFT) | (2 << R200_VTX_TEX1_COMP_CNT_SHIFT)); else - OUT_ACCEL_REG(R200_SE_VTX_FMT_1, + OUT_RING_REG(R200_SE_VTX_FMT_1, (2 << R200_VTX_TEX0_COMP_CNT_SHIFT)); @@ -1056,21 +1056,21 @@ static Bool R200PrepareComposite(int op, PicturePtr pSrcPicture, ablend |= R200_TXA_ARG_B_ZERO | R200_TXA_COMP_ARG_B; } - OUT_ACCEL_REG(R200_PP_TXCBLEND_0, cblend); - OUT_ACCEL_REG(R200_PP_TXCBLEND2_0, + OUT_RING_REG(R200_PP_TXCBLEND_0, cblend); + OUT_RING_REG(R200_PP_TXCBLEND2_0, R200_TXC_CLAMP_0_1 | R200_TXC_OUTPUT_REG_R0); - OUT_ACCEL_REG(R200_PP_TXABLEND_0, ablend); - OUT_ACCEL_REG(R200_PP_TXABLEND2_0, + OUT_RING_REG(R200_PP_TXABLEND_0, ablend); + OUT_RING_REG(R200_PP_TXABLEND2_0, R200_TXA_CLAMP_0_1 | R200_TXA_OUTPUT_REG_R0); /* Op operator. */ blendcntl = RADEONGetBlendCntl(op, pMaskPicture, pDstPicture->format); - OUT_ACCEL_REG(RADEON_RB3D_BLENDCNTL, blendcntl); + OUT_RING_REG(RADEON_RB3D_BLENDCNTL, blendcntl); - OUT_ACCEL_REG(RADEON_RE_WIDTH_HEIGHT, (((pDst->drawable.width) << RADEON_RE_WIDTH_SHIFT) | + OUT_RING_REG(RADEON_RE_WIDTH_HEIGHT, (((pDst->drawable.width) << RADEON_RE_WIDTH_SHIFT) | ((pDst->drawable.height) << RADEON_RE_HEIGHT_SHIFT))); - FINISH_ACCEL(); + ADVANCE_RING(); return TRUE; } @@ -1256,19 +1256,19 @@ static Bool R300TextureSetup(PicturePtr pPict, PixmapPtr pPix, if (repeatType == RepeatNone) out_size++; BEGIN_ACCEL_RELOC(out_size, 1); - OUT_ACCEL_REG(R300_TX_FILTER0_0 + (unit * 4), txfilter); - OUT_ACCEL_REG(R300_TX_FILTER1_0 + (unit * 4), 0); - OUT_ACCEL_REG(R300_TX_FORMAT0_0 + (unit * 4), txformat0); - OUT_ACCEL_REG(R300_TX_FORMAT1_0 + (unit * 4), txformat1); - OUT_ACCEL_REG(R300_TX_FORMAT2_0 + (unit * 4), txpitch); + OUT_RING_REG(R300_TX_FILTER0_0 + (unit * 4), txfilter); + OUT_RING_REG(R300_TX_FILTER1_0 + (unit * 4), 0); + OUT_RING_REG(R300_TX_FORMAT0_0 + (unit * 4), txformat0); + OUT_RING_REG(R300_TX_FORMAT1_0 + (unit * 4), txformat1); + OUT_RING_REG(R300_TX_FORMAT2_0 + (unit * 4), txpitch); EMIT_READ_OFFSET((R300_TX_OFFSET_0 + (unit * 4)), txoffset, pPix); if (repeatType == RepeatNone) - OUT_ACCEL_REG(R300_TX_BORDER_COLOR_0 + (unit * 4), 0); + OUT_RING_REG(R300_TX_BORDER_COLOR_0 + (unit * 4), 0); if (info->ChipFamily == CHIP_FAMILY_R520) - OUT_ACCEL_REG(R500_US_FORMAT0_0 + (unit * 4), us_format); - FINISH_ACCEL(); + OUT_RING_REG(R500_US_FORMAT0_0 + (unit * 4), us_format); + ADVANCE_RING(); if (pPict->transform != 0) { info->accel_state->is_transform[unit] = TRUE; @@ -1280,21 +1280,21 @@ static Bool R300TextureSetup(PicturePtr pPict, PixmapPtr pPix, info->accel_state->texH[unit] = 1; BEGIN_ACCEL(9); if (IS_R300_3D) - OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_INDX_REG, R300_PVS_VECTOR_CONST_INDEX(unit * 2)); + OUT_RING_REG(R300_VAP_PVS_VECTOR_INDX_REG, R300_PVS_VECTOR_CONST_INDEX(unit * 2)); else - OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_INDX_REG, R500_PVS_VECTOR_CONST_INDEX(unit * 2)); + OUT_RING_REG(R300_VAP_PVS_VECTOR_INDX_REG, R500_PVS_VECTOR_CONST_INDEX(unit * 2)); - OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(xFixedToFloat(pPict->transform->matrix[0][0]))); - OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(xFixedToFloat(pPict->transform->matrix[0][1]))); - OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(xFixedToFloat(pPict->transform->matrix[0][2]))); - OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(1.0/w)); + OUT_RING_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(xFixedToFloat(pPict->transform->matrix[0][0]))); + OUT_RING_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(xFixedToFloat(pPict->transform->matrix[0][1]))); + OUT_RING_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(xFixedToFloat(pPict->transform->matrix[0][2]))); + OUT_RING_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(1.0/w)); - OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(xFixedToFloat(pPict->transform->matrix[1][0]))); - OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(xFixedToFloat(pPict->transform->matrix[1][1]))); - OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(xFixedToFloat(pPict->transform->matrix[1][2]))); - OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(1.0/h)); + OUT_RING_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(xFixedToFloat(pPict->transform->matrix[1][0]))); + OUT_RING_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(xFixedToFloat(pPict->transform->matrix[1][1]))); + OUT_RING_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(xFixedToFloat(pPict->transform->matrix[1][2]))); + OUT_RING_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(1.0/h)); - FINISH_ACCEL(); + ADVANCE_RING(); } else { info->accel_state->texW[unit] = w; info->accel_state->texH[unit] = h; @@ -1309,21 +1309,21 @@ static Bool R300TextureSetup(PicturePtr pPict, PixmapPtr pPix, BEGIN_ACCEL(9); if (IS_R300_3D) - OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_INDX_REG, R300_PVS_VECTOR_CONST_INDEX(unit * 2)); + OUT_RING_REG(R300_VAP_PVS_VECTOR_INDX_REG, R300_PVS_VECTOR_CONST_INDEX(unit * 2)); else - OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_INDX_REG, R500_PVS_VECTOR_CONST_INDEX(unit * 2)); + OUT_RING_REG(R300_VAP_PVS_VECTOR_INDX_REG, R500_PVS_VECTOR_CONST_INDEX(unit * 2)); - OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(1.0)); - OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(0.0)); - OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(0.0)); - OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(1.0/w)); + OUT_RING_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(1.0)); + OUT_RING_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(0.0)); + OUT_RING_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(0.0)); + OUT_RING_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(1.0/w)); - OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(0.0)); - OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(1.0)); - OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(0.0)); - OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(1.0/h)); + OUT_RING_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(0.0)); + OUT_RING_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(1.0)); + OUT_RING_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(0.0)); + OUT_RING_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(1.0/h)); - FINISH_ACCEL(); + ADVANCE_RING(); } else { info->accel_state->texW[unit] = w; info->accel_state->texH[unit] = h; @@ -1502,7 +1502,7 @@ static Bool R300PrepareComposite(int op, PicturePtr pSrcPicture, BEGIN_ACCEL(10); else BEGIN_ACCEL(9); - OUT_ACCEL_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0); + OUT_RING_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0); } else { if (pMask) BEGIN_ACCEL(6); @@ -1524,7 +1524,7 @@ static Bool R300PrepareComposite(int op, PicturePtr pSrcPicture, * Fog */ if (pMask) { - OUT_ACCEL_REG(R300_VAP_PROG_STREAM_CNTL_0, + OUT_RING_REG(R300_VAP_PROG_STREAM_CNTL_0, ((R300_DATA_TYPE_FLOAT_2 << R300_DATA_TYPE_0_SHIFT) | (0 << R300_SKIP_DWORDS_0_SHIFT) | (0 << R300_DST_VEC_LOC_0_SHIFT) | @@ -1533,14 +1533,14 @@ static Bool R300PrepareComposite(int op, PicturePtr pSrcPicture, (0 << R300_SKIP_DWORDS_1_SHIFT) | (6 << R300_DST_VEC_LOC_1_SHIFT) | R300_SIGNED_1)); - OUT_ACCEL_REG(R300_VAP_PROG_STREAM_CNTL_1, + OUT_RING_REG(R300_VAP_PROG_STREAM_CNTL_1, ((R300_DATA_TYPE_FLOAT_2 << R300_DATA_TYPE_2_SHIFT) | (0 << R300_SKIP_DWORDS_2_SHIFT) | (7 << R300_DST_VEC_LOC_2_SHIFT) | R300_LAST_VEC_2 | R300_SIGNED_2)); } else - OUT_ACCEL_REG(R300_VAP_PROG_STREAM_CNTL_0, + OUT_RING_REG(R300_VAP_PROG_STREAM_CNTL_0, ((R300_DATA_TYPE_FLOAT_2 << R300_DATA_TYPE_0_SHIFT) | (0 << R300_SKIP_DWORDS_0_SHIFT) | (0 << R300_DST_VEC_LOC_0_SHIFT) | @@ -1561,40 +1561,40 @@ static Bool R300PrepareComposite(int op, PicturePtr pSrcPicture, if (info->accel_state->has_tcl) { if (pMask) { /* consts used by vertex shaders */ - OUT_ACCEL_REG(R300_VAP_PVS_CONST_CNTL, (R300_PVS_CONST_BASE_OFFSET(0) | + OUT_RING_REG(R300_VAP_PVS_CONST_CNTL, (R300_PVS_CONST_BASE_OFFSET(0) | R300_PVS_MAX_CONST_ADDR(3))); - OUT_ACCEL_REG(R300_VAP_PVS_CODE_CNTL_0, + OUT_RING_REG(R300_VAP_PVS_CODE_CNTL_0, ((0 << R300_PVS_FIRST_INST_SHIFT) | (8 << R300_PVS_XYZW_VALID_INST_SHIFT) | (8 << R300_PVS_LAST_INST_SHIFT))); - OUT_ACCEL_REG(R300_VAP_PVS_CODE_CNTL_1, + OUT_RING_REG(R300_VAP_PVS_CODE_CNTL_1, (8 << R300_PVS_LAST_VTX_SRC_INST_SHIFT)); } else { /* consts used by vertex shaders */ - OUT_ACCEL_REG(R300_VAP_PVS_CONST_CNTL, (R300_PVS_CONST_BASE_OFFSET(0) | + OUT_RING_REG(R300_VAP_PVS_CONST_CNTL, (R300_PVS_CONST_BASE_OFFSET(0) | R300_PVS_MAX_CONST_ADDR(3))); - OUT_ACCEL_REG(R300_VAP_PVS_CODE_CNTL_0, + OUT_RING_REG(R300_VAP_PVS_CODE_CNTL_0, ((0 << R300_PVS_FIRST_INST_SHIFT) | (4 << R300_PVS_XYZW_VALID_INST_SHIFT) | (4 << R300_PVS_LAST_INST_SHIFT))); - OUT_ACCEL_REG(R300_VAP_PVS_CODE_CNTL_1, + OUT_RING_REG(R300_VAP_PVS_CODE_CNTL_1, (4 << R300_PVS_LAST_VTX_SRC_INST_SHIFT)); } } /* Position and one or two sets of 2 texture coordinates */ - OUT_ACCEL_REG(R300_VAP_OUT_VTX_FMT_0, R300_VTX_POS_PRESENT); + OUT_RING_REG(R300_VAP_OUT_VTX_FMT_0, R300_VTX_POS_PRESENT); if (pMask) - OUT_ACCEL_REG(R300_VAP_OUT_VTX_FMT_1, + OUT_RING_REG(R300_VAP_OUT_VTX_FMT_1, ((2 << R300_TEX_0_COMP_CNT_SHIFT) | (2 << R300_TEX_1_COMP_CNT_SHIFT))); else - OUT_ACCEL_REG(R300_VAP_OUT_VTX_FMT_1, + OUT_RING_REG(R300_VAP_OUT_VTX_FMT_1, (2 << R300_TEX_0_COMP_CNT_SHIFT)); - OUT_ACCEL_REG(R300_TX_INVALTAGS, 0x0); - OUT_ACCEL_REG(R300_TX_ENABLE, txenable); - FINISH_ACCEL(); + OUT_RING_REG(R300_TX_INVALTAGS, 0x0); + OUT_RING_REG(R300_TX_ENABLE, txenable); + ADVANCE_RING(); /* shader output swizzling */ switch (pDstPicture->format) { @@ -1672,19 +1672,19 @@ static Bool R300PrepareComposite(int op, PicturePtr pSrcPicture, if (pMask) { BEGIN_ACCEL(16); /* 4 components: 2 for tex0, 2 for tex1 */ - OUT_ACCEL_REG(R300_RS_COUNT, + OUT_RING_REG(R300_RS_COUNT, ((4 << R300_RS_COUNT_IT_COUNT_SHIFT) | R300_RS_COUNT_HIRES_EN)); /* R300_INST_COUNT_RS - highest RS instruction used */ - OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(1)); + OUT_RING_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(1)); - OUT_ACCEL_REG(R300_US_CODE_OFFSET, (R300_ALU_CODE_OFFSET(0) | + OUT_RING_REG(R300_US_CODE_OFFSET, (R300_ALU_CODE_OFFSET(0) | R300_ALU_CODE_SIZE(0) | R300_TEX_CODE_OFFSET(0) | R300_TEX_CODE_SIZE(1))); - OUT_ACCEL_REG(R300_US_CODE_ADDR_3, + OUT_RING_REG(R300_US_CODE_ADDR_3, (R300_ALU_START(0) | R300_ALU_SIZE(0) | R300_TEX_START(0) | @@ -1695,18 +1695,18 @@ static Bool R300PrepareComposite(int op, PicturePtr pSrcPicture, } else { BEGIN_ACCEL(15); /* 2 components: 2 for tex0 */ - OUT_ACCEL_REG(R300_RS_COUNT, + OUT_RING_REG(R300_RS_COUNT, ((2 << R300_RS_COUNT_IT_COUNT_SHIFT) | R300_RS_COUNT_HIRES_EN)); - OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(0)); + OUT_RING_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(0)); - OUT_ACCEL_REG(R300_US_CODE_OFFSET, (R300_ALU_CODE_OFFSET(0) | + OUT_RING_REG(R300_US_CODE_OFFSET, (R300_ALU_CODE_OFFSET(0) | R300_ALU_CODE_SIZE(0) | R300_TEX_CODE_OFFSET(0) | R300_TEX_CODE_SIZE(0))); - OUT_ACCEL_REG(R300_US_CODE_ADDR_3, + OUT_RING_REG(R300_US_CODE_ADDR_3, (R300_ALU_START(0) | R300_ALU_SIZE(0) | R300_TEX_START(0) | @@ -1715,29 +1715,29 @@ static Bool R300PrepareComposite(int op, PicturePtr pSrcPicture, } - OUT_ACCEL_REG(R300_US_CONFIG, (0 << R300_NLEVEL_SHIFT) | R300_FIRST_TEX); - OUT_ACCEL_REG(R300_US_CODE_ADDR_0, + OUT_RING_REG(R300_US_CONFIG, (0 << R300_NLEVEL_SHIFT) | R300_FIRST_TEX); + OUT_RING_REG(R300_US_CODE_ADDR_0, (R300_ALU_START(0) | R300_ALU_SIZE(0) | R300_TEX_START(0) | R300_TEX_SIZE(0))); - OUT_ACCEL_REG(R300_US_CODE_ADDR_1, + OUT_RING_REG(R300_US_CODE_ADDR_1, (R300_ALU_START(0) | R300_ALU_SIZE(0) | R300_TEX_START(0) | R300_TEX_SIZE(0))); - OUT_ACCEL_REG(R300_US_CODE_ADDR_2, + OUT_RING_REG(R300_US_CODE_ADDR_2, (R300_ALU_START(0) | R300_ALU_SIZE(0) | R300_TEX_START(0) | R300_TEX_SIZE(0))); - OUT_ACCEL_REG(R300_US_PIXSIZE, 1); /* highest temp used */ + OUT_RING_REG(R300_US_PIXSIZE, 1); /* highest temp used */ /* shader output swizzling */ - OUT_ACCEL_REG(R300_US_OUT_FMT_0, output_fmt); + OUT_RING_REG(R300_US_OUT_FMT_0, output_fmt); /* tex inst for src texture */ - OUT_ACCEL_REG(R300_US_TEX_INST(0), + OUT_RING_REG(R300_US_TEX_INST(0), (R300_TEX_SRC_ADDR(0) | R300_TEX_DST_ADDR(0) | R300_TEX_ID(0) | @@ -1745,7 +1745,7 @@ static Bool R300PrepareComposite(int op, PicturePtr pSrcPicture, if (pMask) { /* tex inst for mask texture */ - OUT_ACCEL_REG(R300_US_TEX_INST(1), + OUT_RING_REG(R300_US_TEX_INST(1), (R300_TEX_SRC_ADDR(1) | R300_TEX_DST_ADDR(1) | R300_TEX_ID(1) | @@ -1759,7 +1759,7 @@ static Bool R300PrepareComposite(int op, PicturePtr pSrcPicture, * R300_ALU_RGB_OMASK - output components to write * R300_ALU_RGB_TARGET_A - render target */ - OUT_ACCEL_REG(R300_US_ALU_RGB_ADDR(0), + OUT_RING_REG(R300_US_ALU_RGB_ADDR(0), (R300_ALU_RGB_ADDR0(0) | R300_ALU_RGB_ADDR1(1) | R300_ALU_RGB_ADDR2(0) | @@ -1771,7 +1771,7 @@ static Bool R300PrepareComposite(int op, PicturePtr pSrcPicture, /* RGB inst * ALU operation */ - OUT_ACCEL_REG(R300_US_ALU_RGB_INST(0), + OUT_RING_REG(R300_US_ALU_RGB_INST(0), (R300_ALU_RGB_SEL_A(src_color) | R300_ALU_RGB_MOD_A(R300_ALU_RGB_MOD_NOP) | R300_ALU_RGB_SEL_B(mask_color) | @@ -1788,7 +1788,7 @@ static Bool R300PrepareComposite(int op, PicturePtr pSrcPicture, * R300_ALU_ALPHA_OMASK - output components to write * R300_ALU_ALPHA_TARGET_A - render target */ - OUT_ACCEL_REG(R300_US_ALU_ALPHA_ADDR(0), + OUT_RING_REG(R300_US_ALU_ALPHA_ADDR(0), (R300_ALU_ALPHA_ADDR0(0) | R300_ALU_ALPHA_ADDR1(1) | R300_ALU_ALPHA_ADDR2(0) | @@ -1799,7 +1799,7 @@ static Bool R300PrepareComposite(int op, PicturePtr pSrcPicture, /* Alpha inst * ALU operation */ - OUT_ACCEL_REG(R300_US_ALU_ALPHA_INST(0), + OUT_RING_REG(R300_US_ALU_ALPHA_INST(0), (R300_ALU_ALPHA_SEL_A(src_alpha) | R300_ALU_ALPHA_MOD_A(R300_ALU_ALPHA_MOD_NOP) | R300_ALU_ALPHA_SEL_B(mask_alpha) | @@ -1809,7 +1809,7 @@ static Bool R300PrepareComposite(int op, PicturePtr pSrcPicture, R300_ALU_ALPHA_OP(R300_ALU_ALPHA_OP_MAD) | R300_ALU_ALPHA_OMOD(R300_ALU_ALPHA_OMOD_NONE) | R300_ALU_ALPHA_CLAMP)); - FINISH_ACCEL(); + ADVANCE_RING(); } else { if (PICT_FORMAT_RGB(pSrcPicture->format) == 0) src_color = (R500_ALU_RGB_R_SWIZ_A_0 | @@ -1868,41 +1868,41 @@ static Bool R300PrepareComposite(int op, PicturePtr pSrcPicture, BEGIN_ACCEL(7); if (pMask) { /* 4 components: 2 for tex0, 2 for tex1 */ - OUT_ACCEL_REG(R300_RS_COUNT, + OUT_RING_REG(R300_RS_COUNT, ((4 << R300_RS_COUNT_IT_COUNT_SHIFT) | R300_RS_COUNT_HIRES_EN)); /* 2 RS instructions: 1 for tex0 (src), 1 for tex1 (mask) */ - OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(1)); + OUT_RING_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(1)); - OUT_ACCEL_REG(R500_US_CODE_ADDR, (R500_US_CODE_START_ADDR(0) | + OUT_RING_REG(R500_US_CODE_ADDR, (R500_US_CODE_START_ADDR(0) | R500_US_CODE_END_ADDR(2))); - OUT_ACCEL_REG(R500_US_CODE_RANGE, (R500_US_CODE_RANGE_ADDR(0) | + OUT_RING_REG(R500_US_CODE_RANGE, (R500_US_CODE_RANGE_ADDR(0) | R500_US_CODE_RANGE_SIZE(2))); - OUT_ACCEL_REG(R500_US_CODE_OFFSET, 0); + OUT_RING_REG(R500_US_CODE_OFFSET, 0); } else { - OUT_ACCEL_REG(R300_RS_COUNT, + OUT_RING_REG(R300_RS_COUNT, ((2 << R300_RS_COUNT_IT_COUNT_SHIFT) | R300_RS_COUNT_HIRES_EN)); - OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(0)); + OUT_RING_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(0)); - OUT_ACCEL_REG(R500_US_CODE_ADDR, (R500_US_CODE_START_ADDR(0) | + OUT_RING_REG(R500_US_CODE_ADDR, (R500_US_CODE_START_ADDR(0) | R500_US_CODE_END_ADDR(1))); - OUT_ACCEL_REG(R500_US_CODE_RANGE, (R500_US_CODE_RANGE_ADDR(0) | + OUT_RING_REG(R500_US_CODE_RANGE, (R500_US_CODE_RANGE_ADDR(0) | R500_US_CODE_RANGE_SIZE(1))); - OUT_ACCEL_REG(R500_US_CODE_OFFSET, 0); + OUT_RING_REG(R500_US_CODE_OFFSET, 0); } - OUT_ACCEL_REG(R300_US_PIXSIZE, 1); /* highest temp used */ - OUT_ACCEL_REG(R300_US_OUT_FMT_0, output_fmt); - FINISH_ACCEL(); + OUT_RING_REG(R300_US_PIXSIZE, 1); /* highest temp used */ + OUT_RING_REG(R300_US_OUT_FMT_0, output_fmt); + ADVANCE_RING(); if (pMask) { BEGIN_ACCEL(19); - OUT_ACCEL_REG(R500_GA_US_VECTOR_INDEX, R500_US_VECTOR_INST_INDEX(0)); + OUT_RING_REG(R500_GA_US_VECTOR_INDEX, R500_US_VECTOR_INST_INDEX(0)); /* tex inst for src texture */ - OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_INST_TYPE_TEX | + OUT_RING_REG(R500_GA_US_VECTOR_DATA, (R500_INST_TYPE_TEX | R500_INST_RGB_WMASK_R | R500_INST_RGB_WMASK_G | R500_INST_RGB_WMASK_B | @@ -1910,11 +1910,11 @@ static Bool R300PrepareComposite(int op, PicturePtr pSrcPicture, R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP)); - OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_ID(0) | + OUT_RING_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_ID(0) | R500_TEX_INST_LD | R500_TEX_IGNORE_UNCOVERED)); - OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_SRC_ADDR(0) | + OUT_RING_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_SRC_ADDR(0) | R500_TEX_SRC_S_SWIZ_R | R500_TEX_SRC_T_SWIZ_G | R500_TEX_DST_ADDR(0) | @@ -1922,7 +1922,7 @@ static Bool R300PrepareComposite(int op, PicturePtr pSrcPicture, R500_TEX_DST_G_SWIZ_G | R500_TEX_DST_B_SWIZ_B | R500_TEX_DST_A_SWIZ_A)); - OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_DX_ADDR(0) | + OUT_RING_REG(R500_GA_US_VECTOR_DATA, (R500_DX_ADDR(0) | R500_DX_S_SWIZ_R | R500_DX_T_SWIZ_R | R500_DX_R_SWIZ_R | @@ -1932,11 +1932,11 @@ static Bool R300PrepareComposite(int op, PicturePtr pSrcPicture, R500_DY_T_SWIZ_R | R500_DY_R_SWIZ_R | R500_DY_Q_SWIZ_R)); - OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00000000); - OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00000000); + OUT_RING_REG(R500_GA_US_VECTOR_DATA, 0x00000000); + OUT_RING_REG(R500_GA_US_VECTOR_DATA, 0x00000000); /* tex inst for mask texture */ - OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_INST_TYPE_TEX | + OUT_RING_REG(R500_GA_US_VECTOR_DATA, (R500_INST_TYPE_TEX | R500_INST_TEX_SEM_WAIT | R500_INST_RGB_WMASK_R | R500_INST_RGB_WMASK_G | @@ -1945,12 +1945,12 @@ static Bool R300PrepareComposite(int op, PicturePtr pSrcPicture, R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP)); - OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_ID(1) | + OUT_RING_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_ID(1) | R500_TEX_INST_LD | R500_TEX_SEM_ACQUIRE | R500_TEX_IGNORE_UNCOVERED)); - OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_SRC_ADDR(1) | + OUT_RING_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_SRC_ADDR(1) | R500_TEX_SRC_S_SWIZ_R | R500_TEX_SRC_T_SWIZ_G | R500_TEX_DST_ADDR(1) | @@ -1958,7 +1958,7 @@ static Bool R300PrepareComposite(int op, PicturePtr pSrcPicture, R500_TEX_DST_G_SWIZ_G | R500_TEX_DST_B_SWIZ_B | R500_TEX_DST_A_SWIZ_A)); - OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_DX_ADDR(1) | + OUT_RING_REG(R500_GA_US_VECTOR_DATA, (R500_DX_ADDR(1) | R500_DX_S_SWIZ_R | R500_DX_T_SWIZ_R | R500_DX_R_SWIZ_R | @@ -1968,13 +1968,13 @@ static Bool R300PrepareComposite(int op, PicturePtr pSrcPicture, R500_DY_T_SWIZ_R | R500_DY_R_SWIZ_R | R500_DY_Q_SWIZ_R)); - OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00000000); - OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00000000); + OUT_RING_REG(R500_GA_US_VECTOR_DATA, 0x00000000); + OUT_RING_REG(R500_GA_US_VECTOR_DATA, 0x00000000); } else { BEGIN_ACCEL(13); - OUT_ACCEL_REG(R500_GA_US_VECTOR_INDEX, R500_US_VECTOR_INST_INDEX(0)); + OUT_RING_REG(R500_GA_US_VECTOR_INDEX, R500_US_VECTOR_INST_INDEX(0)); /* tex inst for src texture */ - OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_INST_TYPE_TEX | + OUT_RING_REG(R500_GA_US_VECTOR_DATA, (R500_INST_TYPE_TEX | R500_INST_TEX_SEM_WAIT | R500_INST_RGB_WMASK_R | R500_INST_RGB_WMASK_G | @@ -1983,12 +1983,12 @@ static Bool R300PrepareComposite(int op, PicturePtr pSrcPicture, R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP)); - OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_ID(0) | + OUT_RING_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_ID(0) | R500_TEX_INST_LD | R500_TEX_SEM_ACQUIRE | R500_TEX_IGNORE_UNCOVERED)); - OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_SRC_ADDR(0) | + OUT_RING_REG(R500_GA_US_VECTOR_DATA, (R500_TEX_SRC_ADDR(0) | R500_TEX_SRC_S_SWIZ_R | R500_TEX_SRC_T_SWIZ_G | R500_TEX_DST_ADDR(0) | @@ -1996,7 +1996,7 @@ static Bool R300PrepareComposite(int op, PicturePtr pSrcPicture, R500_TEX_DST_G_SWIZ_G | R500_TEX_DST_B_SWIZ_B | R500_TEX_DST_A_SWIZ_A)); - OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_DX_ADDR(0) | + OUT_RING_REG(R500_GA_US_VECTOR_DATA, (R500_DX_ADDR(0) | R500_DX_S_SWIZ_R | R500_DX_T_SWIZ_R | R500_DX_R_SWIZ_R | @@ -2006,13 +2006,13 @@ static Bool R300PrepareComposite(int op, PicturePtr pSrcPicture, R500_DY_T_SWIZ_R | R500_DY_R_SWIZ_R | R500_DY_Q_SWIZ_R)); - OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00000000); - OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00000000); + OUT_RING_REG(R500_GA_US_VECTOR_DATA, 0x00000000); + OUT_RING_REG(R500_GA_US_VECTOR_DATA, 0x00000000); } /* ALU inst */ /* *_OMASK* - output component write mask */ - OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_INST_TYPE_OUT | + OUT_RING_REG(R500_GA_US_VECTOR_DATA, (R500_INST_TYPE_OUT | R500_INST_TEX_SEM_WAIT | R500_INST_LAST | R500_INST_RGB_OMASK_R | @@ -2026,7 +2026,7 @@ static Bool R300PrepareComposite(int op, PicturePtr pSrcPicture, * RGB_ADDR0 is src tex (temp 0) * RGB_ADDR1 is mask tex (temp 1) */ - OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_RGB_ADDR0(0) | + OUT_RING_REG(R500_GA_US_VECTOR_DATA, (R500_RGB_ADDR0(0) | R500_RGB_ADDR1(1) | R500_RGB_ADDR2(0))); /* ALU inst @@ -2034,19 +2034,19 @@ static Bool R300PrepareComposite(int op, PicturePtr pSrcPicture, * ALPHA_ADDR0 is src tex (temp 0) * ALPHA_ADDR1 is mask tex (temp 1) */ - OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDR0(0) | + OUT_RING_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_ADDR0(0) | R500_ALPHA_ADDR1(1) | R500_ALPHA_ADDR2(0))); /* R500_ALU_RGB_TARGET - RGB render target */ - OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGB_SEL_A_SRC0 | + OUT_RING_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGB_SEL_A_SRC0 | src_color | R500_ALU_RGB_SEL_B_SRC1 | mask_color | R500_ALU_RGB_TARGET(0))); /* R500_ALPHA_RGB_TARGET - alpha render target */ - OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_OP_MAD | + OUT_RING_REG(R500_GA_US_VECTOR_DATA, (R500_ALPHA_OP_MAD | R500_ALPHA_ADDRD(0) | R500_ALPHA_SEL_A_SRC0 | src_alpha | @@ -2054,30 +2054,30 @@ static Bool R300PrepareComposite(int op, PicturePtr pSrcPicture, mask_alpha | R500_ALPHA_TARGET(0))); - OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGBA_OP_MAD | + OUT_RING_REG(R500_GA_US_VECTOR_DATA, (R500_ALU_RGBA_OP_MAD | R500_ALU_RGBA_ADDRD(0) | R500_ALU_RGBA_R_SWIZ_0 | R500_ALU_RGBA_G_SWIZ_0 | R500_ALU_RGBA_B_SWIZ_0 | R500_ALU_RGBA_A_SWIZ_0)); - FINISH_ACCEL(); + ADVANCE_RING(); } /* Clear out scissoring */ BEGIN_ACCEL(2); if (IS_R300_3D) { - OUT_ACCEL_REG(R300_SC_SCISSOR0, ((1440 << R300_SCISSOR_X_SHIFT) | + OUT_RING_REG(R300_SC_SCISSOR0, ((1440 << R300_SCISSOR_X_SHIFT) | (1440 << R300_SCISSOR_Y_SHIFT))); - OUT_ACCEL_REG(R300_SC_SCISSOR1, (((pDst->drawable.width + 1440 - 1) << R300_SCISSOR_X_SHIFT) | + OUT_RING_REG(R300_SC_SCISSOR1, (((pDst->drawable.width + 1440 - 1) << R300_SCISSOR_X_SHIFT) | ((pDst->drawable.height + 1440 - 1) << R300_SCISSOR_Y_SHIFT))); } else { - OUT_ACCEL_REG(R300_SC_SCISSOR0, ((0 << R300_SCISSOR_X_SHIFT) | + OUT_RING_REG(R300_SC_SCISSOR0, ((0 << R300_SCISSOR_X_SHIFT) | (0 << R300_SCISSOR_Y_SHIFT))); - OUT_ACCEL_REG(R300_SC_SCISSOR1, (((pDst->drawable.width - 1) << R300_SCISSOR_X_SHIFT) | + OUT_RING_REG(R300_SC_SCISSOR1, (((pDst->drawable.width - 1) << R300_SCISSOR_X_SHIFT) | ((pDst->drawable.height - 1) << R300_SCISSOR_Y_SHIFT))); } - FINISH_ACCEL(); + ADVANCE_RING(); BEGIN_ACCEL_RELOC(3, 2); @@ -2085,16 +2085,16 @@ static Bool R300PrepareComposite(int op, PicturePtr pSrcPicture, EMIT_COLORPITCH(R300_RB3D_COLORPITCH0, colorpitch, pDst); blendcntl = RADEONGetBlendCntl(op, pMaskPicture, pDstPicture->format); - OUT_ACCEL_REG(R300_RB3D_BLENDCNTL, blendcntl | R300_ALPHA_BLEND_ENABLE | R300_READ_ENABLE); + OUT_RING_REG(R300_RB3D_BLENDCNTL, blendcntl | R300_ALPHA_BLEND_ENABLE | R300_READ_ENABLE); - FINISH_ACCEL(); + ADVANCE_RING(); BEGIN_ACCEL(1); if (pMask) - OUT_ACCEL_REG(R300_VAP_VTX_SIZE, 6); + OUT_RING_REG(R300_VAP_VTX_SIZE, 6); else - OUT_ACCEL_REG(R300_VAP_VTX_SIZE, 4); - FINISH_ACCEL(); + OUT_RING_REG(R300_VAP_VTX_SIZE, 4); + ADVANCE_RING(); return TRUE; } @@ -2135,12 +2135,12 @@ static void RadeonFinishComposite(PixmapPtr pDst) if (IS_R300_3D || IS_R500_3D) { BEGIN_ACCEL(3); - OUT_ACCEL_REG(R300_SC_CLIP_RULE, 0xAAAA); - OUT_ACCEL_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_RB3D_DC_FLUSH_ALL); + OUT_RING_REG(R300_SC_CLIP_RULE, 0xAAAA); + OUT_RING_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_RB3D_DC_FLUSH_ALL); } else BEGIN_ACCEL(1); - OUT_ACCEL_REG(RADEON_WAIT_UNTIL, RADEON_WAIT_3D_IDLECLEAN); - FINISH_ACCEL(); + OUT_RING_REG(RADEON_WAIT_UNTIL, RADEON_WAIT_3D_IDLECLEAN); + ADVANCE_RING(); LEAVE_DRAW(0); } @@ -2162,20 +2162,20 @@ static void RadeonDoneComposite(PixmapPtr pDst) #define VTX_OUT_MASK(_dstX, _dstY, _srcX, _srcY, _maskX, _maskY) \ do { \ - OUT_RING_F(_dstX); \ - OUT_RING_F(_dstY); \ - OUT_RING_F(_srcX); \ - OUT_RING_F(_srcY); \ - OUT_RING_F(_maskX); \ - OUT_RING_F(_maskY); \ + OUT_RING(F_TO_DW(_dstX)); \ + OUT_RING(F_TO_DW(_dstY)); \ + OUT_RING(F_TO_DW(_srcX)); \ + OUT_RING(F_TO_DW(_srcY)); \ + OUT_RING(F_TO_DW(_maskX)); \ + OUT_RING(F_TO_DW(_maskY)); \ } while (0) #define VTX_OUT(_dstX, _dstY, _srcX, _srcY) \ do { \ - OUT_RING_F(_dstX); \ - OUT_RING_F(_dstY); \ - OUT_RING_F(_srcX); \ - OUT_RING_F(_srcY); \ + OUT_RING(F_TO_DW(_dstX)); \ + OUT_RING(F_TO_DW(_dstY)); \ + OUT_RING(F_TO_DW(_srcX)); \ + OUT_RING(F_TO_DW(_srcY)); \ } while (0) static inline void transformPoint(PictTransform *transform, xPointFixed *point) diff --git a/src/radeon_textured_video.c b/src/radeon_textured_video.c index 06fda094..3bb04d06 100644 --- a/src/radeon_textured_video.c +++ b/src/radeon_textured_video.c @@ -124,12 +124,10 @@ static REF_TRANSFORM trans[2] = #define OUT_ACCEL_REG_F(reg, val) OUT_RING_REG(reg, F_TO_DW(val)) -#define OUT_RING_F(x) OUT_RING(F_TO_DW(x)) #include "radeon_textured_videofuncs.c" #undef OUT_ACCEL_REG_F -#undef OUT_RING_F static void R600CopyData( diff --git a/src/radeon_textured_videofuncs.c b/src/radeon_textured_videofuncs.c index 0580848c..64dac139 100644 --- a/src/radeon_textured_videofuncs.c +++ b/src/radeon_textured_videofuncs.c @@ -27,20 +27,20 @@ #define VTX_OUT_6(_dstX, _dstY, _srcX, _srcY, _maskX, _maskY) \ do { \ - OUT_RING_F(_dstX); \ - OUT_RING_F(_dstY); \ - OUT_RING_F(_srcX); \ - OUT_RING_F(_srcY); \ - OUT_RING_F(_maskX); \ - OUT_RING_F(_maskY); \ + OUT_RING(F_TO_DW(_dstX)); \ + OUT_RING(F_TO_DW(_dstY)); \ + OUT_RING(F_TO_DW(_srcX)); \ + OUT_RING(F_TO_DW(_srcY)); \ + OUT_RING(F_TO_DW(_maskX)); \ + OUT_RING(F_TO_DW(_maskY)); \ } while (0) #define VTX_OUT_4(_dstX, _dstY, _srcX, _srcY) \ do { \ - OUT_RING_F(_dstX); \ - OUT_RING_F(_dstY); \ - OUT_RING_F(_srcX); \ - OUT_RING_F(_srcY); \ + OUT_RING(F_TO_DW(_dstX)); \ + OUT_RING(F_TO_DW(_dstY)); \ + OUT_RING(F_TO_DW(_srcX)); \ + OUT_RING(F_TO_DW(_srcY)); \ } while (0) |