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-rw-r--r--configure.ac14
-rw-r--r--src/atividmem.c14
-rw-r--r--src/radeon.h6
-rw-r--r--src/radeon_accel.c6
-rw-r--r--src/radeon_bios.c16
-rw-r--r--src/radeon_commonfuncs.c4
-rw-r--r--src/radeon_crtc.c4
-rw-r--r--src/radeon_cursor.c2
-rw-r--r--src/radeon_display.c4
-rw-r--r--src/radeon_driver.c34
-rw-r--r--src/radeon_output.c20
-rw-r--r--src/radeon_video.c66
12 files changed, 146 insertions, 44 deletions
diff --git a/configure.ac b/configure.ac
index b5c694cc..91ea4a86 100644
--- a/configure.ac
+++ b/configure.ac
@@ -22,7 +22,7 @@
AC_PREREQ(2.57)
AC_INIT([xf86-video-ati],
- 6.7.196,
+ 6.7.197,
[https://bugs.freedesktop.org/enter_bug.cgi?product=xorg],
xf86-video-ati)
@@ -58,7 +58,7 @@ AC_ARG_ENABLE(dri, AC_HELP_STRING([--disable-dri],
AC_ARG_ENABLE(exa,
AC_HELP_STRING([--disable-exa],
- [Disable EXA support [[default enabled]]]),
+ [Disable EXA support [[default=enabled]]]),
[EXA="$enableval"],
[EXA=yes])
@@ -213,6 +213,16 @@ AC_CHECK_DECL(xf86XVFillKeyHelperDrawable,
[],
[#include <xf86xv.h>])
+AC_CHECK_DECL(xf86ModeBandwidth,
+ [AC_DEFINE(HAVE_XF86MODEBANDWIDTH, 1, [Have xf86ModeBandwidth prototype])],
+ [],
+ [#include "xf86Modes.h"])
+
+AC_CHECK_DECL(xf86_crtc_clip_video_helper,
+ [AC_DEFINE(HAVE_XF86CRTCCLIPVIDEOHELPER, 1, [Have xf86_crtc_clip_video_helper prototype])],
+ [],
+ [#include "xf86Crtc.h"])
+
AC_CHECK_DECL(XSERVER_LIBPCIACCESS,
[XSERVER_LIBPCIACCESS=yes],[XSERVER_LIBPCIACCESS=no],
[#include "xorg-server.h"])
diff --git a/src/atividmem.c b/src/atividmem.c
index 8910c73b..986ac0f9 100644
--- a/src/atividmem.c
+++ b/src/atividmem.c
@@ -103,14 +103,12 @@ ATIUnmapLinear
ATIPtr pATI
)
{
- pciVideoPtr pVideo = pATI->PCIInfo;
-
if (pATI->pMemory)
{
#ifndef XSERVER_LIBPCIACCESS
xf86UnMapVidMem(iScreen, pATI->pMemory, pATI->LinearSize);
#else
- pci_device_unmap_range(pVideo, pATI->pMemory, pATI->LinearSize);
+ pci_device_unmap_range(pATI->PCIInfo, pATI->pMemory, pATI->LinearSize);
#endif
#if X_BYTE_ORDER != X_LITTLE_ENDIAN
@@ -120,7 +118,7 @@ ATIUnmapLinear
#ifndef XSERVER_LIBPCIACCESS
xf86UnMapVidMem(iScreen, pATI->pMemoryLE, pATI->LinearSize);
#else
- pci_device_unmap_range(pVideo, pATI->pMemoryLE, pATI->LinearSize);
+ pci_device_unmap_range(pATI->PCIInfo, pATI->pMemoryLE, pATI->LinearSize);
#endif
}
@@ -143,14 +141,12 @@ ATIUnmapMMIO
ATIPtr pATI
)
{
- pciVideoPtr pVideo = pATI->PCIInfo;
-
if (pATI->pMMIO)
{
#ifndef XSERVER_LIBPCIACCESS
xf86UnMapVidMem(iScreen, pATI->pMMIO, getpagesize());
#else
- pci_device_unmap_range(pVideo, pATI->pMMIO, getpagesize());
+ pci_device_unmap_range(pATI->PCIInfo, pATI->pMMIO, getpagesize());
#endif
}
@@ -169,14 +165,12 @@ ATIUnmapCursor
ATIPtr pATI
)
{
- pciVideoPtr pVideo = pATI->PCIInfo;
-
if (pATI->pCursorPage)
{
#ifndef XSERVER_LIBPCIACCESS
xf86UnMapVidMem(iScreen, pATI->pCursorPage, getpagesize());
#else
- pci_device_unmap_range(pVideo, pATI->pCursorPage, getpagesize());
+ pci_device_unmap_range(pATI->PCIInfo, pATI->pCursorPage, getpagesize());
#endif
}
diff --git a/src/radeon.h b/src/radeon.h
index 7d57ca56..7f4d0015 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -41,6 +41,7 @@
#include <unistd.h> /* For usleep() */
#include <sys/time.h> /* For gettimeofday() */
+#include "config.h"
#include "xf86str.h"
#include "compiler.h"
#include "xf86fbman.h"
@@ -97,6 +98,11 @@
#define MIN(a,b) ((a)>(b)?(b):(a))
#endif
+#ifndef HAVE_XF86MODEBANDWIDTH
+extern unsigned int xf86ModeBandwidth(DisplayModePtr mode, int depth);
+#define MODE_BANDWIDTH MODE_BAD
+#endif
+
typedef enum {
OPTION_NOACCEL,
OPTION_SW_CURSOR,
diff --git a/src/radeon_accel.c b/src/radeon_accel.c
index 4633665a..5bf03f52 100644
--- a/src/radeon_accel.c
+++ b/src/radeon_accel.c
@@ -136,8 +136,8 @@ void RADEONWaitForFifoFunction(ScrnInfoPtr pScrn, int entries)
}
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
"FIFO timed out: %u entries, stat=0x%08x\n",
- INREG(RADEON_RBBM_STATUS) & RADEON_RBBM_FIFOCNT_MASK,
- INREG(RADEON_RBBM_STATUS));
+ (unsigned int)INREG(RADEON_RBBM_STATUS) & RADEON_RBBM_FIFOCNT_MASK,
+ (unsigned int)INREG(RADEON_RBBM_STATUS));
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"FIFO timed out, resetting engine...\n");
RADEONEngineReset(pScrn);
@@ -168,7 +168,7 @@ void RADEONEngineFlush(ScrnInfoPtr pScrn)
if (i == RADEON_TIMEOUT) {
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
"DC flush timeout: %x\n",
- INREG(RADEON_RB3D_DSTCACHE_CTLSTAT));
+ (unsigned int)INREG(RADEON_RB3D_DSTCACHE_CTLSTAT));
}
}
diff --git a/src/radeon_bios.c b/src/radeon_bios.c
index 46a58ca2..b4a69a35 100644
--- a/src/radeon_bios.c
+++ b/src/radeon_bios.c
@@ -409,7 +409,21 @@ static Bool RADEONGetLegacyConnectorInfoFromBIOS (ScrnInfoPtr pScrn)
}
} else {
xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "No Connector Info Table found!\n");
- return FALSE;
+
+ /* old radeons and r128 didn't use connector tables you just check
+ * for LVDS, DVI, TV, etc. tables
+ */
+ offset = RADEON_BIOS16(info->ROMHeaderStart + 0x34);
+ if (offset) {
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Found DFP table, assuming DVI connector\n");
+ info->BiosConnector[0].valid = TRUE;
+ info->BiosConnector[0].ConnectorType = CONNECTOR_DVI_I;
+ info->BiosConnector[0].DACType = DAC_PRIMARY;
+ info->BiosConnector[0].TMDSType = TMDS_INT;
+ info->BiosConnector[0].DDCType = DDC_DVI;
+ } else
+ return FALSE;
}
/* check LVDS table */
diff --git a/src/radeon_commonfuncs.c b/src/radeon_commonfuncs.c
index 6a999af5..a1802f86 100644
--- a/src/radeon_commonfuncs.c
+++ b/src/radeon_commonfuncs.c
@@ -174,8 +174,8 @@ void FUNC_NAME(RADEONWaitForIdle)(ScrnInfoPtr pScrn)
}
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
"Idle timed out: %u entries, stat=0x%08x\n",
- INREG(RADEON_RBBM_STATUS) & RADEON_RBBM_FIFOCNT_MASK,
- INREG(RADEON_RBBM_STATUS));
+ (unsigned int)INREG(RADEON_RBBM_STATUS) & RADEON_RBBM_FIFOCNT_MASK,
+ (unsigned int)INREG(RADEON_RBBM_STATUS));
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Idle timed out, resetting engine...\n");
RADEONEngineReset(pScrn);
diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c
index 2d4ac15e..8e665187 100644
--- a/src/radeon_crtc.c
+++ b/src/radeon_crtc.c
@@ -159,15 +159,13 @@ RADEONInitCommonRegisters(RADEONSavePtr save, RADEONInfoPtr info)
static void
RADEONInitSurfaceCntl(xf86CrtcPtr crtc, RADEONSavePtr save)
{
- ScrnInfoPtr pScrn = crtc->scrn;
-
save->surface_cntl = 0;
#if X_BYTE_ORDER == X_BIG_ENDIAN
/* We must set both apertures as they can be both used to map the entire
* video memory. -BenH.
*/
- switch (pScrn->bitsPerPixel) {
+ switch (crtc->scrn->bitsPerPixel) {
case 16:
save->surface_cntl |= RADEON_NONSURF_AP0_SWP_16BPP;
save->surface_cntl |= RADEON_NONSURF_AP1_SWP_16BPP;
diff --git a/src/radeon_cursor.c b/src/radeon_cursor.c
index 5b04848f..0f7e6686 100644
--- a/src/radeon_cursor.c
+++ b/src/radeon_cursor.c
@@ -273,7 +273,7 @@ radeon_crtc_load_cursor_argb (xf86CrtcPtr crtc, CARD32 *image)
ScrnInfoPtr pScrn = crtc->scrn;
RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private;
RADEONInfoPtr info = RADEONPTR(pScrn);
- unsigned char *RADEONMMIO = info->MMIO;
+ CURSOR_SWAPPING_DECL_MMIO
CARD32 *d = (CARD32 *)(pointer)(info->FB + radeon_crtc->cursor_offset + pScrn->fbOffset);
RADEONCTRACE(("RADEONLoadCursorARGB\n"));
diff --git a/src/radeon_display.c b/src/radeon_display.c
index 1cd8b052..2043f248 100644
--- a/src/radeon_display.c
+++ b/src/radeon_display.c
@@ -743,7 +743,7 @@ void RADEONInitDispBandwidth2(ScrnInfoPtr pScrn, RADEONInfoPtr info, int pixel_b
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
"GRPH_BUFFER_CNTL from %x to %x\n",
(unsigned int)info->SavedReg->grph_buffer_cntl,
- INREG(RADEON_GRPH_BUFFER_CNTL));
+ (unsigned int)INREG(RADEON_GRPH_BUFFER_CNTL));
if (mode2) {
stop_req = mode2->HDisplay * pixel_bytes2 / 16;
@@ -793,7 +793,7 @@ void RADEONInitDispBandwidth2(ScrnInfoPtr pScrn, RADEONInfoPtr info, int pixel_b
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
"GRPH2_BUFFER_CNTL from %x to %x\n",
(unsigned int)info->SavedReg->grph2_buffer_cntl,
- INREG(RADEON_GRPH2_BUFFER_CNTL));
+ (unsigned int)INREG(RADEON_GRPH2_BUFFER_CNTL));
}
}
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index 2002dd3c..e65e446e 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -6161,10 +6161,44 @@ Bool RADEONHandleMessage(int scrnIndex, const char* msgtype,
}
#endif
+#ifndef HAVE_XF86MODEBANDWIDTH
+/** Calculates the memory bandwidth (in MiB/sec) of a mode. */
+_X_HIDDEN unsigned int
+xf86ModeBandwidth(DisplayModePtr mode, int depth)
+{
+ float a_active, a_total, active_percent, pixels_per_second;
+ int bytes_per_pixel = (depth + 7) / 8;
+
+ if (!mode->HTotal || !mode->VTotal || !mode->Clock)
+ return 0;
+
+ a_active = mode->HDisplay * mode->VDisplay;
+ a_total = mode->HTotal * mode->VTotal;
+ active_percent = a_active / a_total;
+ pixels_per_second = active_percent * mode->Clock * 1000.0;
+
+ return (unsigned int)(pixels_per_second * bytes_per_pixel / (1024 * 1024));
+}
+#endif
+
/* Used to disallow modes that are not supported by the hardware */
ModeStatus RADEONValidMode(int scrnIndex, DisplayModePtr mode,
Bool verbose, int flag)
{
+ ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
+ RADEONInfoPtr info = RADEONPTR(pScrn);
+ RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
+
+ /*
+ * RN50 has effective maximum mode bandwidth of about 300MiB/s.
+ * XXX should really do this for all chips by properly computing
+ * memory bandwidth and an overhead factor.
+ */
+ if (info->ChipFamily == CHIP_FAMILY_RV100 && !pRADEONEnt->HasCRTC2) {
+ if (xf86ModeBandwidth(mode, pScrn->bitsPerPixel) > 300)
+ return MODE_BANDWIDTH;
+ }
+
/* There are problems with double scan mode at high clocks
* They're likely related PLL and display buffer settings.
* Disable these modes for now.
diff --git a/src/radeon_output.c b/src/radeon_output.c
index 519626fb..30a73abc 100644
--- a/src/radeon_output.c
+++ b/src/radeon_output.c
@@ -756,15 +756,18 @@ RADEONDetectLidStatus(ScrnInfoPtr pScrn)
while (fgets(lidline, sizeof lidline, f)) {
if (!strncmp(lidline, "state:", strlen ("state:"))) {
if (strstr(lidline, "open")) {
+ fclose(f);
ErrorF("proc lid open\n");
return MT_LCD;
}
else if (strstr(lidline, "closed")) {
+ fclose(f);
ErrorF("proc lid closed\n");
return MT_NONE;
}
}
}
+ fclose(f);
}
#endif
@@ -851,6 +854,19 @@ static int
radeon_mode_valid(xf86OutputPtr output, DisplayModePtr pMode)
{
RADEONOutputPrivatePtr radeon_output = output->driver_private;
+ ScrnInfoPtr pScrn = output->scrn;
+ RADEONInfoPtr info = RADEONPTR(pScrn);
+ RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
+
+ /*
+ * RN50 has effective maximum mode bandwidth of about 300MiB/s.
+ * XXX should really do this for all chips by properly computing
+ * memory bandwidth and an overhead factor.
+ */
+ if (info->ChipFamily == CHIP_FAMILY_RV100 && !pRADEONEnt->HasCRTC2) {
+ if (xf86ModeBandwidth(pMode, pScrn->bitsPerPixel) > 300)
+ return MODE_BANDWIDTH;
+ }
if (OUTPUT_IS_TV) {
/* FIXME: Update when more modes are added */
@@ -3401,6 +3417,10 @@ Bool RADEONSetupConnectors(ScrnInfoPtr pScrn)
for (i = 0 ; i < RADEON_MAX_BIOS_CONNECTOR; i++) {
if (info->BiosConnector[i].valid) {
+
+ if (info->BiosConnector[i].ConnectorType == CONNECTOR_NONE)
+ continue;
+
RADEONOutputPrivatePtr radeon_output = xnfcalloc(sizeof(RADEONOutputPrivateRec), 1);
if (!radeon_output) {
return FALSE;
diff --git a/src/radeon_video.c b/src/radeon_video.c
index a84662e9..de706053 100644
--- a/src/radeon_video.c
+++ b/src/radeon_video.c
@@ -119,6 +119,7 @@ static Atom xvOvAlpha, xvGrAlpha, xvAlphaMode;
#define GET_PORT_PRIVATE(pScrn) \
(RADEONPortPrivPtr)((RADEONPTR(pScrn))->adaptor->pPortPrivates[0].ptr)
+#ifndef HAVE_XF86CRTCCLIPVIDEOHELPER
static void
radeon_box_intersect(BoxPtr dest, BoxPtr a, BoxPtr b)
{
@@ -185,17 +186,17 @@ radeon_covering_crtc(ScrnInfoPtr pScrn,
}
static Bool
-radeon_clip_video_helper(ScrnInfoPtr pScrn,
- xf86CrtcPtr *crtc_ret,
- xf86CrtcPtr desired_crtc,
- BoxPtr dst,
- INT32 *xa,
- INT32 *xb,
- INT32 *ya,
- INT32 *yb,
- RegionPtr reg,
- INT32 width,
- INT32 height)
+radeon_crtc_clip_video_helper(ScrnInfoPtr pScrn,
+ xf86CrtcPtr *crtc_ret,
+ xf86CrtcPtr desired_crtc,
+ BoxPtr dst,
+ INT32 *xa,
+ INT32 *xb,
+ INT32 *ya,
+ INT32 *yb,
+ RegionPtr reg,
+ INT32 width,
+ INT32 height)
{
Bool ret;
RegionRec crtc_region_local;
@@ -227,6 +228,31 @@ radeon_clip_video_helper(ScrnInfoPtr pScrn,
return ret;
}
+#endif
+
+static Bool
+radeon_crtc_clip_video(ScrnInfoPtr pScrn,
+ xf86CrtcPtr *crtc_ret,
+ xf86CrtcPtr desired_crtc,
+ BoxPtr dst,
+ INT32 *xa,
+ INT32 *xb,
+ INT32 *ya,
+ INT32 *yb,
+ RegionPtr reg,
+ INT32 width,
+ INT32 height)
+{
+#ifndef HAVE_XF86CRTCCLIPVIDEOHELPER
+ return radeon_crtc_clip_video_helper(pScrn, crtc_ret, desired_crtc,
+ dst, xa, xb, ya, yb,
+ reg, width, height);
+#else
+ return xf86_crtc_clip_video_helper(pScrn, crtc_ret, desired_crtc,
+ dst, xa, xb, ya, yb,
+ reg, width, height);
+#endif
+}
#ifdef USE_EXA
static void
@@ -2899,9 +2925,9 @@ RADEONPutImage(
dstBox.y1 = drw_y;
dstBox.y2 = drw_y + drw_h;
- if (!radeon_clip_video_helper(pScrn, &crtc, pPriv->desired_crtc,
- &dstBox, &xa, &xb, &ya, &yb,
- clipBoxes, width, height))
+ if (!radeon_crtc_clip_video(pScrn, &crtc, pPriv->desired_crtc,
+ &dstBox, &xa, &xb, &ya, &yb,
+ clipBoxes, width, height))
return Success;
if (!crtc) {
@@ -3295,9 +3321,9 @@ RADEONDisplaySurface(
dstBox.y1 = drw_y;
dstBox.y2 = drw_y + drw_h;
- if (!radeon_clip_video_helper(pScrn, &crtc, portPriv->desired_crtc,
- &dstBox, &xa, &xb, &ya, &yb, clipBoxes,
- surface->width, surface->height))
+ if (!radeon_crtc_clip_video(pScrn, &crtc, portPriv->desired_crtc,
+ &dstBox, &xa, &xb, &ya, &yb, clipBoxes,
+ surface->width, surface->height))
return Success;
if (!crtc) {
@@ -3438,9 +3464,9 @@ RADEONPutVideo(
else
vbi_line_width = 2000; /* might need adjustment */
- if (!radeon_clip_video_helper(pScrn, &crtc, pPriv->desired_crtc,
- &dstBox, &xa, &xb, &ya, &yb,
- clipBoxes, width, height))
+ if (!radeon_crtc_clip_video(pScrn, &crtc, pPriv->desired_crtc,
+ &dstBox, &xa, &xb, &ya, &yb,
+ clipBoxes, width, height))
return Success;
if (!crtc) {
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-24 09:43:55 +0000