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path: root/src/legacy_crtc.c
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Diffstat (limited to 'src/legacy_crtc.c')
-rw-r--r--src/legacy_crtc.c48
1 files changed, 18 insertions, 30 deletions
diff --git a/src/legacy_crtc.c b/src/legacy_crtc.c
index 7a3a920a..b57ba5f7 100644
--- a/src/legacy_crtc.c
+++ b/src/legacy_crtc.c
@@ -649,6 +649,9 @@ radeon_crtc_modeset_ioctl(xf86CrtcPtr crtc, Bool post)
if (!info->directRenderingEnabled)
return;
+ if (info->ChipFamily >= CHIP_FAMILY_R600)
+ return;
+
modeset.crtc = radeon_crtc->crtc_id;
modeset.cmd = post ? _DRM_POST_MODESET : _DRM_PRE_MODESET;
@@ -661,55 +664,42 @@ radeon_crtc_modeset_ioctl(xf86CrtcPtr crtc, Bool post)
void
legacy_crtc_dpms(xf86CrtcPtr crtc, int mode)
{
- int mask;
+ uint32_t mask;
RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private;
RADEONEntPtr pRADEONEnt = RADEONEntPriv(crtc->scrn);
unsigned char *RADEONMMIO = pRADEONEnt->MMIO;
- mask = radeon_crtc->crtc_id ? (RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS | RADEON_CRTC2_HSYNC_DIS | RADEON_CRTC2_DISP_REQ_EN_B) : (RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_HSYNC_DIS | RADEON_CRTC_VSYNC_DIS);
-
- if (mode == DPMSModeOff)
- radeon_crtc_modeset_ioctl(crtc, FALSE);
+ if (radeon_crtc->crtc_id)
+ mask = (RADEON_CRTC2_EN |
+ RADEON_CRTC2_DISP_DIS |
+ RADEON_CRTC2_VSYNC_DIS |
+ RADEON_CRTC2_HSYNC_DIS |
+ RADEON_CRTC2_DISP_REQ_EN_B);
+ else
+ mask = (RADEON_CRTC_DISPLAY_DIS |
+ RADEON_CRTC_HSYNC_DIS |
+ RADEON_CRTC_VSYNC_DIS);
switch(mode) {
case DPMSModeOn:
if (radeon_crtc->crtc_id) {
- OUTREGP(RADEON_CRTC2_GEN_CNTL, 0, ~mask);
+ OUTREGP(RADEON_CRTC2_GEN_CNTL, RADEON_CRTC2_EN, ~mask);
} else {
- OUTREGP(RADEON_CRTC_GEN_CNTL, 0, ~RADEON_CRTC_DISP_REQ_EN_B);
+ OUTREGP(RADEON_CRTC_GEN_CNTL, RADEON_CRTC_EN, ~(RADEON_CRTC_EN | RADEON_CRTC_DISP_REQ_EN_B));
OUTREGP(RADEON_CRTC_EXT_CNTL, 0, ~mask);
}
break;
case DPMSModeStandby:
- if (radeon_crtc->crtc_id) {
- OUTREGP(RADEON_CRTC2_GEN_CNTL, (RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_HSYNC_DIS), ~mask);
- } else {
- OUTREGP(RADEON_CRTC_GEN_CNTL, 0, ~RADEON_CRTC_DISP_REQ_EN_B);
- OUTREGP(RADEON_CRTC_EXT_CNTL, (RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_HSYNC_DIS), ~mask);
- }
- break;
case DPMSModeSuspend:
- if (radeon_crtc->crtc_id) {
- OUTREGP(RADEON_CRTC2_GEN_CNTL, (RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS), ~mask);
- } else {
- OUTREGP(RADEON_CRTC_GEN_CNTL, 0, ~RADEON_CRTC_DISP_REQ_EN_B);
- OUTREGP(RADEON_CRTC_EXT_CNTL, (RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_VSYNC_DIS), ~mask);
- }
- break;
case DPMSModeOff:
if (radeon_crtc->crtc_id) {
OUTREGP(RADEON_CRTC2_GEN_CNTL, mask, ~mask);
} else {
- OUTREGP(RADEON_CRTC_GEN_CNTL, RADEON_CRTC_DISP_REQ_EN_B, ~RADEON_CRTC_DISP_REQ_EN_B);
+ OUTREGP(RADEON_CRTC_GEN_CNTL, RADEON_CRTC_DISP_REQ_EN_B, ~(RADEON_CRTC_EN | RADEON_CRTC_DISP_REQ_EN_B));
OUTREGP(RADEON_CRTC_EXT_CNTL, mask, ~mask);
}
break;
}
-
- if (mode != DPMSModeOff) {
- radeon_crtc_modeset_ioctl(crtc, TRUE);
- radeon_crtc_load_lut(crtc);
- }
}
@@ -912,7 +902,6 @@ RADEONInitCrtcRegisters(xf86CrtcPtr crtc, RADEONSavePtr save,
/*save->bios_4_scratch = info->SavedReg->bios_4_scratch;*/
save->crtc_gen_cntl = (RADEON_CRTC_EXT_DISP_EN
- | RADEON_CRTC_EN
| (format << 8)
| ((mode->Flags & V_DBLSCAN)
? RADEON_CRTC_DBL_SCAN_EN
@@ -1160,8 +1149,7 @@ RADEONInitCrtc2Registers(xf86CrtcPtr crtc, RADEONSavePtr save,
else
save->crtc2_gen_cntl = 0;
- save->crtc2_gen_cntl |= (RADEON_CRTC2_EN
- | (format << 8)
+ save->crtc2_gen_cntl |= ((format << 8)
| RADEON_CRTC2_VSYNC_DIS
| RADEON_CRTC2_HSYNC_DIS
| RADEON_CRTC2_DISP_DIS