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-rw-r--r--src/legacy_output.c20
1 files changed, 20 insertions, 0 deletions
diff --git a/src/legacy_output.c b/src/legacy_output.c
index 4df81abd..9c9ebb9f 100644
--- a/src/legacy_output.c
+++ b/src/legacy_output.c
@@ -727,6 +727,14 @@ RADEONEnableDisplay(xf86OutputPtr output, BOOL bEnable)
save->crtc2_gen_cntl |= RADEON_CRTC2_CRT2_ON;
}
tv_dac_change = 1;
+ /* IGP chips seem to use a mix of Primary and TVDAC controls */
+ if (info->IsIGP) {
+ tmp = INREG(RADEON_CRTC_EXT_CNTL);
+ tmp |= RADEON_CRTC_CRT_ON;
+ OUTREG(RADEON_CRTC_EXT_CNTL, tmp);
+ save->crtc_ext_cntl |= RADEON_CRTC_CRT_ON;
+ RADEONDacPowerSet(pScrn, bEnable, TRUE);
+ }
}
} else if (radeon_output->MonType == MT_DFP) {
if (radeon_output->TMDSType == TMDS_INT) {
@@ -807,6 +815,14 @@ RADEONEnableDisplay(xf86OutputPtr output, BOOL bEnable)
save->crtc2_gen_cntl &= ~RADEON_CRTC2_CRT2_ON;
}
}
+ /* IGP chips seem to use a mix of Primary and TVDAC controls */
+ if (info->IsIGP) {
+ tmp = INREG(RADEON_CRTC_EXT_CNTL);
+ tmp &= ~RADEON_CRTC_CRT_ON;
+ OUTREG(RADEON_CRTC_EXT_CNTL, tmp);
+ save->crtc_ext_cntl &= ~RADEON_CRTC_CRT_ON;
+ RADEONDacPowerSet(pScrn, bEnable, TRUE);
+ }
}
} else if (radeon_output->MonType == MT_DFP) {
if (radeon_output->TMDSType == TMDS_INT) {
@@ -1367,6 +1383,7 @@ RADEONInitOutputRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save,
{
Bool IsPrimary = crtc_num == 0 ? TRUE : FALSE;
RADEONOutputPrivatePtr radeon_output = output->driver_private;
+ RADEONInfoPtr info = RADEONPTR(pScrn);
if (crtc_num == 0)
RADEONInitRMXRegisters(output, save, mode);
@@ -1376,6 +1393,9 @@ RADEONInitOutputRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save,
RADEONInitDACRegisters(output, save, mode, IsPrimary);
} else {
RADEONInitDAC2Registers(output, save, mode, IsPrimary);
+ /* IGP chips seem to use a mix of primary and TVDAC controls */
+ if (info->IsIGP)
+ RADEONInitDACRegisters(output, save, mode, IsPrimary);
}
} else if (radeon_output->MonType == MT_LCD) {
RADEONInitLVDSRegisters(output, save, mode, IsPrimary);