1 files changed, 43 insertions, 26 deletions

diff --git a/src/r600_exa.c b/src/r600_exa.c
index 22d4b316..99db0c40 100644
--- a/src/r600_exa.c
+++ b/src/r600_exa.c
@@ -150,7 +150,7 @@ R600PrepareSolid(PixmapPtr pPix, int alu, Pixel pm, Pixel fg)
     if (!RADEONValidPM(pm, pPix->drawable.bitsPerPixel))
 	RADEON_FALLBACK(("invalid planemask\n"));
 
-    dst.bo = radeon_get_pixmap_bo(pPix);
+    dst.bo = radeon_get_pixmap_bo(pPix)->bo.radeon;
     dst.tiling_flags = radeon_get_pixmap_tiling(pPix);
     dst.surface = radeon_get_pixmap_surface(pPix);
 
@@ -534,13 +534,13 @@ R600PrepareCopy(PixmapPtr pSrc,   PixmapPtr pDst,
 
     accel_state->same_surface = FALSE;
 
-    src_obj.bo = radeon_get_pixmap_bo(pSrc);
-    dst_obj.bo = radeon_get_pixmap_bo(pDst);
+    src_obj.bo = radeon_get_pixmap_bo(pSrc)->bo.radeon;
+    dst_obj.bo = radeon_get_pixmap_bo(pDst)->bo.radeon;
     dst_obj.tiling_flags = radeon_get_pixmap_tiling(pDst);
     src_obj.tiling_flags = radeon_get_pixmap_tiling(pSrc);
     src_obj.surface = radeon_get_pixmap_surface(pSrc);
     dst_obj.surface = radeon_get_pixmap_surface(pDst);
-    if (radeon_get_pixmap_bo(pSrc) == radeon_get_pixmap_bo(pDst))
+    if (src_obj.bo == dst_obj.bo)
 	accel_state->same_surface = TRUE;
 
     src_obj.width = pSrc->drawable.width;
@@ -575,7 +575,7 @@ R600PrepareCopy(PixmapPtr pSrc,   PixmapPtr pDst,
 	accel_state->copy_area_bo = radeon_bo_open(info->bufmgr, 0, size, align,
 						   RADEON_GEM_DOMAIN_VRAM,
 						   0);
-	if (accel_state->copy_area_bo == NULL)
+	if (!accel_state->copy_area_bo)
 	    RADEON_FALLBACK(("temp copy surface alloc failed\n"));
 	
 	radeon_cs_space_add_persistent_bo(info->cs, accel_state->copy_area_bo,
@@ -727,6 +727,10 @@ struct formatinfo {
 };
 
 static struct formatinfo R600TexFormats[] = {
+    {PICT_a2r10g10b10,	FMT_2_10_10_10},
+    {PICT_x2r10g10b10,	FMT_2_10_10_10},
+    {PICT_a2b10g10r10,	FMT_2_10_10_10},
+    {PICT_x2b10g10r10,	FMT_2_10_10_10},
     {PICT_a8r8g8b8,	FMT_8_8_8_8},
     {PICT_x8r8g8b8,	FMT_8_8_8_8},
     {PICT_a8b8g8r8,	FMT_8_8_8_8},
@@ -782,6 +786,12 @@ static uint32_t R600GetBlendCntl(int op, PicturePtr pMask, uint32_t dst_format)
 static Bool R600GetDestFormat(PicturePtr pDstPicture, uint32_t *dst_format)
 {
     switch (pDstPicture->format) {
+    case PICT_a2r10g10b10:
+    case PICT_x2r10g10b10:
+    case PICT_a2b10g10r10:
+    case PICT_x2b10g10r10:
+	*dst_format = COLOR_2_10_10_10;
+	break;
     case PICT_a8r8g8b8:
     case PICT_x8r8g8b8:
     case PICT_a8b8g8r8:
@@ -906,6 +916,7 @@ static Bool R600TextureSetup(PicturePtr pPict, PixmapPtr pPix,
 
     /* component swizzles */
     switch (pPict->format) {
+    case PICT_a2r10g10b10:
     case PICT_a1r5g5b5:
     case PICT_a8r8g8b8:
 	pix_r = SQ_SEL_Z; /* R */
@@ -913,12 +924,14 @@ static Bool R600TextureSetup(PicturePtr pPict, PixmapPtr pPix,
 	pix_b = SQ_SEL_X; /* B */
 	pix_a = SQ_SEL_W; /* A */
 	break;
+    case PICT_a2b10g10r10:
     case PICT_a8b8g8r8:
 	pix_r = SQ_SEL_X; /* R */
 	pix_g = SQ_SEL_Y; /* G */
 	pix_b = SQ_SEL_Z; /* B */
 	pix_a = SQ_SEL_W; /* A */
 	break;
+    case PICT_x2b10g10r10:
     case PICT_x8b8g8r8:
 	pix_r = SQ_SEL_X; /* R */
 	pix_g = SQ_SEL_Y; /* G */
@@ -937,6 +950,7 @@ static Bool R600TextureSetup(PicturePtr pPict, PixmapPtr pPix,
 	pix_b = SQ_SEL_W; /* B */
 	pix_a = SQ_SEL_1; /* A */
 	break;
+    case PICT_x2r10g10b10:
     case PICT_x1r5g5b5:
     case PICT_x8r8g8b8:
     case PICT_r5g6b5:
@@ -1330,7 +1344,7 @@ static Bool R600PrepareComposite(int op, PicturePtr pSrcPicture,
 	return FALSE;
 
     if (pSrc) {
-	src_obj.bo = radeon_get_pixmap_bo(pSrc);
+	src_obj.bo = radeon_get_pixmap_bo(pSrc)->bo.radeon;
 	src_obj.tiling_flags = radeon_get_pixmap_tiling(pSrc);
 	src_obj.surface = radeon_get_pixmap_surface(pSrc);
 	src_obj.pitch = exaGetPixmapPitch(pSrc) / (pSrc->drawable.bitsPerPixel / 8);
@@ -1340,7 +1354,7 @@ static Bool R600PrepareComposite(int op, PicturePtr pSrcPicture,
 	src_obj.domain = RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT;
     }
 
-    dst_obj.bo = radeon_get_pixmap_bo(pDst);
+    dst_obj.bo = radeon_get_pixmap_bo(pDst)->bo.radeon;
     dst_obj.tiling_flags = radeon_get_pixmap_tiling(pDst);
     dst_obj.surface = radeon_get_pixmap_surface(pDst);
     dst_obj.pitch = exaGetPixmapPitch(pDst) / (pDst->drawable.bitsPerPixel / 8);
@@ -1354,7 +1368,7 @@ static Bool R600PrepareComposite(int op, PicturePtr pSrcPicture,
 
     if (pMaskPicture) {
 	if (pMask) {
-	    mask_obj.bo = radeon_get_pixmap_bo(pMask);
+	    mask_obj.bo = radeon_get_pixmap_bo(pMask)->bo.radeon;
 	    mask_obj.tiling_flags = radeon_get_pixmap_tiling(pMask);
 	    mask_obj.surface = radeon_get_pixmap_surface(pMask);
 	    mask_obj.pitch = exaGetPixmapPitch(pMask) / (pMask->drawable.bitsPerPixel / 8);
@@ -1464,6 +1478,8 @@ static Bool R600PrepareComposite(int op, PicturePtr pSrcPicture,
     cb_conf.surface = accel_state->dst_obj.surface;
 
     switch (pDstPicture->format) {
+    case PICT_a2r10g10b10:
+    case PICT_x2r10g10b10:
     case PICT_a8r8g8b8:
     case PICT_x8r8g8b8:
     case PICT_a1r5g5b5:
@@ -1471,6 +1487,8 @@ static Bool R600PrepareComposite(int op, PicturePtr pSrcPicture,
     default:
 	cb_conf.comp_swap = 1; /* ARGB */
 	break;
+    case PICT_a2b10g10r10:
+    case PICT_x2b10g10r10:
     case PICT_a8b8g8r8:
     case PICT_x8b8g8r8:
 	cb_conf.comp_swap = 0; /* ABGR */
@@ -1682,16 +1700,16 @@ R600UploadToScreenCS(PixmapPtr pDst, int x, int y, int w, int h,
 	return FALSE;
 
     driver_priv = exaGetPixmapDriverPrivate(pDst);
-    if (!driver_priv || !driver_priv->bo)
+    if (!driver_priv || !driver_priv->bo->bo.radeon)
 	return FALSE;
 
     /* If we know the BO won't be busy / in VRAM, don't bother with a scratch */
-    copy_dst = driver_priv->bo;
+    copy_dst = driver_priv->bo->bo.radeon;
     copy_pitch = pDst->devKind;
     if (!(driver_priv->tiling_flags & (RADEON_TILING_MACRO | RADEON_TILING_MICRO))) {
-	if (!radeon_bo_is_referenced_by_cs(driver_priv->bo, info->cs)) {
+	if (!radeon_bo_is_referenced_by_cs(driver_priv->bo->bo.radeon, info->cs)) {
 	    flush = FALSE;
-	    if (!radeon_bo_is_busy(driver_priv->bo, &dst_domain) &&
+	    if (!radeon_bo_is_busy(driver_priv->bo->bo.radeon, &dst_domain) &&
 		!(dst_domain & RADEON_GEM_DOMAIN_VRAM))
 		goto copy;
 	}
@@ -1705,7 +1723,7 @@ R600UploadToScreenCS(PixmapPtr pDst, int x, int y, int w, int h,
     base_align = drmmode_get_base_align(pScrn, (bpp / 8), 0);
     size = scratch_pitch * height * (bpp / 8);
     scratch = radeon_bo_open(info->bufmgr, 0, size, base_align, RADEON_GEM_DOMAIN_GTT, 0);
-    if (scratch == NULL) {
+    if (!scratch) {
 	goto copy;
     }
 
@@ -1723,7 +1741,7 @@ R600UploadToScreenCS(PixmapPtr pDst, int x, int y, int w, int h,
     dst_obj.height = pDst->drawable.height;
     dst_obj.bpp = bpp;
     dst_obj.domain = RADEON_GEM_DOMAIN_VRAM;
-    dst_obj.bo = radeon_get_pixmap_bo(pDst);
+    dst_obj.bo = radeon_get_pixmap_bo(pDst)->bo.radeon;
     dst_obj.tiling_flags = radeon_get_pixmap_tiling(pDst);
     dst_obj.surface = radeon_get_pixmap_surface(pDst);
 
@@ -1751,7 +1769,7 @@ copy:
     r = TRUE;
     size = w * bpp / 8;
     dst = copy_dst->ptr;
-    if (copy_dst == driver_priv->bo)
+    if (copy_dst == driver_priv->bo->bo.radeon)
 	dst += y * copy_pitch + x * bpp / 8;
     for (i = 0; i < h; i++) {
         memcpy(dst + i * copy_pitch, src, size);
@@ -1801,15 +1819,15 @@ R600DownloadFromScreenCS(PixmapPtr pSrc, int x, int y, int w,
 	return FALSE;
 
     driver_priv = exaGetPixmapDriverPrivate(pSrc);
-    if (!driver_priv || !driver_priv->bo)
+    if (!driver_priv || !driver_priv->bo->bo.radeon)
 	return FALSE;
 
     /* If we know the BO won't end up in VRAM anyway, don't bother with a scratch */
-    copy_src = driver_priv->bo;
+    copy_src = driver_priv->bo->bo.radeon;
     copy_pitch = pSrc->devKind;
     if (!(driver_priv->tiling_flags & (RADEON_TILING_MACRO | RADEON_TILING_MICRO))) {
-	if (radeon_bo_is_referenced_by_cs(driver_priv->bo, info->cs)) {
-	    src_domain = radeon_bo_get_src_domain(driver_priv->bo);
+	if (radeon_bo_is_referenced_by_cs(driver_priv->bo->bo.radeon, info->cs)) {
+	    src_domain = radeon_bo_get_src_domain(driver_priv->bo->bo.radeon);
 	    if ((src_domain & (RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM)) ==
 		(RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM))
 		src_domain = 0;
@@ -1818,7 +1836,7 @@ R600DownloadFromScreenCS(PixmapPtr pSrc, int x, int y, int w,
 	}
 
 	if (!src_domain)
-	    radeon_bo_is_busy(driver_priv->bo, &src_domain);
+	    radeon_bo_is_busy(driver_priv->bo->bo.radeon, &src_domain);
 
 	if (src_domain & ~(uint32_t)RADEON_GEM_DOMAIN_VRAM)
 	    goto copy;
@@ -1829,7 +1847,7 @@ R600DownloadFromScreenCS(PixmapPtr pSrc, int x, int y, int w,
     base_align = drmmode_get_base_align(pScrn, (bpp / 8), 0);
     size = scratch_pitch * height * (bpp / 8);
     scratch = radeon_bo_open(info->bufmgr, 0, size, base_align, RADEON_GEM_DOMAIN_GTT, 0);
-    if (scratch == NULL) {
+    if (!scratch) {
 	goto copy;
     }
     radeon_cs_space_reset_bos(info->cs);
@@ -1849,7 +1867,7 @@ R600DownloadFromScreenCS(PixmapPtr pSrc, int x, int y, int w,
     src_obj.height = pSrc->drawable.height;
     src_obj.bpp = bpp;
     src_obj.domain = RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT;
-    src_obj.bo = radeon_get_pixmap_bo(pSrc);
+    src_obj.bo = radeon_get_pixmap_bo(pSrc)->bo.radeon;
     src_obj.tiling_flags = radeon_get_pixmap_tiling(pSrc);
     src_obj.surface = radeon_get_pixmap_surface(pSrc);
 
@@ -1891,7 +1909,7 @@ copy:
     }
     r = TRUE;
     w *= bpp / 8;
-    if (copy_src == driver_priv->bo)
+    if (copy_src == driver_priv->bo->bo.radeon)
 	size = y * copy_pitch + x * bpp / 8;
     else
 	size = 0;
@@ -1942,7 +1960,7 @@ R600AllocShaders(ScrnInfoPtr pScrn, ScreenPtr pScreen)
 
     accel_state->shaders_bo = radeon_bo_open(info->bufmgr, 0, size, 0,
 					     RADEON_GEM_DOMAIN_VRAM, 0);
-    if (accel_state->shaders_bo == NULL) {
+    if (!accel_state->shaders_bo) {
         ErrorF("Allocating shader failed\n");
 	return FALSE;
     }
@@ -2007,7 +2025,7 @@ R600DrawInit(ScreenPtr pScreen)
     ScrnInfoPtr pScrn =  xf86ScreenToScrn(pScreen);
     RADEONInfoPtr info   = RADEONPTR(pScrn);
 
-    if (info->accel_state->exa == NULL) {
+    if (!info->accel_state->exa) {
 	xf86DrvMsg(pScreen->myNum, X_ERROR, "Memory map not set up\n");
 	return FALSE;
     }
@@ -2026,7 +2044,6 @@ R600DrawInit(ScreenPtr pScreen)
     info->accel_state->exa->MarkSync = R600MarkSync;
     info->accel_state->exa->WaitMarker = R600Sync;
 
-    info->accel_state->exa->CreatePixmap = RADEONEXACreatePixmap;
     info->accel_state->exa->DestroyPixmap = RADEONEXADestroyPixmap;
     info->accel_state->exa->PixmapIsOffscreen = RADEONEXAPixmapIsOffscreen;
     info->accel_state->exa->PrepareAccess = RADEONPrepareAccess_CS;