diff options
Diffstat (limited to 'src/radeon_exa_render.c')
| -rw-r--r-- | src/radeon_exa_render.c | 72 |
1 files changed, 53 insertions, 19 deletions
diff --git a/src/radeon_exa_render.c b/src/radeon_exa_render.c index 9b23cdcf..d16a2690 100644 --- a/src/radeon_exa_render.c +++ b/src/radeon_exa_render.c @@ -1009,21 +1009,55 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture, OUT_ACCEL_REG(R300_VAP_CLIP_CNTL, 0x10000); FINISH_ACCEL(); - /* setup pixel shader */ - BEGIN_ACCEL(12); - OUT_ACCEL_REG(R300_US_CONFIG, 0x8); - OUT_ACCEL_REG(R300_US_PIXSIZE, 0x0); - OUT_ACCEL_REG(R300_US_CODE_OFFSET, 0x40040); - OUT_ACCEL_REG(R300_US_CODE_ADDR_0, 0x0); - OUT_ACCEL_REG(R300_US_CODE_ADDR_1, 0x0); - OUT_ACCEL_REG(R300_US_CODE_ADDR_2, 0x0); - OUT_ACCEL_REG(R300_US_CODE_ADDR_3, 0x400000); - OUT_ACCEL_REG(R300_US_TEX_INST_0, 0x8000); - OUT_ACCEL_REG(R300_US_ALU_RGB_ADDR_0, 0x1f800000); - OUT_ACCEL_REG(R300_US_ALU_RGB_INST_0, 0x50a80); - OUT_ACCEL_REG(R300_US_ALU_ALPHA_ADDR_0, 0x1800000); - OUT_ACCEL_REG(R300_US_ALU_ALPHA_INST_0, 0x00040889); - FINISH_ACCEL(); + if (IS_R300_VARIANT) { + /* setup pixel shader */ + BEGIN_ACCEL(16); + OUT_ACCEL_REG(R300_RS_COUNT, 0x40002); + OUT_ACCEL_REG(R300_RS_IP_0, 0x1610000); + OUT_ACCEL_REG(R300_RS_INST_COUNT, 0xC0); + OUT_ACCEL_REG(R300_RS_INST_0, R300_RS_INST_TEX_CN_WRITE); + OUT_ACCEL_REG(R300_US_CONFIG, 0x8); + OUT_ACCEL_REG(R300_US_PIXSIZE, 0x0); + OUT_ACCEL_REG(R300_US_CODE_OFFSET, 0x40040); + OUT_ACCEL_REG(R300_US_CODE_ADDR_0, 0x0); + OUT_ACCEL_REG(R300_US_CODE_ADDR_1, 0x0); + OUT_ACCEL_REG(R300_US_CODE_ADDR_2, 0x0); + OUT_ACCEL_REG(R300_US_CODE_ADDR_3, 0x400000); + OUT_ACCEL_REG(R300_US_TEX_INST_0, 0x8000); + OUT_ACCEL_REG(R300_US_ALU_RGB_ADDR_0, 0x1f800000); + OUT_ACCEL_REG(R300_US_ALU_RGB_INST_0, 0x50a80); + OUT_ACCEL_REG(R300_US_ALU_ALPHA_ADDR_0, 0x1800000); + OUT_ACCEL_REG(R300_US_ALU_ALPHA_INST_0, 0x00040889); + FINISH_ACCEL(); + } else { + BEGIN_ACCEL(22); + OUT_ACCEL_REG(R300_RS_COUNT, 0x40002); + OUT_ACCEL_REG(R500_RS_IP_0, (0 << R500_RS_IP_TEX_PTR_S_SHIFT) | (1 << R500_RS_IP_TEX_PTR_T_SHIFT) | + (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT) | (R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT)); + + OUT_ACCEL_REG(R300_RS_INST_COUNT, 0x0); + OUT_ACCEL_REG(R500_RS_INST_0, R500_RS_INST_TEX_CN_WRITE); + OUT_ACCEL_REG(R300_US_CONFIG, 0x2); + OUT_ACCEL_REG(R300_US_PIXSIZE, 0x0); + OUT_ACCEL_REG(R500_US_FC_CTRL, 0x0); + OUT_ACCEL_REG(R500_US_CODE_ADDR, 0x10000); + OUT_ACCEL_REG(R500_US_CODE_RANGE, 0x10000); + OUT_ACCEL_REG(R500_US_CODE_OFFSET, 0x0); + OUT_ACCEL_REG(R500_GA_US_VECTOR_INDEX, 0x0); + OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00007807); + OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x06400000); + OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0xe4000400); + OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00000000); + OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00000000); + OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00000000); + OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00078105); + OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x10040000); + OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x10040000); + OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00db0220); + OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00c0c000); + OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x20490000); + FINISH_ACCEL(); + } BEGIN_ACCEL(6); OUT_ACCEL_REG(R300_TX_INVALTAGS, 0x0); @@ -1178,7 +1212,7 @@ static void FUNC_NAME(RadeonComposite)(PixmapPtr pDst, vtx_count = VTX_COUNT; - if (IS_R300_VARIANT) { + if (IS_R300_VARIANT || IS_AVIVO_VARIANT) { BEGIN_ACCEL(1); OUT_ACCEL_REG(R300_VAP_VTX_SIZE, vtx_count); FINISH_ACCEL(); @@ -1198,7 +1232,7 @@ static void FUNC_NAME(RadeonComposite)(PixmapPtr pDst, RADEON_CP_VC_CNTL_VTX_FMT_RADEON_MODE | (4 << RADEON_CP_VC_CNTL_NUM_SHIFT)); } else { - if (IS_R300_VARIANT) + if (IS_R300_VARIANT || IS_AVIVO_VARIANT) BEGIN_RING(4 * vtx_count + 6); else BEGIN_RING(4 * vtx_count + 2); @@ -1211,7 +1245,7 @@ static void FUNC_NAME(RadeonComposite)(PixmapPtr pDst, } #else /* ACCEL_CP */ - if (IS_R300_VARIANT) + if (IS_R300_VARIANT || IS_AVIVO_VARIANT) BEGIN_ACCEL(3 + vtx_count * 4); else BEGIN_ACCEL(1 + vtx_count * 4); @@ -1241,7 +1275,7 @@ static void FUNC_NAME(RadeonComposite)(PixmapPtr pDst, xFixedToFloat(srcTopRight.x) / info->texW[0], xFixedToFloat(srcTopRight.y) / info->texH[0], xFixedToFloat(maskTopRight.x) / info->texW[1], xFixedToFloat(maskTopRight.y) / info->texH[1]); - if (IS_R300_VARIANT) { + if (IS_R300_VARIANT || IS_AVIVO_VARIANT) { OUT_ACCEL_REG(R300_RB3D_DSTCACHE_CTLSTAT, 0xA); OUT_ACCEL_REG(RADEON_WAIT_UNTIL, RADEON_WAIT_3D_IDLECLEAN); } |