diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/radeon_dri.c | 21 | ||||
| -rw-r--r-- | src/radeon_reg.h | 5 |
2 files changed, 22 insertions, 4 deletions
diff --git a/src/radeon_dri.c b/src/radeon_dri.c index 9fdc5b6c..0fc03e4a 100644 --- a/src/radeon_dri.c +++ b/src/radeon_dri.c @@ -820,11 +820,24 @@ static Bool RADEONSetAgpMode(RADEONInfoPtr info, ScreenPtr pScreen) } /* Initialize Radeon's AGP registers */ -static void RADEONSetAgpBase(RADEONInfoPtr info) +static void RADEONSetAgpBase(RADEONInfoPtr info, ScreenPtr pScreen) { + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; unsigned char *RADEONMMIO = info->MMIO; - OUTREG(RADEON_AGP_BASE, drmAgpBase(info->drmFD)); + /* drm already does this, so we can probably remove this. + * agp_base_2 ? + */ + if (info->ChipFamily == CHIP_FAMILY_RV515) + OUTMC(pScrn, RV515_MC_AGP_BASE, drmAgpBase(info->drmFD)); + else if ((info->ChipFamily >= CHIP_FAMILY_R520) && + (info->ChipFamily <= CHIP_FAMILY_RV570)) + OUTMC(pScrn, R520_MC_AGP_BASE, drmAgpBase(info->drmFD)); + else if ((info->ChipFamily == CHIP_FAMILY_RS690) || + (info->ChipFamily == CHIP_FAMILY_RS740)) + OUTMC(pScrn, RS690_MC_AGP_BASE, drmAgpBase(info->drmFD)); + else if (info->ChipFamily < CHIP_FAMILY_RV515) + OUTREG(RADEON_AGP_BASE, drmAgpBase(info->drmFD)); } /* Initialize the AGP state. Request memory for use in AGP space, and @@ -940,7 +953,7 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen) "[agp] GART Texture map mapped at 0x%08lx\n", (unsigned long)info->gartTex); - RADEONSetAgpBase(info); + RADEONSetAgpBase(info, pScreen); return TRUE; } @@ -1722,7 +1735,7 @@ void RADEONDRIResume(ScreenPtr pScreen) if (!RADEONSetAgpMode(info, pScreen)) return; - RADEONSetAgpBase(info); + RADEONSetAgpBase(info, pScreen); } _ret = drmCommandNone(info->drmFD, DRM_RADEON_CP_RESUME); diff --git a/src/radeon_reg.h b/src/radeon_reg.h index 08bf858f..a9f29067 100644 --- a/src/radeon_reg.h +++ b/src/radeon_reg.h @@ -3416,6 +3416,7 @@ #define RS690_MC_FB_LOCATION 0x100 #define RS690_MC_AGP_LOCATION 0x101 #define RS690_MC_AGP_BASE 0x102 +#define RS690_MC_AGP_BASE_2 0x103 #define RS690_MC_STATUS 0x90 #define RS690_MC_STATUS_IDLE (1 << 0) @@ -3438,10 +3439,14 @@ #define RV515_MC_FB_LOCATION 0x1 #define RV515_MC_AGP_LOCATION 0x2 +#define RV515_MC_AGP_BASE 0x3 +#define RV515_MC_AGP_BASE_2 0x4 #define RV515_MC_CNTL 0x5 # define RV515_MEM_NUM_CHANNELS_MASK 0x3 #define R520_MC_FB_LOCATION 0x4 #define R520_MC_AGP_LOCATION 0x5 +#define R520_MC_AGP_BASE 0x6 +#define R520_MC_AGP_BASE_2 0x7 #define R520_MC_CNTL0 0x8 # define R520_MEM_NUM_CHANNELS_MASK (0x3 << 24) # define R520_MEM_NUM_CHANNELS_SHIFT 24 |