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-rw-r--r--src/atombios_crtc.c10
-rw-r--r--src/radeon_output.c7
2 files changed, 16 insertions, 1 deletions
diff --git a/src/atombios_crtc.c b/src/atombios_crtc.c
index d513c139..fb7728fa 100644
--- a/src/atombios_crtc.c
+++ b/src/atombios_crtc.c
@@ -324,6 +324,16 @@ atombios_crtc_set_pll(xf86CrtcPtr crtc, DisplayModePtr mode)
else
pll_flags |= RADEON_PLL_PREFER_LOW_REF_DIV;
+ for (i = 0; i < xf86_config->num_output; i++) {
+ xf86OutputPtr output = xf86_config->output[i];
+ if (output->crtc == crtc) {
+ radeon_encoder = radeon_get_encoder(output);
+ /* DVO seems to want 2x pixel clock */
+ if (radeon_encoder && (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1))
+ sclock *= 2;
+ }
+ }
+
/* disable spread spectrum clocking for now -- thanks Hedy Lamarr */
if (radeon_crtc->crtc_id == 0) {
temp = INREG(AVIVO_P1PLL_INT_SS_CNTL);
diff --git a/src/radeon_output.c b/src/radeon_output.c
index a2523637..6e00ab8a 100644
--- a/src/radeon_output.c
+++ b/src/radeon_output.c
@@ -2634,16 +2634,21 @@ radeon_output_clones (ScrnInfoPtr pScrn, xf86OutputPtr output)
int index_mask = 0;
/* DIG routing gets problematic */
- if (IS_DCE32_VARIANT)
+ if (info->ChipFamily >= CHIP_FAMILY_R600)
return index_mask;
/* LVDS is too wacky */
if (radeon_output->devices & (ATOM_DEVICE_LCD_SUPPORT))
return index_mask;
+ /* TV requires very specific timing */
if (radeon_output->devices & (ATOM_DEVICE_TV_SUPPORT))
return index_mask;
+ /* DVO requires 2x ppll clocks depending on the tmds chip */
+ if (radeon_output->devices & (ATOM_DEVICE_DFP2_SUPPORT))
+ return index_mask;
+
for (o = 0; o < config->num_output; o++) {
xf86OutputPtr clone = config->output[o];
RADEONOutputPrivatePtr radeon_clone = clone->driver_private;