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-rw-r--r--src/radeon_exa_render.c30
-rw-r--r--src/radeon_reg.h1
-rw-r--r--src/radeon_textured_videofuncs.c27
3 files changed, 52 insertions, 6 deletions
diff --git a/src/radeon_exa_render.c b/src/radeon_exa_render.c
index 43d35558..e5c231fa 100644
--- a/src/radeon_exa_render.c
+++ b/src/radeon_exa_render.c
@@ -1180,10 +1180,10 @@ static Bool FUNC_NAME(R300TextureSetup)(PicturePtr pPict, PixmapPtr pPix,
int unit)
{
RINFO_FROM_SCREEN(pPix->drawable.pScreen);
- uint32_t txfilter, txformat0, txformat1, txoffset, txpitch;
+ uint32_t txfilter, txformat0, txformat1, txoffset, txpitch, us_format = 0;
int w = pPict->pDrawable->width;
int h = pPict->pDrawable->height;
- int i, pixel_shift;
+ int i, pixel_shift, out_size = 6;
unsigned int repeatType = pPict->repeat ? pPict->repeatType : RepeatNone;
struct radeon_exa_pixmap_priv *driver_priv;
ACCEL_PREAMBLE();
@@ -1230,6 +1230,26 @@ static Bool FUNC_NAME(R300TextureSetup)(PicturePtr pPict, PixmapPtr pPix,
if (IS_R500_3D && ((h - 1) & 0x800))
txpitch |= R500_TXHEIGHT_11;
+ if (info->ChipFamily == CHIP_FAMILY_R520) {
+ unsigned us_width = (w - 1) & 0x7ff;
+ unsigned us_height = (h - 1) & 0x7ff;
+ unsigned us_depth = 0;
+
+ if (w > 2048) {
+ us_width = (0x7ff + us_width) >> 1;
+ us_depth |= 0x0d;
+ }
+ if (h > 2048) {
+ us_height = (0x7ff + us_height) >> 1;
+ us_depth |= 0x0e;
+ }
+
+ us_format = (us_width << R300_TXWIDTH_SHIFT) |
+ (us_height << R300_TXHEIGHT_SHIFT) |
+ (us_depth << R300_TXDEPTH_SHIFT);
+ out_size++;
+ }
+
/* Use TXPITCH instead of TXWIDTH for address computations: we could
* omit this if there is no padding, but there is no apparent advantage
* in doing so.
@@ -1276,7 +1296,9 @@ static Bool FUNC_NAME(R300TextureSetup)(PicturePtr pPict, PixmapPtr pPix,
RADEON_FALLBACK(("Bad filter 0x%x\n", pPict->filter));
}
- BEGIN_ACCEL_RELOC(repeatType == RepeatNone ? 7 : 6, 1);
+ if (repeatType == RepeatNone)
+ out_size++;
+ BEGIN_ACCEL_RELOC(out_size, 1);
OUT_ACCEL_REG(R300_TX_FILTER0_0 + (unit * 4), txfilter);
OUT_ACCEL_REG(R300_TX_FILTER1_0 + (unit * 4), 0);
OUT_ACCEL_REG(R300_TX_FORMAT0_0 + (unit * 4), txformat0);
@@ -1287,6 +1309,8 @@ static Bool FUNC_NAME(R300TextureSetup)(PicturePtr pPict, PixmapPtr pPix,
if (repeatType == RepeatNone)
OUT_ACCEL_REG(R300_TX_BORDER_COLOR_0 + (unit * 4), 0);
+ if (info->ChipFamily == CHIP_FAMILY_R520)
+ OUT_ACCEL_REG(R500_US_FORMAT0_0 + (unit * 4), us_format);
FINISH_ACCEL();
if (pPict->transform != 0) {
diff --git a/src/radeon_reg.h b/src/radeon_reg.h
index e61c29d2..fbf15584 100644
--- a/src/radeon_reg.h
+++ b/src/radeon_reg.h
@@ -4688,6 +4688,7 @@
#define R300_TX_FORMAT0_2 0x4488
# define R300_TXWIDTH_SHIFT 0
# define R300_TXHEIGHT_SHIFT 11
+# define R300_TXDEPTH_SHIFT 22
# define R300_NUM_LEVELS_SHIFT 26
# define R300_NUM_LEVELS_MASK 0x
# define R300_TXPROJECTED (1 << 30)
diff --git a/src/radeon_textured_videofuncs.c b/src/radeon_textured_videofuncs.c
index a22c416a..84aba6f8 100644
--- a/src/radeon_textured_videofuncs.c
+++ b/src/radeon_textured_videofuncs.c
@@ -2661,11 +2661,11 @@ FUNC_NAME(R500PrepareTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
PixmapPtr pPixmap = pPriv->pPixmap;
struct radeon_exa_pixmap_priv *driver_priv;
struct radeon_bo *src_bo = pPriv->src_bo[pPriv->currentBuffer];
- uint32_t txfilter, txformat0, txformat1, txoffset, txpitch;
+ uint32_t txfilter, txformat0, txformat1, txoffset, txpitch, us_format = 0;
uint32_t dst_pitch, dst_format;
uint32_t txenable, colorpitch, bicubic_offset;
uint32_t output_fmt;
- int pixel_shift;
+ int pixel_shift, out_size = 6;
ACCEL_PREAMBLE();
#ifdef XF86DRM_MODE
@@ -2791,15 +2791,36 @@ FUNC_NAME(R500PrepareTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
if ((pPriv->h - 1) & 0x800)
txpitch |= R500_TXHEIGHT_11;
+ if (info->ChipFamily == CHIP_FAMILY_R520) {
+ unsigned us_width = (pPriv->w - 1) & 0x7ff;
+ unsigned us_height = (pPriv->h - 1) & 0x7ff;
+ unsigned us_depth = 0;
+
+ if (pPriv->w > 2048) {
+ us_width = (0x7ff + us_width) >> 1;
+ us_depth |= 0x0d;
+ }
+ if (pPriv->h > 2048) {
+ us_height = (0x7ff + us_height) >> 1;
+ us_depth |= 0x0e;
+ }
+ us_format = (us_width << R300_TXWIDTH_SHIFT) |
+ (us_height << R300_TXHEIGHT_SHIFT) |
+ (us_depth << R300_TXDEPTH_SHIFT);
+ out_size++;
+ }
+
txoffset = info->cs ? 0 : pPriv->src_offset;
- BEGIN_ACCEL_RELOC(6, 1);
+ BEGIN_ACCEL_RELOC(out_size, 1);
OUT_ACCEL_REG(R300_TX_FILTER0_0, txfilter);
OUT_ACCEL_REG(R300_TX_FILTER1_0, 0);
OUT_ACCEL_REG(R300_TX_FORMAT0_0, txformat0);
OUT_ACCEL_REG(R300_TX_FORMAT1_0, txformat1);
OUT_ACCEL_REG(R300_TX_FORMAT2_0, txpitch);
OUT_TEXTURE_REG(R300_TX_OFFSET_0, txoffset, src_bo);
+ if (info->ChipFamily == CHIP_FAMILY_R520)
+ OUT_ACCEL_REG(R500_US_FORMAT0_0, us_format);
FINISH_ACCEL();
txenable = R300_TEX_0_ENABLE;