summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
Diffstat (limited to 'src')
-rw-r--r--src/evergreen_accel.c69
1 files changed, 67 insertions, 2 deletions
diff --git a/src/evergreen_accel.c b/src/evergreen_accel.c
index f3691d76..b46e61de 100644
--- a/src/evergreen_accel.c
+++ b/src/evergreen_accel.c
@@ -70,7 +70,8 @@ evergreen_sq_setup(ScrnInfoPtr pScrn, sq_config_t *sq_conf)
RADEONInfoPtr info = RADEONPTR(pScrn);
if ((info->ChipFamily == CHIP_FAMILY_CEDAR) ||
- (info->ChipFamily == CHIP_FAMILY_PALM))
+ (info->ChipFamily == CHIP_FAMILY_PALM) ||
+ (info->ChipFamily == CHIP_FAMILY_CAICOS))
sq_config = 0;
else
sq_config = VC_ENABLE_bit;
@@ -499,7 +500,8 @@ evergreen_set_vtx_resource(ScrnInfoPtr pScrn, vtx_resource_t *res, uint32_t doma
/* flush vertex cache */
if ((info->ChipFamily == CHIP_FAMILY_CEDAR) ||
- (info->ChipFamily == CHIP_FAMILY_PALM))
+ (info->ChipFamily == CHIP_FAMILY_PALM) ||
+ (info->ChipFamily == CHIP_FAMILY_CAICOS))
evergreen_cp_set_surface_sync(pScrn, TC_ACTION_ENA_bit,
accel_state->vbo.vb_offset, accel_state->vbo.vb_mc_addr,
res->bo,
@@ -857,6 +859,69 @@ evergreen_set_default_state(ScrnInfoPtr pScrn)
sq_conf.num_hs_stack_entries = 42;
sq_conf.num_ls_stack_entries = 42;
break;
+ case CHIP_FAMILY_BARTS:
+ sq_conf.num_ps_gprs = 93;
+ sq_conf.num_vs_gprs = 46;
+ sq_conf.num_temp_gprs = 4;
+ sq_conf.num_gs_gprs = 31;
+ sq_conf.num_es_gprs = 31;
+ sq_conf.num_hs_gprs = 23;
+ sq_conf.num_ls_gprs = 23;
+ sq_conf.num_ps_threads = 128;
+ sq_conf.num_vs_threads = 20;
+ sq_conf.num_gs_threads = 20;
+ sq_conf.num_es_threads = 20;
+ sq_conf.num_hs_threads = 20;
+ sq_conf.num_ls_threads = 20;
+ sq_conf.num_ps_stack_entries = 85;
+ sq_conf.num_vs_stack_entries = 85;
+ sq_conf.num_gs_stack_entries = 85;
+ sq_conf.num_es_stack_entries = 85;
+ sq_conf.num_hs_stack_entries = 85;
+ sq_conf.num_ls_stack_entries = 85;
+ break;
+ case CHIP_FAMILY_TURKS:
+ sq_conf.num_ps_gprs = 93;
+ sq_conf.num_vs_gprs = 46;
+ sq_conf.num_temp_gprs = 4;
+ sq_conf.num_gs_gprs = 31;
+ sq_conf.num_es_gprs = 31;
+ sq_conf.num_hs_gprs = 23;
+ sq_conf.num_ls_gprs = 23;
+ sq_conf.num_ps_threads = 128;
+ sq_conf.num_vs_threads = 20;
+ sq_conf.num_gs_threads = 20;
+ sq_conf.num_es_threads = 20;
+ sq_conf.num_hs_threads = 20;
+ sq_conf.num_ls_threads = 20;
+ sq_conf.num_ps_stack_entries = 42;
+ sq_conf.num_vs_stack_entries = 42;
+ sq_conf.num_gs_stack_entries = 42;
+ sq_conf.num_es_stack_entries = 42;
+ sq_conf.num_hs_stack_entries = 42;
+ sq_conf.num_ls_stack_entries = 42;
+ break;
+ case CHIP_FAMILY_CAICOS:
+ sq_conf.num_ps_gprs = 93;
+ sq_conf.num_vs_gprs = 46;
+ sq_conf.num_temp_gprs = 4;
+ sq_conf.num_gs_gprs = 31;
+ sq_conf.num_es_gprs = 31;
+ sq_conf.num_hs_gprs = 23;
+ sq_conf.num_ls_gprs = 23;
+ sq_conf.num_ps_threads = 128;
+ sq_conf.num_vs_threads = 10;
+ sq_conf.num_gs_threads = 10;
+ sq_conf.num_es_threads = 10;
+ sq_conf.num_hs_threads = 10;
+ sq_conf.num_ls_threads = 10;
+ sq_conf.num_ps_stack_entries = 42;
+ sq_conf.num_vs_stack_entries = 42;
+ sq_conf.num_gs_stack_entries = 42;
+ sq_conf.num_es_stack_entries = 42;
+ sq_conf.num_hs_stack_entries = 42;
+ sq_conf.num_ls_stack_entries = 42;
+ break;
}
evergreen_sq_setup(pScrn, &sq_conf);