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-rw-r--r--src/radeon.h93
-rw-r--r--src/radeon_accel.c20
-rw-r--r--src/radeon_accelfuncs.c2
-rw-r--r--src/radeon_commonfuncs.c2
-rw-r--r--src/radeon_crtc.c4
-rw-r--r--src/radeon_dri.c6
-rw-r--r--src/radeon_driver.c24
7 files changed, 83 insertions, 68 deletions
diff --git a/src/radeon.h b/src/radeon.h
index 2348e7ce..626b492f 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -413,6 +413,28 @@ typedef struct {
int singledac;
} RADEONCardInfo;
+#ifdef XF86DRI
+struct radeon_cp {
+ Bool CPRuns; /* CP is running */
+ Bool CPInUse; /* CP has been used by X server */
+ Bool CPStarted; /* CP has started */
+ int CPMode; /* CP mode that server/clients use */
+ int CPFifoSize; /* Size of the CP command FIFO */
+ int CPusecTimeout; /* CP timeout in usecs */
+ Bool needCacheFlush;
+
+ /* CP accleration */
+ drmBufPtr indirectBuffer;
+ int indirectStart;
+
+ /* Debugging info for BEGIN_RING/ADVANCE_RING pairs. */
+ int dma_begin_count;
+ char *dma_debug_func;
+ int dma_debug_lineno;
+
+ };
+#endif
+
typedef struct {
EntityInfoPtr pEnt;
pciVideoPtr PciInfo;
@@ -600,12 +622,7 @@ typedef struct {
uint32_t pciCommand;
- Bool CPRuns; /* CP is running */
- Bool CPInUse; /* CP has been used by X server */
- Bool CPStarted; /* CP has started */
- int CPFifoSize; /* Size of the CP command FIFO */
- int CPusecTimeout; /* CP timeout in usecs */
- Bool needCacheFlush;
+ struct radeon_cp *cp;
/* CP ring buffer data */
unsigned long ringStart; /* Offset into GART space */
@@ -637,10 +654,6 @@ typedef struct {
drmAddress gartTex; /* Map */
int log2GARTTexGran;
- /* CP accleration */
- drmBufPtr indirectBuffer;
- int indirectStart;
-
/* DRI screen private data */
int fbX;
int fbY;
@@ -683,10 +696,6 @@ typedef struct {
int perctx_sarea_size;
#endif
- /* Debugging info for BEGIN_RING/ADVANCE_RING pairs. */
- int dma_begin_count;
- char *dma_debug_func;
- int dma_debug_lineno;
#endif /* XF86DRI */
/* XVideo */
@@ -1043,32 +1052,32 @@ do { \
xf86DrvMsg(pScrn->scrnIndex, X_ERROR, \
"%s: CP start %d\n", __FUNCTION__, _ret); \
} \
- info->CPStarted = TRUE; \
+ info->cp->CPStarted = TRUE; \
} while (0)
#define RADEONCP_RELEASE(pScrn, info) \
do { \
- if (info->CPInUse) { \
+ if (info->cp->CPInUse) { \
RADEON_PURGE_CACHE(); \
RADEON_WAIT_UNTIL_IDLE(); \
RADEONCPReleaseIndirect(pScrn); \
- info->CPInUse = FALSE; \
+ info->cp->CPInUse = FALSE; \
} \
} while (0)
#define RADEONCP_STOP(pScrn, info) \
do { \
int _ret; \
- if (info->CPStarted) { \
+ if (info->cp->CPStarted) { \
_ret = RADEONCPStop(pScrn, info); \
if (_ret) { \
xf86DrvMsg(pScrn->scrnIndex, X_ERROR, \
"%s: CP stop %d\n", __FUNCTION__, _ret); \
} \
- info->CPStarted = FALSE; \
+ info->cp->CPStarted = FALSE; \
} \
RADEONEngineRestore(pScrn); \
- info->CPRuns = FALSE; \
+ info->cp->CPRuns = FALSE; \
} while (0)
#define RADEONCP_RESET(pScrn, info) \
@@ -1082,14 +1091,14 @@ do { \
#define RADEONCP_REFRESH(pScrn, info) \
do { \
- if (!info->CPInUse) { \
- if (info->needCacheFlush) { \
+ if (!info->cp->CPInUse) { \
+ if (info->cp->needCacheFlush) { \
RADEON_PURGE_CACHE(); \
RADEON_PURGE_ZCACHE(); \
- info->needCacheFlush = FALSE; \
+ info->cp->needCacheFlush = FALSE; \
} \
RADEON_WAIT_UNTIL_IDLE(); \
- info->CPInUse = TRUE; \
+ info->cp->CPInUse = TRUE; \
} \
} while (0)
@@ -1113,33 +1122,33 @@ do { \
xf86DrvMsg(pScrn->scrnIndex, X_INFO, \
"BEGIN_RING(%d) in %s\n", (unsigned int)n, __FUNCTION__);\
} \
- if (++info->dma_begin_count != 1) { \
+ if (++info->cp->dma_begin_count != 1) { \
xf86DrvMsg(pScrn->scrnIndex, X_ERROR, \
"BEGIN_RING without end at %s:%d\n", \
- info->dma_debug_func, info->dma_debug_lineno); \
- info->dma_begin_count = 1; \
+ info->cp->dma_debug_func, info->cp->dma_debug_lineno); \
+ info->cp->dma_begin_count = 1; \
} \
- info->dma_debug_func = __FILE__; \
- info->dma_debug_lineno = __LINE__; \
- if (!info->indirectBuffer) { \
- info->indirectBuffer = RADEONCPGetBuffer(pScrn); \
- info->indirectStart = 0; \
- } else if (info->indirectBuffer->used + (n) * (int)sizeof(uint32_t) > \
- info->indirectBuffer->total) { \
+ info->cp->dma_debug_func = __FILE__; \
+ info->cp->dma_debug_lineno = __LINE__; \
+ if (!info->cp->indirectBuffer) { \
+ info->cp->indirectBuffer = RADEONCPGetBuffer(pScrn); \
+ info->cp->indirectStart = 0; \
+ } else if (info->cp->indirectBuffer->used + (n) * (int)sizeof(uint32_t) > \
+ info->cp->indirectBuffer->total) { \
RADEONCPFlushIndirect(pScrn, 1); \
} \
__expected = n; \
- __head = (pointer)((char *)info->indirectBuffer->address + \
- info->indirectBuffer->used); \
+ __head = (pointer)((char *)info->cp->indirectBuffer->address + \
+ info->cp->indirectBuffer->used); \
__count = 0; \
} while (0)
#define ADVANCE_RING() do { \
- if (info->dma_begin_count-- != 1) { \
+ if (info->cp->dma_begin_count-- != 1) { \
xf86DrvMsg(pScrn->scrnIndex, X_ERROR, \
"ADVANCE_RING without begin at %s:%d\n", \
__FILE__, __LINE__); \
- info->dma_begin_count = 0; \
+ info->cp->dma_begin_count = 0; \
} \
if (__count != __expected) { \
xf86DrvMsg(pScrn->scrnIndex, X_ERROR, \
@@ -1149,11 +1158,11 @@ do { \
if (RADEON_VERBOSE) { \
xf86DrvMsg(pScrn->scrnIndex, X_INFO, \
"ADVANCE_RING() start: %d used: %d count: %d\n", \
- info->indirectStart, \
- info->indirectBuffer->used, \
+ info->cp->indirectStart, \
+ info->cp->indirectBuffer->used, \
__count * (int)sizeof(uint32_t)); \
} \
- info->indirectBuffer->used += __count * (int)sizeof(uint32_t); \
+ info->cp->indirectBuffer->used += __count * (int)sizeof(uint32_t); \
} while (0)
#define OUT_RING(x) do { \
@@ -1175,7 +1184,7 @@ do { \
if (RADEON_VERBOSE) \
xf86DrvMsg(pScrn->scrnIndex, X_INFO, \
"FLUSH_RING in %s\n", __FUNCTION__); \
- if (info->indirectBuffer) { \
+ if (info->cp->indirectBuffer) { \
RADEONCPFlushIndirect(pScrn, 0); \
} \
} while (0)
diff --git a/src/radeon_accel.c b/src/radeon_accel.c
index e617fd5c..72866d19 100644
--- a/src/radeon_accel.c
+++ b/src/radeon_accel.c
@@ -624,8 +624,8 @@ drmBufPtr RADEONCPGetBuffer(ScrnInfoPtr pScrn)
void RADEONCPFlushIndirect(ScrnInfoPtr pScrn, int discard)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
- drmBufPtr buffer = info->indirectBuffer;
- int start = info->indirectStart;
+ drmBufPtr buffer = info->cp->indirectBuffer;
+ int start = info->cp->indirectStart;
drmRadeonIndirect indirect;
if (!buffer) return;
@@ -645,14 +645,14 @@ void RADEONCPFlushIndirect(ScrnInfoPtr pScrn, int discard)
&indirect, sizeof(drmRadeonIndirect));
if (discard) {
- info->indirectBuffer = RADEONCPGetBuffer(pScrn);
- info->indirectStart = 0;
+ info->cp->indirectBuffer = RADEONCPGetBuffer(pScrn);
+ info->cp->indirectStart = 0;
} else {
/* Start on a double word boundary */
- info->indirectStart = buffer->used = (buffer->used + 7) & ~7;
+ info->cp->indirectStart = buffer->used = (buffer->used + 7) & ~7;
if (RADEON_VERBOSE) {
xf86DrvMsg(pScrn->scrnIndex, X_INFO, " Starting at %d\n",
- info->indirectStart);
+ info->cp->indirectStart);
}
}
}
@@ -661,12 +661,12 @@ void RADEONCPFlushIndirect(ScrnInfoPtr pScrn, int discard)
void RADEONCPReleaseIndirect(ScrnInfoPtr pScrn)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
- drmBufPtr buffer = info->indirectBuffer;
- int start = info->indirectStart;
+ drmBufPtr buffer = info->cp->indirectBuffer;
+ int start = info->cp->indirectStart;
drmRadeonIndirect indirect;
- info->indirectBuffer = NULL;
- info->indirectStart = 0;
+ info->cp->indirectBuffer = NULL;
+ info->cp->indirectStart = 0;
if (!buffer) return;
diff --git a/src/radeon_accelfuncs.c b/src/radeon_accelfuncs.c
index 56793cd0..f83579fb 100644
--- a/src/radeon_accelfuncs.c
+++ b/src/radeon_accelfuncs.c
@@ -666,7 +666,7 @@ FUNC_NAME(RADEONSubsequentColor8x8PatternFillRect)(ScrnInfoPtr pScrn,
#endif
#ifdef ACCEL_CP
-#define CP_BUFSIZE (info->indirectBuffer->total/4-10)
+#define CP_BUFSIZE (info->cp->indirectBuffer->total/4-10)
/* Helper function to write out a HOSTDATA_BLT packet into the indirect
* buffer and set the XAA scratch buffer address appropriately.
diff --git a/src/radeon_commonfuncs.c b/src/radeon_commonfuncs.c
index 1de6bf83..00def667 100644
--- a/src/radeon_commonfuncs.c
+++ b/src/radeon_commonfuncs.c
@@ -686,7 +686,7 @@ void FUNC_NAME(RADEONWaitForIdle)(ScrnInfoPtr pScrn)
#ifdef ACCEL_CP
/* Make sure the CP is idle first */
- if (info->CPStarted) {
+ if (info->cp->CPStarted) {
int ret;
FLUSH_RING();
diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c
index 5ab00c1f..9eb94481 100644
--- a/src/radeon_crtc.c
+++ b/src/radeon_crtc.c
@@ -367,7 +367,7 @@ radeon_crtc_lock(xf86CrtcPtr crtc)
RADEONInfoPtr info = RADEONPTR(pScrn);
#ifdef XF86DRI
- if (info->CPStarted && pScrn->pScreen) {
+ if (info->cp->CPStarted && pScrn->pScreen) {
DRILock(pScrn->pScreen, 0);
if (info->accelOn)
RADEON_SYNC(info, pScrn);
@@ -388,7 +388,7 @@ radeon_crtc_unlock(xf86CrtcPtr crtc)
RADEONInfoPtr info = RADEONPTR(pScrn);
#ifdef XF86DRI
- if (info->CPStarted && pScrn->pScreen) DRIUnlock(pScrn->pScreen);
+ if (info->cp->CPStarted && pScrn->pScreen) DRIUnlock(pScrn->pScreen);
#endif
if (info->accelOn)
diff --git a/src/radeon_dri.c b/src/radeon_dri.c
index a192811f..c0b809cd 100644
--- a/src/radeon_dri.c
+++ b/src/radeon_dri.c
@@ -364,7 +364,7 @@ static void RADEONEnterServer(ScreenPtr pScreen)
pSAREAPriv = DRIGetSAREAPrivate(pScrn->pScreen);
if (pSAREAPriv->ctxOwner != DRIGetContext(pScrn->pScreen)) {
info->XInited3D = FALSE;
- info->needCacheFlush = (info->ChipFamily >= CHIP_FAMILY_R300);
+ info->cp->needCacheFlush = (info->ChipFamily >= CHIP_FAMILY_R300);
}
#ifdef DAMAGE
@@ -1106,7 +1106,7 @@ static int RADEONDRIKernelInit(RADEONInfoPtr info, ScreenPtr pScreen)
drmInfo.cp_mode = RADEON_CSQ_PRIBM_INDBM;
drmInfo.gart_size = info->gartSize*1024*1024;
drmInfo.ring_size = info->ringSize*1024*1024;
- drmInfo.usec_timeout = info->CPusecTimeout;
+ drmInfo.usec_timeout = info->cp->CPusecTimeout;
drmInfo.fb_bpp = info->CurrentLayout.pixel_code;
drmInfo.depth_bpp = (info->depthBits - 8) * 2;
@@ -1897,7 +1897,7 @@ static void RADEONDRIRefreshArea(ScrnInfoPtr pScrn, RegionPtr pReg)
RegionRec region;
BoxPtr pbox;
- if (!info->directRenderingInited || !info->CPStarted)
+ if (!info->directRenderingInited || !info->cp->CPStarted)
return;
/* Don't want to do this when no 3d is active and pages are
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index 45d2c2f2..3e3d0b52 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -2107,11 +2107,17 @@ static Bool RADEONPreInitDRI(ScrnInfoPtr pScrn)
info->directRenderingEnabled = FALSE;
info->directRenderingInited = FALSE;
- info->CPInUse = FALSE;
- info->CPStarted = FALSE;
info->pLibDRMVersion = NULL;
info->pKernelDRMVersion = NULL;
+ if (!(info->cp = xcalloc(1, sizeof(struct radeon_cp)))) {
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR,"Unable to allocate cp rec!\n");
+ return FALSE;
+ }
+ info->cp->CPInUse = FALSE;
+ info->cp->CPStarted = FALSE;
+ info->cp->CPusecTimeout = RADEON_DEFAULT_CP_TIMEOUT;
+
if (xf86IsEntityShared(info->pEnt->index)) {
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"Direct Rendering Disabled -- "
@@ -2193,7 +2199,7 @@ static Bool RADEONPreInitDRI(ScrnInfoPtr pScrn)
info->bufSize = RADEON_DEFAULT_BUFFER_SIZE;
info->gartTexSize = RADEON_DEFAULT_GART_TEX_SIZE;
info->pciAperSize = RADEON_DEFAULT_PCI_APER_SIZE;
- info->CPusecTimeout = RADEON_DEFAULT_CP_TIMEOUT;
+ info->cp->CPusecTimeout = RADEON_DEFAULT_CP_TIMEOUT;
if ((xf86GetOptValInteger(info->Options,
OPTION_GART_SIZE, (int *)&(info->gartSize))) ||
@@ -2271,7 +2277,7 @@ static Bool RADEONPreInitDRI(ScrnInfoPtr pScrn)
info->gartTexSize = info->gartSize - (info->ringSize + info->bufSize);
if (xf86GetOptValInteger(info->Options, OPTION_USEC_TIMEOUT,
- &(info->CPusecTimeout))) {
+ &(info->cp->CPusecTimeout))) {
/* This option checked by the RADEON DRM kernel module */
}
@@ -3008,7 +3014,7 @@ static void RADEONLoadPalette(ScrnInfoPtr pScrn, int numColors,
int c;
#ifdef XF86DRI
- if (info->CPStarted && pScrn->pScreen) DRILock(pScrn->pScreen, 0);
+ if (info->cp->CPStarted && pScrn->pScreen) DRILock(pScrn->pScreen, 0);
#endif
if (info->accelOn && pScrn->pScreen)
@@ -3072,7 +3078,7 @@ static void RADEONLoadPalette(ScrnInfoPtr pScrn, int numColors,
}
#ifdef XF86DRI
- if (info->CPStarted && pScrn->pScreen) DRIUnlock(pScrn->pScreen);
+ if (info->cp->CPStarted && pScrn->pScreen) DRIUnlock(pScrn->pScreen);
#endif
}
@@ -5111,7 +5117,7 @@ Bool RADEONSwitchMode(int scrnIndex, DisplayModePtr mode, int flags)
Bool tilingOld = info->tilingEnabled;
Bool ret;
#ifdef XF86DRI
- Bool CPStarted = info->CPStarted;
+ Bool CPStarted = info->cp->CPStarted;
if (CPStarted) {
DRILock(pScrn->pScreen, 0);
@@ -5356,7 +5362,7 @@ void RADEONAdjustFrame(int scrnIndex, int x, int y, int flags)
xf86CrtcPtr crtc = output->crtc;
#ifdef XF86DRI
- if (info->CPStarted && pScrn->pScreen) DRILock(pScrn->pScreen, 0);
+ if (info->cp->CPStarted && pScrn->pScreen) DRILock(pScrn->pScreen, 0);
#endif
if (info->accelOn)
@@ -5373,7 +5379,7 @@ void RADEONAdjustFrame(int scrnIndex, int x, int y, int flags)
#ifdef XF86DRI
- if (info->CPStarted && pScrn->pScreen) DRIUnlock(pScrn->pScreen);
+ if (info->cp->CPStarted && pScrn->pScreen) DRIUnlock(pScrn->pScreen);
#endif
}
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-22 22:18:35 +0000