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-rw-r--r--src/radeon_driver.c17
-rw-r--r--src/radeon_reg.h1
2 files changed, 18 insertions, 0 deletions
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index 6c9d9d53..ed262bb3 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -2203,6 +2203,7 @@ static void
RADEONSetFBLocation(ScrnInfoPtr pScrn)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
+ RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
unsigned char *RADEONMMIO = info->MMIO;
CARD32 mc_fb_location;
CARD32 mc_agp_location = INREG(RADEON_MC_AGP_LOCATION);
@@ -2265,6 +2266,22 @@ RADEONSetFBLocation(ScrnInfoPtr pScrn)
if (info->HasCRTC2)
OUTREG(RADEON_DISPLAY2_BASE_ADDR, info->fbLocation);
OUTREG(RADEON_OV0_BASE_ADDR, info->fbLocation);
+
+
+ /* Set display0/1 priority up on r3/4xx in the memory controller for
+ * high res modes if the user specifies HIGH for displaypriority
+ * option.
+ */
+ if ((info->DispPriority == 2) && IS_R300_VARIANT) {
+ CARD32 mc_init_misc_lat_timer = INREG(R300_MC_INIT_MISC_LAT_TIMER);
+ if (info->MergedFB || pRADEONEnt->HasSecondary) {
+ mc_init_misc_lat_timer |= 0x1100; /* display 0 and 1 */
+ } else {
+ mc_init_misc_lat_timer |= 0x0100; /* display 0 only */
+ }
+ OUTREG(R300_MC_INIT_MISC_LAT_TIMER, mc_init_misc_lat_timer);
+ }
+
}
static void RADEONGetVRamType(ScrnInfoPtr pScrn)
diff --git a/src/radeon_reg.h b/src/radeon_reg.h
index 4048fecc..5958c1cf 100644
--- a/src/radeon_reg.h
+++ b/src/radeon_reg.h
@@ -816,6 +816,7 @@
#define RADEON_DISPLAY2_BASE_ADDR 0x33c
#define RADEON_OV0_BASE_ADDR 0x43c
#define RADEON_NB_TOM 0x15c
+#define R300_MC_INIT_MISC_LAT_TIMER 0x180
#define RADEON_MCLK_CNTL 0x0012 /* PLL */
# define RADEON_FORCEON_MCLKA (1 << 16)
# define RADEON_FORCEON_MCLKB (1 << 17)