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2011-12-06radeon: refine always tiled depth checkDave Airlie
So it appears the M7 family always tiles its depth buffer also. Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-12-05radeon: r200 depth buffers are always tiledDave Airlie
When we do the allocations we need to make sure the always tiled nature is taken into account. Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-12-05Xv: Evergreen+ asics support 16k surfacesAlex Deucher
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2011-12-01radeon: add some new pci idsAlex Deucher
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2011-11-28fixup xinerama since 9151f3b1c2ebcc34e63195888ba696f2183ba5e2Dave Airlie
since the driver would call RRFirstOutput without checking if randr has been enabled, and it would crash in privates code. reported by vereteran on #radeon Signed-off-by: Dave Airlie <airlied@redhat.com> Acked-on-irc-by: Michel Dänzer <michel.daenzer@amd.com>
2011-11-21ddx/evergreen: Fix endian of ALU constantsBenjamin Herrenschmidt
The constants are written directly into a buffer object shared with the card and we "forget" to swap them. This patch fixes it by doing the swap in evergreen_set_alu_consts() in-place (ie, it modifies the buffer), which should be fine with the way we use it in the ddx. This makes everything work fine on my caicos card on a G5 including some quik tests with Xv, gnome3 shell, etc... Thanks a lot to Jerome Glisse for holding my hand through debugging that (and finding the actual bug). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2011-11-14radeon: add missing FireMV pci idAlex Deucher
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2011-11-11ati: enable bg none when fbcon succeeds and we are built against ABI after 10.Dave Airlie
One less patch to keep carrying in Fedora. Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-11-08UMS: Guard references to PCITAG / pciTag with XSERVER_LIBPCIACCESS (bug #42690)Michel Dänzer
Should fix https://bugs.freedesktop.org/show_bug.cgi?id=42690 . Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
2011-11-04DRI/DRI2: remove hard-coded limitation to 6 crtcsIlija Hadzic
DRM's hard limit to the number of CRTCs is 32. ATI DDX unnecessarily clips this limit to 6 by hard coding initial assumption for output->possible_crtcs mask to 0x7f (before it gets trimmed down to what's really possible for a given output) and by allocating only 6 entries for for cursor_bo[] array in RADEONInfoRec. Fix this and thus allow the ATI DDX to deal with as many CRTCs as the DRM allows (32), so it is ready if anything with >6 CRTCs comes out. Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com>
2011-11-04Turn compile time check into runtime check.Michel Dänzer
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
2011-11-04check for xserver 1.9.4.901 to enable tiling by defaultAlex Deucher
Previous xservers had a bug in the EXA code which caused display corruption in some cases. See: https://bugs.freedesktop.org/show_bug.cgi?id=33929 Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2011-11-02Bump version post release.Michel Dänzer
2011-11-02Bump version for 6.14.3 release.xf86-video-ati-6.14.3Michel Dänzer
2011-11-01Build fix for -Werror=int-to-pointer-castJeremy Huddleston
Signed-off-by: Jeremy Huddleston <jeremyhu@apple.com>
2011-10-31radeon: do not include xf86PciInfo.hTormod Volden
We already use atipciids.h instead most places. Signed-off-by: Tormod Volden <debian.tormod@gmail.com>
2011-10-29Use malloc/calloc/realloc/free directlyJeremy Huddleston
Signed-off-by: Jeremy Huddleston <jeremyhu@apple.com>
2011-10-27EXA >= R6xx / KMS: Avoid running out of CS space at inconvenient times.Michel Dänzer
Otherwise we may end up with things not properly set up at the beginning of the next CS. Fixes http://bugs.debian.org/645007 . In contrast to the Composite code for < R6xx, this isn't necessary with UMS, as the draw packet only uses constant space in the indirect buffer, and nothing else can mess with the 3D state between indirect buffers. Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2011-10-27EXA < R6xx: Make sure 2D state is re-emitted after running out of CS space.Michel Dänzer
Otherwise it's basically luck what the 2D state ends up being at the beginning of the next CS. Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
2011-10-25Make radeon_dri2_create_buffer(s) more robust. (Bug #30047)Michel Dänzer
In particular, handle and propagate failure to allocate GPU accessible memory, instead of crashing. Fixes https://bugs.freedesktop.org/show_bug.cgi?id=30047 . Also take care not to leak resources in error paths. Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
2011-10-20radeon/kms: fallback to vesa if GPU is not supported by UMSJerome Glisse
For GPU not supported by UMS, test in probe so that we properly fallback to vesa. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2011-10-19dri2: Add vdpau driver name entryMaarten Lankhorst
libvdpau has a driver loading mechanism that looks for a dri2 driver first before falling back to nvidia, so lets use that. Allows use of libvdpau_rx00 without having to set things up separately, similar to the patch to xf86-video-nouveau. Signed-off-by: Maarten Lankhorst <m.b.lankhorst@gmail.com> Reviewed-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Michel Dänzer <michel@daenzer.net> Tested-by: Michel Dänzer <michel@daenzer.net>
2011-09-22UMS: fix DDIA enable on some rs690 systemsAlex Deucher
DVOOutputControl checks the value of of bios scratch reg 3 on some tables and assumes the encoder is already enabled if the DFP2_ACTIVE bit is set. Clear that bit so the table sets the DDIA enable bit properly. Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2011-09-20Only call radeon_dri2_close_screen() if DRI2 was enabled.Michel Dänzer
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
2011-09-20Remove dead variable remain_size_bytes.Michel Dänzer
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
2011-09-20KMS Color Tiling requires xserver which supports EXA_MIXED_PIXMAPS.Michel Dänzer
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
2011-09-17man: note that the list of marketing names is non-exhaustiveAlex Deucher
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2011-09-15update man page with new marking namesAlex Deucher
Note that the driver support all currently shipping asics and the names in the man page are just a sampling. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=40808 Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2011-08-18Convert register ranges for >= r6xx from enums to defines.Michel Dänzer
Avoids lots of "comparison between 'enum <anonymous>' and 'enum <anonymous>'" warnings with newer versions of gcc. See https://bugs.freedesktop.org/show_bug.cgi?id=38238 . Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
2011-08-17Bail if we're trying to start up in UMS mode on KMS.Michel Dänzer
Ideally, the display manager will start the X server again, and everything will be fine and dandy. But in the worst case, at least we won't hit the hardware behind the KMS driver's back. (This change intentionally makes (ab)use of the fact that Bool is defined as int). Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2011-08-11video: Don't round up bottom/right edge for clipping source width/height.Michel Dänzer
It's not necessary: If the top/left edge was rounded down, this will be compensated by the subtraction. Worse, if the original source width/height is odd, rounding up may result in reading past the end of the source data. Fixes http://bugs.debian.org/637258 . Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2011-08-10Change my e-mail address to something that still works, and always will, I hope.Michel Dänzer
2011-08-09Prefer the CRTC of the primary output for synchronization.Michel Dänzer
See https://bugs.freedesktop.org/show_bug.cgi?id=39696 . Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
2011-08-03r5xx+: Fix vline setup with crtc offsetsAlex Deucher
On r5xx+, vline is relative to to the viewport, not the scanlines. Based on initial patch and investigation from Herbert Pötzl (Bertl) on IRC. Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2011-08-01kms: fix possible leak in pageflip codeAlex Deucher
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2011-08-01kms: Move flip_count and co. to a per swap structureVille Syrjala
If multiple drawables are doing page flipping, the global drmmode structure can't be used to keep per swap information. For example flip_count can increase prematurely due to another swap request, and then the previous swap request never gets completed, leading to a stuck client. Move the relevant pieces of data to a strucuture that gets allocated once per swap request and shared by all involved CRTCs. Signed-off-by: Ville Syrjala <syrjala@sci.fi>
2011-08-01dri2: Update front buffer pixmap and name before exchanging buffersVille Syrjala
Buffer exchange assumes that the front buffer pixmap and name information is accurate. That may not be the case eg. if the window has been (un)redirected since the buffer was created. Signed-off-by: Ville Syrjala <syrjala@sci.fi>
2011-07-15radeon: add some new NI pci idsAlex Deucher
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2011-07-14Register XvMC video decoding accelerationChristian König
2011-07-12evergreen: Emit SQ_LDS_RESOURCE_MGMTDave Airlie
Avoids rendering problems when compute changes this reg. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=39119 Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2011-06-22evergreen: fix num_banks for 2D tiling configAlex Deucher
The field is encoded. Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2011-06-17dri2: fix copy pasto in a6154c00c64932332e8f6e334661ffd579cfd894Alex Deucher
Reported-by: Nils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2011-06-16dri2: missing bit from a6154c00c64932332e8f6e334661ffd579cfd894Alex Deucher
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2011-06-16dri2/eg+: fix size and alignment of depth/stencil buffersAlex Deucher
Base alignment may be 256B or 512B depending on the group size. Also need to check against front size for virtualX. Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2011-06-13kms/man: update ColorTiling infoAlex Deucher
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2011-06-13kms: enable ColorTiling by default on r6xx-cayman asicsAlex Deucher
Currently only 1D tiling as 2D tiling still has some corner cases to fix up. Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2011-05-31radeon: add llano pci idsAlex Deucher
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2011-05-31radeon: add support for llano APUsAlex Deucher
- KMS only - Includes full EXA/Xv support Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2011-05-27bump version after releaseDave Airlie
2011-05-26radeon: bump version for release of 6.14.2xf86-video-ati-6.14.2Dave Airlie
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