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path: root/src/evergreen_textured_videofuncs.c
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2018-07-09Add struct radeon_bufferMichel Dänzer
Inspired by amdgpu, preparation for the following change. For now, this is mostly a wrapper around struct radeon_bo, no functional change intended. Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2013-10-01EXA/evergreen: Paranoia around linear tiling. (v2)Christopher James Halse Rogers
The last two bytes of tiling_mode contain the actual tiling mode; the rest are extra tiling configuration bits. These configuration bits are not necessarily zero for a linear buffer, so mask them out before checking for linearity v2: Also fix up evergreen_textured_videofuncs.c agd5f: remove trailing whitespace Signed-off-by: Christopher James Halse Rogers <raof@ubuntu.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-01-03video: add option to include disabled CRTCs in best CRTC searchIlija Hadzic
This patch adds an option called consider_disabled to radeon_pick_best_crtc function. If this option is set and searching for best-fit CRTC yields nothing, the search will be widened to include CRTCs in DPMS "off" state. The new option is not used yet; it will be in the patches to follow. v2: Do not look at the CRTC mode, we only care about its box. Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2012-12-11Remove dead code flagged by gcc -Wunused-but-set-variable.Michel Dänzer
Reviewed-by: Alex Deucher <aleander.deucher@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
2012-06-15radeon: drop vb_mc_addr, not needed anymoreDave Airlie
This field is totally unused now, so drop it. Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-06-15radeon: drop offset member of r600 accel objectDave Airlie
This is always 0 now. Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-06-15radeon: drop all UMS/DRI1/XAA/overlay support.Dave Airlie
This overhauls the radeon driver and removes all the old UMS-only code, it drops all the UMS, DRI1, XAA, overlay Xv, video capture, tv tuners There are probably a lot more cleanups that will fall out of this afterwards. So far this is compile/build tested. Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-11radeon: use GB_GR and BG_RG formats for packed yuv video for r600+Roland Scheidegger
Those formats were invented for exactly that purpose so use them. This saves some code and also some hw resources (only need one sampler instead of two for packed yuv). Only tested on EG.
2012-05-11radeon: avoid rounding errors in texture coords for textured xv on EG+Roland Scheidegger
make sure the division is done with floats, otherwise the coordinate can be wrong up to 1 texel. Particularly visible with clipping and small source scaled up (since one texel can be a shift of several pixels) but could be seen even unscaled. Should provide more accurate coords without clipping too depending on the scale factor probably. This is a straight port of 688c8a54a00b01e73a11970ad2abe858f8c7c5c4 when I apparently forgot the eg code...
2012-02-08evergreen: Initialize source surface member for textured video.Michel Dänzer
Fixes crash reported by Ole Salscheider on IRC. Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
2012-02-07radeon: fix tiling for weird resolutionJerome Glisse
Should also fix xv for some case. Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2012-02-06r600-evergreen: use common surface allocator for tiling v11Jerome Glisse
Use libdrm common surface code so mesa,ddx have same idea about tiling surface and what their pitch should be and the alignment constraint. v2 fix remaining issue add new option to conditionaly enable v3 fix fbcon copy and r600 exa copy path v4 fix non tiled path 2D tiling on GPU >= R600, set it to false as default v5 adapt to pixel/element size split of libdrm/radeon v6 update to properly handle falling back to 1d tiled v6 final fix to tile split value on evergreen and newer v7 fix default array mode on r6xx, fix height alignment issue on evergreen v8 fix tile split value v9 add stencil tile split support, simplify dri2 for stencil with evergreen v10 Try to fix xv path regarding tiling. Adapt to libdrm API change. Try to fix case where there is no surface which means non tiled bo. v11 check for proper libdrm Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2011-11-21ddx/evergreen: Fix endian of ALU constantsBenjamin Herrenschmidt
The constants are written directly into a buffer object shared with the card and we "forget" to swap them. This patch fixes it by doing the swap in evergreen_set_alu_consts() in-place (ie, it modifies the buffer), which should be fine with the way we use it in the ddx. This makes everything work fine on my caicos card on a G5 including some quik tests with Xv, gnome3 shell, etc... Thanks a lot to Jerome Glisse for holding my hand through debugging that (and finding the actual bug). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2011-05-24cayman: enable all accelDave Airlie
2011-05-24kms/cayman: stub out exa supportAlex Deucher
Just fallbacks for now. Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2011-04-20EXA/Xv: used cached bo tiling flags for accel setup on 6xx+Alex Deucher
This avoids calling into the kernel for each bo in the accel code. This is a follow on to: cc7d1fa39da40a532fcdbe6c7924ca47a879e66a Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2011-02-16kms: EXA/Xv tiling fixesAlex Deucher
- properly set tiling flags for temp surfaces - fix CB non_disp_tiling bits on evergreen Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2011-02-11kms: evergreen/ni big endian accel supportAlex Deucher
Based on 6xx/7xx patches from Cédric Cano. Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2011-02-11Xv: fix textured video alignment harderAlex Deucher
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2011-02-10remove EVERGREENSetAccelState()Alex Deucher
It was a duplicate of the R600 variant. Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2011-02-106xx+: switch to linear aligned rather than linear generalAlex Deucher
linear aligned is supposedly more performant, but more importantly, linear general only works on the CB without slices. The texture blocks technically don't support linear general although, I think linear general gets upgraded to linear aligned in the hw which is why it currently works. Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2011-02-10evergreen/NI: consolidate spi setupAlex Deucher
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2011-02-10evergreen/ni: consolidate CB state handlingAlex Deucher
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2011-01-21evergreen: use vb_offset rather than vb_start_op for cbuf offsetAlex Deucher
2011-01-20evergreen/ni: fix Xv artifactsAlex Deucher
Port of the 6xx/7xx fix to evergreen. Bad texture size for texture cache flush.
2010-10-07fix the non-kms buildAlex Deucher
Should fix: https://bugs.freedesktop.org/show_bug.cgi?id=30685
2010-09-03evergreen: fix XvAlex Deucher
VS const buffer offset was wrong. fixes: https://bugs.freedesktop.org/show_bug.cgi?id=29788
2010-08-24evergreen Xv: remove stray line that caused a segfaultAlex Deucher
fixes: https://bugs.freedesktop.org/show_bug.cgi?id=29788
2010-08-23evergreen: use vbo pool for constant buffersAlex Deucher
2010-08-23radeon: move vbo data to a separate structAlex Deucher
this way we can share the vbo code with const buffers
2010-08-20Add initial EXA and Xv support for evergreenAlex Deucher
Based on the r6xx/r7xx code updated for evergreen. Still causes GPU hangs in some cases. We haven't tracked down why yet. Might be related to constant buffer persistence. Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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