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path: root/src/r6xx_accel.c
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2016-06-01EXA/6xx/7xx: accelerate PictOpOver with component alphaTan Hu
Subpixel text rendering is typically done with a solid src and a pixmap mask. Traditionally, this cannot be accelerated in a single pass and requires two passes [1]. However, we can cheat a little with a constant blend color. We can use: const.A = src.A / src.A const.R = src.R / src.A const.G = src.G / src.A const.B = src.B / src.A dst.A = const.A * (src.A * mask.A) + (1 - (src.A * mask.A)) * dst.A dst.R = const.R * (src.A * mask.R) + (1 - (src.A * mask.R)) * dst.R dst.G = const.G * (src.A * mask.G) + (1 - (src.A * mask.G)) * dst.G dst.B = const.B * (src.A * mask.B) + (1 - (src.A * mask.B)) * dst.B This only needs a single source value. src.A is cancelled down in the right places. [1] http://anholt.livejournal.com/32058.html r6xx still be used on some machine, Ported from commit 4375a6e75e5d41139be7031a0dee58c057ecbd07. Signed-off-by: Tan Hu <tan.hu@zte.com.cn> Reviewed-by: Grigori Goronzy <greg@chown.ath.cx>
2014-08-12radeon: drop redundant radeon_drm.h includesAndreas Boll
Already included via radeon.h. Signed-off-by: Andreas Boll <andreas.boll.dev@gmail.com>
2012-06-15radeon: drop vb_mc_addr, not needed anymoreDave Airlie
This field is totally unused now, so drop it. Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-06-15radeon: drop offset member of r600 accel objectDave Airlie
This is always 0 now. Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-06-15radeon: drop all UMS/DRI1/XAA/overlay support.Dave Airlie
This overhauls the radeon driver and removes all the old UMS-only code, it drops all the UMS, DRI1, XAA, overlay Xv, video capture, tv tuners There are probably a lot more cleanups that will fall out of this afterwards. So far this is compile/build tested. Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-07r6xx: initialize SX_MISCMarek Olšák
If Mesa set it to 1, the DDX would not render anything = the monitor would basically freeze. agd5f: update emit count as well. Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2012-02-06r600-evergreen: use common surface allocator for tiling v11Jerome Glisse
Use libdrm common surface code so mesa,ddx have same idea about tiling surface and what their pitch should be and the alignment constraint. v2 fix remaining issue add new option to conditionaly enable v3 fix fbcon copy and r600 exa copy path v4 fix non tiled path 2D tiling on GPU >= R600, set it to false as default v5 adapt to pixel/element size split of libdrm/radeon v6 update to properly handle falling back to 1d tiled v6 final fix to tile split value on evergreen and newer v7 fix default array mode on r6xx, fix height alignment issue on evergreen v8 fix tile split value v9 add stencil tile split support, simplify dri2 for stencil with evergreen v10 Try to fix xv path regarding tiling. Adapt to libdrm API change. Try to fix case where there is no surface which means non tiled bo. v11 check for proper libdrm Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2012-02-01Fix vline range calculations.Michel Dänzer
The range passed in is in pixmap coordinates, so the CRTC offset needs to be added to the clamping limits and subtracted from the clamped range for pre-AVIVO display engines. Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2012-02-01Check for empty vline ranges after clamping.Michel Dänzer
The clamping could turn a previously non-empty range into an empty one. Also, start == stop means the range is empty. Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2011-08-03r5xx+: Fix vline setup with crtc offsetsAlex Deucher
On r5xx+, vline is relative to to the viewport, not the scanlines. Based on initial patch and investigation from Herbert Pötzl (Bertl) on IRC. Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2011-02-11kms: 6xx/7xx big endian accel supportCédric Cano
agd5f: minor cleanups Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2011-02-106xx/7xx: consolidate spi setupAlex Deucher
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2011-02-106xx/7xx: consolidate remaining CB stateAlex Deucher
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2011-01-21vbo: remove useless radeon_vb_discard()Alex Deucher
We already reset vb_start_op to -1 in the UMS/KMS ib discard functions.
2010-10-04Merge branch 'evergreen_accel' of ↵Alex Deucher
git+ssh://git.freedesktop.org/git/xorg/driver/xf86-video-ati
2010-09-01r6xx/r7xx: fix typosAlex Deucher
some stray - signs
2010-08-23radeon: move vbo data to a separate structAlex Deucher
this way we can share the vbo code with const buffers
2010-08-20Add initial EXA and Xv support for evergreenAlex Deucher
Based on the r6xx/r7xx code updated for evergreen. Still causes GPU hangs in some cases. We haven't tracked down why yet. Might be related to constant buffer persistence. Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2010-08-05r6xx/r7xx: add support for tiling with kms (v3)Alex Deucher
Requires radeon drm 2.6.0 and updated mesa. v2: - fix lockup due to not emiting DB_DEPTH_INFO https://bugs.freedesktop.org/show_bug.cgi?id=28342 - fix drm minor version to deal with evergreen accel v3: rebase on current ddx git Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2010-08-02r6xx/r7xx: move syrface sync emit to the functions that emit surface infoAlex Deucher
reduces code duplication.
2010-08-02r6xx/r7xx: set VGT_MAX_VTX_INDX to a larger valueAlex Deucher
2010-08-01radeon/r600: restructure exa + vbo to provide more sharingDave Airlie
This is a precursor for r300/500 vbo support. Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-07-07fix build on non-kmsDave Airlie
2010-06-21r6xx/r7xx: fix ums cmd buffer leakWolfram
Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=27957
2010-06-21r6xx/r7xx: fix miscount in state emitAlex Deucher
2010-06-21r6xx/r7xx accel: add back some additional default stateAlex Deucher
This adds back everything removed in c29157bbf5b0dd26857675282ab094082fbaed0d except CB_FOG_*, CB_CLEAR_* and the VPORT transforms. Those shouldn't be needed as we aren't using fog or viewport transforms. We probably don't need all the state that was added back either but I can't reproduce any problems here, so it's hard to say which parts are problematic. Should fix: https://bugs.freedesktop.org/show_bug.cgi?id=28629 and several corruption reports on #radeon. Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2010-06-15r6xx/r7xx: remove unnecessary state emitAlex Deucher
No need to emit state that doesn't impact that we use for EXA/Xv. Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2010-06-15r6xx/r7xx: reorg default and clipping state emitAlex Deucher
Group ordered registers to save command buffer space. Reduces the default and clipping state from 256 to 160 dwords. Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2010-06-15r6xx/r7xx accel: remove some duplicate emits and minor clean upAlex Deucher
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2010-04-01r600/exa: further cleanup, use the object struct in the accel state.Dave Airlie
This cleans up the accel state objects as well. Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-03-22r6xx EXA/Xv: track src/dst domainsAlex Deucher
Much of the code is shared, so track the src/dst domains so we make sure the uses consistent domains for each bo.
2010-03-15r6xx/r7xx: fix domain handling in accel codeAlex Deucher
Noticed by Pauli and Michel on IRC. Improves GetImage performace by a factor of ~10.
2010-02-26Use RADEON_ALIGN instead of open coding it.Matt Turner
Also fix some RADEON_ALIGN(x, 63), which would return incorrect results for odd x. Though this shouldn't happen, it's still not right. You wouldn't ever write (x + 62) & ~62 which is clearly wrong (and what it expands to). CC: Jerome Glisse <jglisse@redhat.com> CC: Alex Deucher <alexdeucher@gmail.com> CC: Dave Airlie <airlied@redhat.com> Signed-off-by: Matt Turner <mattst88@gmail.com>
2010-02-18r6xx/kms: when reseting BO force default state emissionJerome Glisse
In KMS world each cs need to fully initialize the 3D engine when we were erasing cs in IBDiscard for r6xx we weren't forcing reemission of default state. This patch force this emission. Fix : http://bugs.freedesktop.org/show_bug.cgi?id=26603 http://bugzilla.kernel.org/show_bug.cgi?id=15284
2010-02-04r600: reduce number of cache flushesAlex Deucher
We don't need to flush so often. Next step would be to move the flushing to the drm and only flush after each command buffer rather than each draw.
2010-01-18r6xx/r7xx: emit relocation for FRAG & TILE bufferJerome Glisse
FRAG & TILE buffer are unused but still they need to be associated with a valid relocation so that userspace can't try to abuse them to overwritte GART and then try to write anywhere in system memory.
2009-12-01r600: fix multi-operation in single batch support.Dave Airlie
This ports the mesa DMA buffer handling with the 3 lists, Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-11-27r600/accel: cleanup and merge a lot of the accel functionsDave Airlie
All of the drawing ops were the exact same modulo the vtx size, this along with the vertex buffer wrapping code could all be consolidated into a smaller set of functions. This also adds 2 VBO which we switch between, and merges a #define to enable the multiple operations in one CS under KMS mode. Multi-operation still isn't working though. Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-11-25Revert "r600: enable multiple operations in one CS"Dave Airlie
turn this off for now, on my rv635 desktop, I started getting blanks in places in firefox and the odd bit of font corruption, need to track that down. This reverts commit 985a065518b1d33599de33f7fe082d3302db58a6.
2009-11-25r600: enable multiple operations in one CSDave Airlie
This switches on multiple ops in a single CS under KMS/DRI2. It gets for on a Pentium D 3 + rv740 from 330,000 to 500,000 with x11perf -aa10text. It also knocks a couple of seconds of gtkperf -a Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-11-25r600: fixup problems with EXA operation reset for multiple opsDave Airlie
To put multiple ops into one CS, you can't just discard the whole IB. This add supports for reset the CS cdw to the correct place after an op discards. Still doesn't enable the final accel bits.
2009-11-25r600: refactor code to help future acceleration speedups.Dave Airlie
This changes the vertex buffer index to be an offset, and records the start of the vb for each operation and uses that to set the operations up. This still flushes after each operation to make sure we have no regressions in non-kms/kms cases. Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-11-24radeon/kms: drop special r600 indirect flushDave Airlie
This just merges it with the main kms cs flush
2009-10-09r600 EXA: fix up mask reg mixupAlex Deucher
2009-09-25kms/r600: add support for vline relocsAlex Deucher
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2009-09-25radeon: fix vline handling for kmsAlex Deucher
drm crtc ids do not correspond to actual hw crtcs, as such the vline stuff was never enabled for Xv. Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2009-09-25r600: space check wasn't correct.Dave Airlie
the r6xx space check code was incorrect for the DFS case, since the dst bo was in GTT but the hardcoded cp_start function assumed the bos were where it thought. Ripped out assumptions and replaced with code more like other radeons.
2009-09-10r6xx: fix EXA crash with gtkperf -aDave Airlie
unmapping was getting unbalanced.
2009-09-08r600: more alignment fixups + vb map/unmapDave Airlie
I'm not so sure the vb map/unmap is a good idea, I think it pretty much locksteps the cpu/gpu, so we should really work out if we really need to flush this often, since mesa doesn't have to and we are just doing 3D ops.
2009-08-31r6xx/r7xx: various CS fixes from DaveAlex Deucher
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