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Doesn't seem to work well in all cases. Needs more investigation.
fixes bug 21413
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- hw i2c engine has pin selection on r2xx/r2xx/r3xx chips
- also switch hw i2c pin sel for external tmds
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Allows us to hit dot clocks much closer, especially on
chips with non-27 Mhz reference clocks like most IGP chips.
This should fix most flickering and blanking problems with
non-exact dot clocks.
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textured video
This implements
contrast/brightness/hue/saturation controls for r200/r300 plus gamma (same
gamma value for all channels used though separate values would be trivial)
control for r300.
Some issues left:
- only r200/r300
- still can't be combined with bicubic
- controls will silently cease to work if the format used is packed and not
planar (except for rv250)
- gamma range is from 100 to 10000 corresponding to 0.1 and 10.0 like used in
overlay. However, usable range is far smaller. Over 2.0 picture gets dark
pretty quickly, and below 0.6 or so black seems to turn into purple (I've
verified that even with gamma 1.0 black actually often seems to be RGB 1/0/1 so
this explains this since that gets amplified by low gamma values - not sure if
this is a rounding problem somewhere, bogus reference values or is somehow
expected).
- gamma adds a bit too many instructions for my taste (7) though the
alternative (3 texture lookups + some swizzling instructions) doesn't seem any
better.
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Force lower power mode and switch to a lower mode
when idle.
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Dyanmically switch between power states. Switch to a low
power state when the system is idle (DPMS off).
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Force the chip to a low power mode at the expense
of performance.
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- replaces DynamicClocks Option as the name was misleading
- unified interface for atom and com based bioses
- fix up clock gating code for newer r3xx asics
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- move to vram storage
- move swizzle logic to tex setup
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As VRAM gets zeroed out over s/r, we need to reload the
shaders.
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If set, enables the use of atombios for modesetting
on r4xx cards.
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Also fix set_bool_const()
the CF bool consts are not contiguous by shader type
There are 96 boolean constants (32 each for PS, VS, GS) and
they are ordered as follows:
ps, vs, gs ... ps, vs, gs
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use a bool const to select the tex fetch routine
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Reduces the vertex buffer setup overhead
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git+ssh://agd5f@git.freedesktop.org/git/xorg/driver/xf86-video-ati
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Otherwise it and RADEONBiggerCrtcArea show up pretty high in x11perf -aa*text
profiles.
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This reverts commit 0c4694c58f2ec152b19023626bc7ced891d9da65.
This patch just adds latency and thus isn't a real solution
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Really we need proper fencing with timestamps but this should
help in the short term.
This should help with minor corruption issues and possibly
lockups.
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This code is still experimental but we will allow users to enable it for experimental reasons
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This should fix some missing font issues in EXA without DRI cases.
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This adds support for the digital outputs on the RV730.
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Thanks to Joseph Adams for helping me sort this out.
Verified on eMac G4/1.0 with radeon 7500
Later eMacs with radeon 9200 or 9600 chips may have
different ddc setups. Need to verify.
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Only avoid the vlines we are rendering to, instead of the entire
screen. This way we don't stall the card for longer than we
absolutely have to.
EXA calls fixed by Alex Deucher.
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if the dest pixmap is the front buffer, stall the pipe
until the vline is outside the active area.
For EXA, pick crtc based on the larger mode area;
ideally we'd have one pixmap per crtc.
For Xv, use dst window area to determine crtc.
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- fixes bug 18864
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The radeon driver is storing PCI addresses in unsigned long's which
won't work well on 32-bit platforms with 64-bit physical address space
such as PowerPC 4xx. This fixes it by using unsigned long long instead.
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should fix bug 11300
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This is a setup patch for the kms/memory management code.
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Acceleration needs to be initialized before setting the mode
for initial rotation to work. Changing the order in RADEONScreenInit()
doesn't work because RADEONDRIKernelInit() hangs in the ioctl to
initialize the CP if the mode is not set prior (even if the heads
are turned off after setting the mode). The workaround is to set the
modes twice, once before accel and once after.
This needs to be looked into further.
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