Age | Commit message (Collapse) | Author |
|
- KMS only
- Includes full EXA/Xv support
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
|
|
Main differences with evergreen:
- 4-way rather than 5-way
- END_OF_PROGRAM bit removed from CF istructions, use
CF_INST_END instead.
- MEGA_FETCH* fields removed from VTX commands
- no more VC, all fetches go through the TC
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
|
|
Fusion had a bug setting up the VM on earlier kernels so we need to work
around that and only enable accel on a new enough kernel.
Signed-off-by: Dave Airlie <airlied@redhat.com>
|
|
This avoids calling into the kernel for each bo in the accel
code. This is a follow on to:
cc7d1fa39da40a532fcdbe6c7924ca47a879e66a
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
|
|
Calling into the kernel every time is quite expensive, and nobody else should
ever change the tiling flags.
There's still more to do along the same lines for >= R6xx.
|
|
* Fix build against libdrm that doesn't define *_VBLANK_HIGH_CRTC*.
* If we have more than two CRTCs but can't use DRM_VBLANK_HIGH_CRTC_MASK, don't
enable scheduling in the first place rather than relying on
DRM_VBLANK_SECONDARY magically doing something sensible for higher CRTCs.
* Only set up client state tracking when scheduling is enabled.
* Only declare pRADEONEnt when it's needed, and break long lines.
|
|
Hi Alex,
Enclosed is a revised version of two patches sent on Mar 18 and Mar 22,
respectively. Details summarized in these two threads:
http://lists.freedesktop.org/archives/dri-devel/2011-March/009463.html
http://lists.freedesktop.org/archives/dri-devel/2011-March/009582.html
This patch reconciles the DDX with the change in libdrm sent to this list
earlier today. Specifically, it refers to a symbol that has been renamed
from DRM_CAP_HIGH_CRTC to DRM_CAP_VBLANK_HIGH_CRTC. It *supersedes* the
previous patch (i.e. apply it to the master branch as it exists at the
time of this writing, not as an incremental patch to the one sent previously).
Regards,
Ilija
Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com>
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
|
|
this corrects the function name so it matches the contents.
Signed-off-by: Dave Airlie <airlied@redhat.com>
|
|
KMS only. No UMS support for cayman.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
|
|
To avoid CS rejection.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
|
|
linear aligned is supposedly more performant, but more
importantly, linear general only works on the CB without
slices. The texture blocks technically don't support
linear general although, I think linear general gets
upgraded to linear aligned in the hw which is why it
currently works.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
|
|
git+ssh://git.freedesktop.org/git/xorg/driver/xf86-video-ati
|
|
NI cards require KMS.
|
|
|
|
We need to implement a texture lookup with perspective
divide for non-affine transforms. For now just fallback.
Should fix:
https://bugs.freedesktop.org/show_bug.cgi?id=31799
although it appears either EXA or the xserver gets this
wrong too.
|
|
A new optional kms driver option "SwapbuffersWait" is defined
for xorg.conf, which defaults to "on". If "on", DRI2 bufferswaps
will be synchronized to vsync, otherwise not.
This currently only affects copy-swaps, not pageflipped swaps.
It also requires a swap_interval setting of zero by the OpenGL
client.
Ideally, we'd provide a way for dri2 to pass the current swap
interval to the ddx so we could change this dynamically.
Signed-off-by: Mario Kleiner <mario.kleiner@tuebingen.mpg.de>
|
|
requires radeon drm 2.8.0 or higher
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
|
|
Accel not enabled yet.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
|
|
Should fix:
https://bugs.freedesktop.org/show_bug.cgi?id=30685
|
|
git+ssh://git.freedesktop.org/git/xorg/driver/xf86-video-ati
|
|
If the fbLocation was at an address >32 bits, we'd fail.
Change fbLocation to uint64_t and properly cast when needed.
|
|
|
|
this way we can share the vbo code with const buffers
|
|
Based on the r6xx/r7xx code updated for evergreen.
Still causes GPU hangs in some cases. We haven't
tracked down why yet. Might be related to constant
buffer persistence.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
|
|
|
|
Requires radeon drm 2.6.0 and updated mesa.
v2: - fix lockup due to not emiting DB_DEPTH_INFO
https://bugs.freedesktop.org/show_bug.cgi?id=28342
- fix drm minor version to deal with evergreen accel
v3: rebase on current ddx git
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
|
|
This is a precursor for r300/500 vbo support.
Signed-off-by: Dave Airlie <airlied@redhat.com>
|
|
|
|
It has never been used, and since the world is changing it almost
certainly never will be. Good riddance.
Signed-off-by: Dave Airlie <airlied@redhat.com>
|
|
The rest of it died a long time ago.
Signed-off-by: Dave Airlie <airlied@redhat.com>
|
|
should fix fdo bug 25884
|
|
fixes fdo bug 27692
|
|
tv-out on atom systems is very particular about it's
dividers. force it to use the old algo.
Should fix fdo bug 27593.
|
|
This cleans up the accel state objects as well.
Signed-off-by: Dave Airlie <airlied@redhat.com>
|
|
|
|
Much of the code is shared, so track the src/dst
domains so we make sure the uses consistent domains
for each bo.
|
|
Also, define RADEON_BUFFER_ALIGN in terms of it, and replace some
RADEON_ALIGN(x, RADEON_BUFFER_ALIGN) with RADEON_ALIGN(x,
RADEON_GPU_PAGE_SIZE) since this is really what was intended.
CC: Jerome Glisse <jglisse@redhat.com>
CC: Alex Deucher <alexdeucher@gmail.com>
CC: Dave Airlie <airlied@redhat.com>
Signed-off-by: Matt Turner <mattst88@gmail.com>
|
|
Now that the screen section mapping is fixed,
Make the option per-instance and allow multiple
outputs to be specified; e.g., DVI-0 and HDMI-0
associated with instance 0 and LVDS and VGA-0
associated with instance 1.
|
|
- add support for pre-avivo chips
- add support for fixed post/ref dividers
- add support for non-fractional fb dividers
By default avivo chips use the new algo and
pre-avivo chips use the old algo. Use the
"NewPLL" option to toggle between them (set to
TRUE for the new algo, FALSE for the old).
|
|
Allows users that want to use zaphod mode to select
which xrandr outputs are assigned to which head. E.g.,
Option "ZaphodHeads" "LVDS,VGA-0"
will assign LVDS to the first zaphod driver instance
and VGA-0 to the second instance.
|
|
KMS doesn't have acceleration for upload to vram. memcpy/memmove to VRAM
directly is very slow (40M/s in benchmark) which causes visible problems
to video.
Allocating video buffer in GTT will give good performance (350-450M/s)
for memmove operation. This is nice performance boost for Xv under KMS.
Signed-off-by: Pauli Nieminen <suokkos@gmail.com>
|
|
|
|
Use the Xv version as it takes into account the area
covered by the op rather than just picking the largest
crtc area.
|
|
|
|
add new fixed post divider option
|
|
This should hopefully help the problems with flickering
and blinking monitors reported on some systems. If there
are problems, the old PLL algorithm can be selected with:
Option "NewPLL" "FALSE"
in the device section of your X config.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
|
|
The dimension of an XvImage is limited to 2048 x 2048 even if an adaptor
supports larger image.
XvCreateImage and XvShmCreateImage lower the width or height of an image.
XvPutImage and XvShmPutImage return BadValue.
The cause is that 2048 is hardcoded in RADEONQueryImageAttributes.
|
|
|
|
This ports the mesa DMA buffer handling with the 3 lists,
Signed-off-by: Dave Airlie <airlied@redhat.com>
|
|
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
|